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2019-01-07hw/timer/nrf51_timer: Add nRF51 Timer peripheralSteffen Görtz1-0/+1
This patch adds the model for the nRF51 timer peripheral. Currently, only the TIMER mode is implemented. Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 20190103091119.9367-9-stefanha@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-08-24hw/timer/cmsdk-apb-dualtimer: Implement CMSDK dual timer modulePeter Maydell1-0/+1
The Arm Cortex-M System Design Kit includes a "dual-input timer module" which combines two programmable down-counters. Implement a model of this device. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180820141116.9118-4-peter.maydell@linaro.org
2018-07-03hw/timer: Add basic M41T80 emulationBALATON Zoltan1-0/+1
Basic emulation of the M41T80 serial (I2C) RTC chip. Only getting time of day is implemented. Setting time and RTC alarm are not supported. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-03-02xlnx-zynqmp-rtc: Initial commitAlistair Francis1-0/+1
Initial commit of the ZynqMP RTC device. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-21msf2: Add Smartfusion2 System timerSubbaraya Sundeep1-0/+1
Modelled System Timer in Microsemi's Smartfusion2 Soc. Timer has two 32bit down counters and two interrupts. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-2-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-17hw/char/cmsdk-apb-timer: Implement CMSDK APB timer devicePeter Maydell1-0/+1
Implement a model of the simple timer device found in the CMSDK. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 1500029487-14822-5-git-send-email-peter.maydell@linaro.org
2017-02-28armv7m: Split systick out from NVICPeter Maydell1-0/+1
The SysTick timer isn't really part of the NVIC proper; we just modelled it that way back when we couldn't easily have devices that only occupied a small chunk of a memory region. Split it out into its own device. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1487604965-23220-10-git-send-email-peter.maydell@linaro.org Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2017-02-06Split ISA and sysbus versions of m48t59 deviceDavid Gibson1-0/+3
The m48t59 device supports both ISA and direct sysbus attached versions of the device in the one .c file. This can be awkward for some embedded machine types which need the sysbus M48T59, but don't want to pull in the ISA bus code and its other dependencies. Therefore, this patch splits out the code for the ISA attached M48T59 into its own C file. It will be built when both CONFIG_M48T59 and CONFIG_ISA_BUS are enabled. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
2017-01-24nios2: Add periodic timer emulationChris Wulff1-0/+1
Add the Altera timer model. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chris Wulff <crwulff@gmail.com> Cc: Jeff Da Silva <jdasilva@altera.com> Cc: Ley Foon Tan <lftan@altera.com> Cc: Sandra Loosemore <sandra@codesourcery.com> Cc: Yves Vandervennet <yvanderv@altera.com> Reviewed-by: Alexander Graf <agraf@suse.de> Message-Id: <20170118220146.489-6-marex@denx.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-18target-sparc: implement sun4v RTCArtyom Tarasenko1-0/+2
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
2016-07-12hw/mips: implement GIC Interval TimerYongbok Kim1-0/+1
The interval timer is similar to the CP0 Count/Compare timer within each processor. The difference is the GIC_SH_COUNTER register is global to the system so that all processors have the same time reference. To ease implementation, all VPs are having its own QEMU timer but sharing global settings and registers such as GIC_SH_CONFIG.COUTNSTOP and GIC_SH_COUNTER. MIPS GIC Interval Timer does support upto 64 bits of Count register but in this implementation it is limited to 32 bits only. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-03-16hw/timer: Add ASPEED timer device modelAndrew Jeffery1-0/+1
Implement basic ASPEED timer functionality for the AST2400 SoC[1]: Up to 8 timers can independently be configured, enabled, reset and disabled. Some hardware features are not implemented, namely clock value matching and pulse generation, but the implementation is enough to boot the Linux kernel configured with aspeed_defconfig. [1] http://www.aspeedtech.com/products.php?fPath=20&rId=376 Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1458096317-25223-2-git-send-email-andrew@aj.id.au Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-23tusb6010: move from hw/timer to hw/usbPeter Maydell1-1/+0
The TUSB6010 is a USB controller (as the name suggests). Move it from hw/timer (where it was accidentally filed in 2013 when we moved everything out of hw/) to hw/usb. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1455883404-10976-1-git-send-email-peter.maydell@linaro.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-03-11stm32f2xx_timer: Add the stm32f2xx TimerAlistair Francis1-0/+2
This patch adds the stm32f2xx timers: TIM2, TIM3, TIM4 and TIM5 to QEMU. Signed-off-by: Alistair Francis <alistair@alistair23.me> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 155091a323390f8da3cca496e4c611c493e62a77.1424175342.git.alistair@alistair23.me Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17hw/timer: add allwinner a10 timerliguang1-0/+2
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1387159292-10436-3-git-send-email-lig.fnst@cn.fujitsu.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17hw/arm/digic: add timer supportAntony Pavlov1-0/+1
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1387188908-754-4-git-send-email-antonynpavlov@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10hw/timer: Introduce ARM A9 Global Timer.Peter Crosthwaite1-0/+1
The ARM A9 MPCore has a timer that is global to all cores in the cluster. The timer is shared but each core has a private independent comparator and interrupt. Based on version contributed by Francois LEGAL. Signed-off-by: François LEGAL <devel@thom.fr.eu.org> Message-id: 4918e89476b8da916be2964ec41578b50d569a37.1385969450.git.peter.crosthwaite@xilinx.com [PC changes: * New commit message * Re-implemented as single timer model * Fixed backwards counting issue in polled mode * completed VMSD fields * macroified magic numbers (and headerified reg definitions) * split of as device-model-only patch * use bitops for 64 bit register access * Fixed auto increment mode to check condition properly * general cleanup (names/style etc). ] Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> [PMM: * minor typo fixes * added missing return after error_setg() * dropped setting dc->no_user = 1 ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-07-09timer/arm_mptimer: Build arm_mptimer only onceAndreas Färber1-1/+1
Since current_cpu is CPUState it no longer depends on CPUARMState. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-03i.MX: split GPT and EPIT timer implementationJean-Christophe DUBOIS1-1/+2
There is no common code between these 2 timer implementation. So it is better to split them. Signed-off-by: Jean-Christophe DUBOIS <jcd@tribudubois.net> Message-id: 1368990197-19694-1-git-send-email-jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-04-08hw: move timer devices to hw/timer/, configure with default-configs/Paolo Bonzini1-0/+16
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move MC146818RTC to hw/timer/, configure via default-configs/Paolo Bonzini1-0/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move target-independent files to subdirectoriesPaolo Bonzini1-0/+10
This patch tackles all files that are compiled once, moving them to subdirectories of hw/. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: make subdirectories for devicesPaolo Bonzini1-0/+0
Prepare the new directory structure. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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