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path: root/hw/ssi/imx_spi.c
AgeCommit message (Expand)AuthorFilesLines
2021-02-02hw/ssi: imx_spi: Correct tx and rx fifo endiannessBin Meng1-5/+2
2021-02-02hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logicBin Meng1-1/+1
2021-02-02hw/ssi: imx_spi: Round up the burst length to be multiple of 8Bin Meng1-1/+16
2021-02-02hw/ssi: imx_spi: Disable chip selects when controller is disabledXuzhou Cheng1-0/+6
2021-02-02hw/ssi: imx_spi: Rework imx_spi_write() to handle block disabledPhilippe Mathieu-Daudé1-4/+9
2021-02-02hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabledPhilippe Mathieu-Daudé1-31/+29
2021-02-02hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register valuePhilippe Mathieu-Daudé1-8/+24
2021-02-02hw/ssi: imx_spi: Remove pointless variable initializationPhilippe Mathieu-Daudé1-2/+0
2021-02-02hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset()Bin Meng1-4/+10
2021-02-02hw/ssi: imx_spi: Use a macro for number of chip selects supportedBin Meng1-2/+2
2020-11-10ssi: Fix bad printf format specifiersAlexChen1-1/+1
2020-06-15ssi: ssi_auto_connect_slaves() never does anything, dropMarkus Armbruster1-2/+0
2020-06-05hw/ssi/imx_spi: Removed unnecessary cast of rx data received from slaveEden Mikitas1-1/+1
2020-06-05hw/ssi/imx_spi: changed while statement to prevent underflowEden Mikitas1-1/+1
2019-08-16Clean up inclusion of sysemu/sysemu.hMarkus Armbruster1-1/+0
2019-08-16Include migration/vmstate.h lessMarkus Armbruster1-0/+1
2019-08-16Include hw/irq.h a lot lessMarkus Armbruster1-0/+1
2019-06-12Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster1-0/+1
2018-08-16imx_spi: Unset XCH when TX FIFO becomes emptyTrent Piepho1-2/+1
2017-01-09hw/ssi/imx_spi.c: Remove MSGDATA register supportJean-Christophe Dubois1-3/+8
2016-09-22imx: Use 'const char', not 'char const'Peter Maydell1-1/+1
2016-05-19hw: explicitly include qemu/log.hPaolo Bonzini1-0/+1
2016-05-12i.MX: Add the Freescale SPI ControllerJean-Christophe DUBOIS1-0/+454