| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2011-08-20 | Use glib memory allocation and free functions | Anthony Liguori | 1 | -1/+1 |
| 2011-06-26 | Remove exec-all.h include directives | Blue Swirl | 1 | -1/+0 |
| 2011-01-26 | sh4: implement missing mmaped TLB read functions | Aurelien Jarno | 1 | -6/+9 |
| 2011-01-26 | sh4: implement missing mmaped TLB write functions | Aurelien Jarno | 1 | -3/+2 |
| 2011-01-09 | target-sh4: implement writes to mmaped ITLB | Aurelien Jarno | 1 | -0/+2 |
| 2010-12-11 | Add endianness as io mem parameter | Alexander Graf | 1 | -2/+4 |
| 2010-03-18 | Replace assert(0) with abort() or cpu_abort() | Blue Swirl | 1 | -15/+15 |
| 2010-02-09 | sh7750: handle MMUCR TI bit | Aurelien Jarno | 1 | -2/+5 |
| 2009-10-01 | Revert "Get rid of _t suffix" | Anthony Liguori | 1 | -12/+12 |
| 2009-10-01 | Get rid of _t suffix | malc | 1 | -12/+12 |
| 2009-09-25 | static and inline should came before the type of the functions | Juan Quintela | 1 | -1/+1 |
| 2009-08-25 | Make CPURead/WriteFunc structure 'const' | Blue Swirl | 1 | -4/+4 |
| 2009-06-16 | Remove io_index argument from cpu_register_io_memory() | Avi Kivity | 1 | -4/+2 |
| 2009-05-13 | Include assert.h from qemu-common.h | Paul Brook | 1 | -1/+0 |
| 2009-02-07 | SH7750/51: add register BCR3, BCR4, PCR, RTCOR, RTCNT, RTCSR, SDMR2, SDMR3 an... | aurel32 | 1 | -10/+42 |
| 2008-12-13 | Remove unnecessary trailing newlines | blueswir1 | 1 | -1/+0 |
| 2008-12-07 | SH4: Eliminate P4 to A7 mangling (Takashi YOSHII). | balrog | 1 | -0/+6 |
| 2008-12-07 | SH: improve the way sh7750 registers io memory (Takashi YOSHII). | balrog | 1 | -8/+6 |
| 2008-12-07 | SH: r2d pci support (Takashi YOSHII). | balrog | 1 | -0/+17 |
| 2008-12-07 | sh4: Add IRL (4-bit encoded interrupt input) support (Takashi YOSHII). | balrog | 1 | -1/+39 |
| 2008-12-01 | Change MMIO callbacks to use offsets, not absolute addresses. | pbrook | 1 | -1/+2 |
| 2008-11-21 | SH4: Switch serial emulation to qemu_irq | aurel32 | 1 | -8/+8 |
| 2008-11-21 | SH4: Use qemu_irq in timer emulation. | aurel32 | 1 | -6/+6 |
| 2008-09-02 | sh4: CPU versioning. | aurel32 | 1 | -26/+17 |
| 2008-08-22 | [sh4] MMU bug fix | aurel32 | 1 | -0/+4 |
| 2008-08-22 | [sh4] memory mapped TLB entries | aurel32 | 1 | -0/+110 |
| 2008-07-16 | Fix a bunch of type mismatch-related warnings (Jan Kiszka). | balrog | 1 | -2/+2 |
| 2008-05-09 | SH4 serial controler improvements | aurel32 | 1 | -2/+12 |
| 2008-05-09 | SH4 MMU improvements | aurel32 | 1 | -0/+3 |
| 2007-12-12 | Adds interrupt support to the sh specific timer code (Magnus Damm). | balrog | 1 | -3/+9 |
| 2007-12-02 | SH4: system emulator interrupt update, by Magnus Damm. | ths | 1 | -0/+2 |
| 2007-11-17 | Break up vl.h. | pbrook | 1 | -1/+3 |
| 2007-11-11 | removed invalid use of _INTC_ARRAY | bellard | 1 | -2/+2 |
| 2007-10-04 | sh775x interrupt controller by Magnus Damm. | balrog | 1 | -45/+178 |
| 2007-09-29 | Add FRQCR read support, by Magnus Damm. | ths | 1 | -0/+2 |
| 2007-09-29 | Add INTC controller prototype, by Magnus Damm. | ths | 1 | -0/+51 |
| 2007-09-29 | Stand-alone SCI/SCIF emulation code, by Magnus Damm. | ths | 1 | -341/+4 |
| 2007-09-29 | Stand-alone TMU emulation code, by Magnus Damm. | ths | 1 | -96/+6 |
| 2007-09-16 | find -type f | xargs sed -i 's/[\t ]$//g' # on most files | ths | 1 | -2/+2 |
| 2007-01-27 | Rearrange char event handlers to fix CHR_EVENT_RESET. | pbrook | 1 | -6/+4 |
| 2006-06-25 | C99 64 bit printf | bellard | 1 | -1/+1 |
| 2006-04-27 | SHIX board emulation (Samuel Tardieu) | bellard | 1 | -0/+836 |
