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AgeCommit message (Expand)AuthorFilesLines
2023-05-05hw/riscv: Add signature dump function for spike to run ACT testsWeiwei Li1-0/+13
2023-03-22*: Add missing includes of qemu/error-report.hRichard Henderson3-0/+3
2023-03-06hw/riscv/virt.c: Initialize the ACPI tablesSunil V L1-0/+4
2023-03-06hw/riscv/virt: virt-acpi-build.c: Add RHCT TableSunil V L1-0/+78
2023-03-06hw/riscv/virt: virt-acpi-build.c: Add RINTC in MADTSunil V L1-0/+34
2023-03-06hw/riscv/virt: Enable basic ACPI infrastructureSunil V L3-0/+306
2023-03-06hw/riscv/virt: Add memmap pointer to RiscVVirtStateSunil V L1-0/+2
2023-03-06hw/riscv/virt: Add a switch to disable ACPISunil V L1-0/+29
2023-03-06hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fieldsSunil V L1-0/+5
2023-03-06riscv: Correctly set the device-tree entry 'mmu-type'Alexandre Ghiti1-8/+11
2023-03-05hw/riscv/virt.c: add cbo[mz]-block-size fdt propertiesAnup Patel1-0/+11
2023-03-01hw/riscv: Move the dtb load bits outside of create_fdt()Bin Meng2-31/+29
2023-03-01hw/riscv: Skip re-generating DT nodes for a given DTBBin Meng2-0/+2
2023-03-01hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in create_fdt_socket_cpus()Daniel Henrique Barboza1-3/+4
2023-02-16hw/riscv/boot.c: make riscv_load_initrd() staticDaniel Henrique Barboza1-40/+40
2023-02-16hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()Daniel Henrique Barboza7-42/+19
2023-02-16hw/riscv: handle 32 bit CPUs kernel_entry in riscv_load_kernel()Daniel Henrique Barboza7-9/+29
2023-02-07hw/riscv: virt: Simplify virt_{get,set}_aclint()Bin Meng1-4/+2
2023-02-07hw/riscv: change riscv_compute_fdt_addr() semanticsDaniel Henrique Barboza5-16/+31
2023-02-07hw/riscv: split fdt address calculation from fdt loadDaniel Henrique Barboza5-16/+40
2023-02-07hw/riscv/boot.c: calculate fdt size after fdt_pack()Daniel Henrique Barboza1-4/+6
2023-02-07hw/riscv/spike.c: rename MachineState 'mc' pointers to' ms'Daniel Henrique Barboza1-9/+9
2023-02-07hw/riscv/virt.c: rename MachineState 'mc' pointers to 'ms'Daniel Henrique Barboza1-217/+217
2023-02-07hw/riscv/virt.c: calculate socket count once in create_fdt_imsic()Daniel Henrique Barboza1-15/+19
2023-02-07hw/riscv: boot: Don't use CSRs if they are disabledAlistair Francis1-0/+9
2023-02-07include/hw/riscv/opentitan: update opentitan IRQsWilfred Mallawa1-40/+40
2023-01-20hw/riscv/virt.c: move create_fw_cfg() back to virt_machine_init()Daniel Henrique Barboza1-7/+7
2023-01-20hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix()Daniel Henrique Barboza3-6/+6
2023-01-20hw/riscv: use MachineState::fdt in riscv_socket_fdt_write_id()Daniel Henrique Barboza3-15/+15
2023-01-20hw/riscv/virt.c: remove 'is_32_bit' param from create_fdt_socket_cpus()Daniel Henrique Barboza1-9/+9
2023-01-20hw/riscv/sifive_u.c: simplify create_fdt()Daniel Henrique Barboza1-4/+4
2023-01-20hw/riscv/virt.c: simplify create_fdt()Daniel Henrique Barboza1-3/+2
2023-01-20hw/riscv/spike.c: simplify create_fdt()Daniel Henrique Barboza1-3/+1
2023-01-20hw/riscv/boot.c: use MachineState in riscv_load_kernel()Daniel Henrique Barboza7-13/+8
2023-01-20hw/riscv/boot.c: use MachineState in riscv_load_initrd()Daniel Henrique Barboza5-10/+8
2023-01-20hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel()Daniel Henrique Barboza3-16/+15
2023-01-20hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd()Daniel Henrique Barboza5-38/+20
2023-01-20hw/riscv/spike.c: load initrd right after riscv_load_kernel()Daniel Henrique Barboza1-16/+15
2023-01-20hw/riscv/boot.c: exit early if filename is NULL in load functionsDaniel Henrique Barboza1-0/+6
2023-01-20hw/riscv/sifive_u: use 'fdt' from MachineStateDaniel Henrique Barboza1-9/+6
2023-01-20hw/riscv/spike: use 'fdt' from MachineStateDaniel Henrique Barboza1-7/+5
2023-01-20hw/riscv: spike: Decouple create_fdt() dependency to ELF loadingBin Meng1-10/+51
2023-01-20hw/riscv/boot.c: Introduce riscv_find_firmware()Bin Meng1-14/+25
2023-01-20hw/riscv/boot.c: introduce riscv_default_firmware_name()Daniel Henrique Barboza4-23/+21
2023-01-20hw/riscv/boot.c: make riscv_find_firmware() staticDaniel Henrique Barboza1-22/+22
2023-01-20hw/riscv: spike: Remove the out-of-date commentsBin Meng1-5/+0
2023-01-20hw/char: riscv_htif: Move registers from CPUArchState to HTIFStateBin Meng1-2/+1
2023-01-20hw/char: riscv_htif: Drop useless assignment of memory regionBin Meng1-3/+2
2023-01-06hw/riscv: opentitan: Drop "hartid-base" and "priority-base" initializationBin Meng1-2/+0
2023-01-06hw/riscv: virt: Fix the value of "riscv, ndev" in the dtbBin Meng1-1/+2
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