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path: root/hw/riscv/virt.c
AgeCommit message (Expand)AuthorFilesLines
2023-03-06hw/riscv/virt.c: Initialize the ACPI tablesSunil V L1-0/+4
2023-03-06hw/riscv/virt: Add memmap pointer to RiscVVirtStateSunil V L1-0/+2
2023-03-06hw/riscv/virt: Add a switch to disable ACPISunil V L1-0/+29
2023-03-06hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fieldsSunil V L1-0/+5
2023-03-06riscv: Correctly set the device-tree entry 'mmu-type'Alexandre Ghiti1-8/+11
2023-03-05hw/riscv/virt.c: add cbo[mz]-block-size fdt propertiesAnup Patel1-0/+11
2023-03-01hw/riscv: Move the dtb load bits outside of create_fdt()Bin Meng1-15/+14
2023-03-01hw/riscv: Skip re-generating DT nodes for a given DTBBin Meng1-0/+1
2023-03-01hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in create_fdt_socket_cpus()Daniel Henrique Barboza1-3/+4
2023-02-16hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()Daniel Henrique Barboza1-10/+1
2023-02-16hw/riscv: handle 32 bit CPUs kernel_entry in riscv_load_kernel()Daniel Henrique Barboza1-1/+2
2023-02-07hw/riscv: virt: Simplify virt_{get,set}_aclint()Bin Meng1-4/+2
2023-02-07hw/riscv: change riscv_compute_fdt_addr() semanticsDaniel Henrique Barboza1-1/+2
2023-02-07hw/riscv: split fdt address calculation from fdt loadDaniel Henrique Barboza1-3/+4
2023-02-07hw/riscv/virt.c: rename MachineState 'mc' pointers to 'ms'Daniel Henrique Barboza1-217/+217
2023-02-07hw/riscv/virt.c: calculate socket count once in create_fdt_imsic()Daniel Henrique Barboza1-15/+19
2023-01-20hw/riscv/virt.c: move create_fw_cfg() back to virt_machine_init()Daniel Henrique Barboza1-7/+7
2023-01-20hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix()Daniel Henrique Barboza1-1/+1
2023-01-20hw/riscv: use MachineState::fdt in riscv_socket_fdt_write_id()Daniel Henrique Barboza1-9/+9
2023-01-20hw/riscv/virt.c: remove 'is_32_bit' param from create_fdt_socket_cpus()Daniel Henrique Barboza1-9/+9
2023-01-20hw/riscv/virt.c: simplify create_fdt()Daniel Henrique Barboza1-3/+2
2023-01-20hw/riscv/boot.c: use MachineState in riscv_load_kernel()Daniel Henrique Barboza1-2/+1
2023-01-20hw/riscv/boot.c: use MachineState in riscv_load_initrd()Daniel Henrique Barboza1-2/+1
2023-01-20hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel()Daniel Henrique Barboza1-6/+5
2023-01-20hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd()Daniel Henrique Barboza1-8/+2
2023-01-20hw/riscv/boot.c: introduce riscv_default_firmware_name()Daniel Henrique Barboza1-7/+3
2023-01-06hw/riscv: virt: Fix the value of "riscv, ndev" in the dtbBin Meng1-1/+2
2023-01-06hw/riscv: virt: Remove the redundant ipi-id propertyAtish Patra1-4/+0
2022-10-14hw/riscv: virt: Enable booting S-mode firmware from pflashSunil V L1-1/+17
2022-10-14hw/riscv: virt: Move create_fw_cfg() prior to loading kernelSunil V L1-7/+7
2022-09-07hw/riscv: virt: Add PMU DT node to the device treeAtish Patra1-0/+16
2022-09-07target/riscv: Use official extension names for AIA CSRsAnup Patel1-11/+2
2022-09-07hw/riscv: virt: fix syscon subnode pathsConor Dooley1-2/+2
2022-09-07hw/riscv: virt: fix the plic's address cellsConor Dooley1-0/+2
2022-09-07hw/riscv: virt: fix uart node nameConor Dooley1-1/+1
2022-09-07hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec()Daniel Henrique Barboza1-1/+1
2022-09-07hw/riscv: virt: pass random seed to fdtJason A. Donenfeld1-0/+6
2022-06-10hw/riscv: virt: Generate fw_cfg DT node correctlyAtish Patra1-10/+18
2022-05-24hw/riscv: virt: Fix interrupt parent for dynamic platform devicesAnup Patel1-13/+12
2022-05-24hw/riscv: Make CPU config error handling generous (virt/spike)Tsukasa OI1-1/+1
2022-04-29hw/riscv: Enable TPM backendsAlistair Francis1-0/+4
2022-04-29hw/riscv: virt: Add device plug supportAlistair Francis1-0/+35
2022-04-29hw/riscv: virt: Add support for generating platform FDT entriesAlistair Francis1-0/+19
2022-04-29hw/riscv: virt: Create a platform busAlistair Francis1-19/+49
2022-04-29hw/riscv: virt: Add a machine done notifierAlistair Francis1-90/+101
2022-04-29hw/riscv: Don't add empty bootargs to device treeBin Meng1-1/+1
2022-04-22hw/riscv: virt: fix DT property mmu-type when CPU mmu option is disabledNiklas Cassel1-2/+8
2022-04-22hw/riscv: virt: Exit if the user provided -bios in combination with KVMRalf Ramsauer1-4/+10
2022-03-03hw/riscv: virt: Increase maximum number of allowed CPUsAnup Patel1-0/+10
2022-03-03hw/riscv: virt: Add optional AIA IMSIC support to virt machineAnup Patel1-81/+358
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