aboutsummaryrefslogtreecommitdiff
path: root/hw/riscv/virt.c
AgeCommit message (Expand)AuthorFilesLines
2020-06-15sysbus: Convert to sysbus_realize() etc. with CoccinelleMarkus Armbruster1-2/+2
2020-06-15qdev: Convert uses of qdev_create() manuallyMarkus Armbruster1-2/+2
2020-06-15qdev: Convert uses of qdev_create() with CoccinelleMarkus Armbruster1-2/+2
2020-06-15riscv: Fix to put "riscv.hart_array" devices on sysbusMarkus Armbruster1-2/+2
2020-06-03hw/riscv: virt: Remove the riscv_ prefix of the machine* functionsBin Meng1-10/+10
2020-05-18hw: Use QEMU_IS_ALIGNED() on parallel flash block sizePhilippe Mathieu-Daudé1-1/+1
2020-05-15qom: Drop parameter @errp of object_property_add() & friendsMarkus Armbruster1-3/+2
2020-04-29hw/riscv: Add optional symbol callback ptr to riscv_load_firmware()Anup Patel1-1/+1
2020-04-29hw/riscv: Generate correct "mmu-type" for 32-bit machinesBin Meng1-0/+4
2020-02-27hw/riscv: Provide rdtime callback for TCG in CLINT emulationAnup Patel1-1/+1
2020-02-27riscv: virt: Allow PCI address 0Bin Meng1-0/+1
2020-02-10riscv: virt: Use Goldfish RTC deviceAnup Patel1-0/+16
2020-02-10riscv/virt: Add syscon reboot and poweroff DT nodesAnup Patel1-4/+22
2019-11-25hw/riscv: Add optional symbol callback ptr to riscv_load_kernel()Zhuang, Siwei (Data61, Kensington NSW)1-1/+2
2019-11-25RISC-V: virt: This is a "sifive,test1" test finisherPalmer Dabbelt1-1/+4
2019-11-14riscv/virt: Increase flash sizeAlistair Francis1-1/+1
2019-10-28riscv/virt: Jump to pflash if specifiedAlistair Francis1-1/+10
2019-10-28riscv/virt: Add the PFlash CFI01 deviceAlistair Francis1-0/+86
2019-10-28riscv/virt: Manually define the machineAlistair Francis1-6/+24
2019-10-28riscv: hw: Drop "clock-frequency" property of cpu nodesBin Meng1-2/+0
2019-09-17riscv: hw: Change create_fdt() to return voidBin Meng1-7/+4
2019-09-17riscv: hw: Remove not needed PLIC properties in device treeBin Meng1-2/+0
2019-09-17riscv: hw: Use qemu_fdt_setprop_cell() for property with only 1 cellBin Meng1-12/+12
2019-09-17riscv: hw: Remove superfluous "linux, phandle" propertyBin Meng1-3/+0
2019-08-16Include sysemu/sysemu.h a lot lessMarkus Armbruster1-0/+1
2019-08-16Include hw/hw.h exactly where neededMarkus Armbruster1-1/+0
2019-07-18hw/riscv: Load OpenSBI as the default firmwareAlistair Francis1-3/+8
2019-07-05hw/riscv: Replace global smp variables with machine smp propertiesLike Xu1-0/+1
2019-06-27hw/riscv: Add support for loading a firmwareAlistair Francis1-0/+4
2019-06-27hw/riscv: Split out the boot functionsAlistair Francis1-46/+5
2019-06-25riscv: virt: Add cpu-topology DT node.Atish Patra1-2/+20
2019-06-23riscv: virt: Correct pci "bus-range" encodingBin Meng1-1/+1
2019-05-24riscv: virt: Allow specifying a CPU via commandlineAlistair Francis1-1/+2
2019-05-24target/riscv: Remove unused include of riscv_htif.h for virt board riscvJonathan Behrens1-1/+0
2019-02-11riscv: Ensure the kernel start address is correctly castAlistair Francis1-1/+1
2019-02-05elf: Add optional function ptr to load_elf() to parse ELF notesLiam Merwick1-1/+1
2018-12-20hw/riscv/virt: Connect the gpex PCIeAlistair Francis1-1/+130
2018-12-20hw/riscv/virt: Adjust memory layout spacingAlistair Francis1-8/+8
2018-11-13hw/riscv/virt: Free the test device tree node nameAlistair Francis1-0/+1
2018-10-17RISC-V: Don't add NULL bootargs to device-treeMichael Clark1-1/+3
2018-10-17RISC-V: Add missing free for plic_hart_configMichael Clark1-0/+2
2018-09-25Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2018-09-24' into...Peter Maydell1-2/+2
2018-09-24Drop "qemu:" prefix from error_report() argumentsMao Zhongyi1-2/+2
2018-09-05hw/riscv/virtio: Set the soc device tree node as a simple-busAlistair Francis1-1/+1
2018-07-19virt: Fix crash when introspecting the deviceAlistair Francis1-3/+2
2018-07-05hw/riscv/sifive_plic: Use gpios instead of irqsAlistair Francis1-2/+2
2018-07-02hw/riscv: Use the IEC binary prefix definitionsPhilippe Mathieu-Daudé1-1/+2
2018-05-06RISC-V: Mark ROM read-only after copying in codeMichael Clark1-19/+24
2018-05-06RISC-V: Remove EM_RISCV ELF_MACHINE indirectionMichael Clark1-1/+1
2018-05-06RISC-V: Remove unused class definitionsMichael Clark1-25/+0