riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2019-08-16	Include sysemu/sysemu.h a lot less	Markus Armbruster	1	-0/+1
2019-08-16	Include hw/hw.h exactly where needed	Markus Armbruster	1	-1/+0
2019-07-05	hw/riscv: Replace global smp variables with machine smp properties	Like Xu	1	-2/+4
2019-06-27	hw/riscv: Split out the boot functions	Alistair Francis	1	-15/+2
2019-06-23	RISC-V: Fix a memory leak when realizing a sifive_e	Palmer Dabbelt	1	-7/+6
2019-05-24	SiFive RISC-V GPIO Device	Fabien Chouteau	1	-2/+26
2019-02-11	riscv: Ensure the kernel start address is correctly cast	Alistair Francis	1	-1/+1
2019-02-05	elf: Add optional function ptr to load_elf() to parse ELF notes	Liam Merwick	1	-1/+1
2018-12-20	RISC-V: Enable second UART on sifive_e and sifive_u	Michael Clark	1	-3/+2
2018-09-24	Drop "qemu:" prefix from error_report() arguments	Mao Zhongyi	1	-1/+1
2018-07-19	sifive_e: Fix crash when introspecting the device	Alistair Francis	1	-6/+6
2018-07-05	hw/riscv/sifive_plic: Use gpios instead of irqs	Alistair Francis	1	-2/+3
2018-07-05	hw/riscv/sifive_e: Create a SiFive E SoC object	Alistair Francis	1	-25/+69
2018-05-06	RISC-V: Mark ROM read-only after copying in code	Michael Clark	1	-12/+8
2018-05-06	RISC-V: Remove EM_RISCV ELF_MACHINE indirection	Michael Clark	1	-1/+1
2018-05-06	RISC-V: Remove unused class definitions	Michael Clark	1	-25/+0
2018-05-06	RISC-V: Remove identity_translate from load_elf	Michael Clark	1	-6/+1
2018-04-26	Change references to serial_hds[] to serial_hd()	Peter Maydell	1	-2/+2
2018-03-07	SiFive Freedom E Series RISC-V Machine	Michael Clark	1	-0/+234