aboutsummaryrefslogtreecommitdiff
path: root/hw/ppce500_spin.c
AgeCommit message (Collapse)AuthorFilesLines
2013-02-16ppce500_spin: Replace open-coded CPU loop with qemu_get_cpu()Andreas Färber1-11/+4
Potentially env could be NULL whereas cpu would still be valid and correspond to a previous env. Wrapping this in qemu_get_cpu(), env is no longer needed, so simplify code that existed before 55e5c2850293547203874098f7cec148ffd12dfa. Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-21sysbus: Drop sysbus_from_qdev() cast macroAndreas Färber1-1/+1
Replace by SYS_BUS_DEVICE() QOM cast macro using a scripted conversion. Avoids the old macro creeping into new code. Resolve a Coding Style warning in openpic code. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-01-15cpu: Move cpu_index field to CPUStateAndreas Färber1-3/+5
Note that target-alpha accesses this field from TCG, now using a negative offset. Therefore the field is placed last in CPUState. Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change. Move common parts of mips cpu_state_reset() to mips_cpu_reset(). Acked-by: Richard Henderson <rth@twiddle.net> (for alpha) [AF: Rebased onto ppc CPU subclasses and openpic changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-10Make all static TypeInfos constAndreas Färber1-1/+1
Since 39bffca2030950ef6efe57c2fac8327a45ae1015 (qdev: register all types natively through QEMU Object Model), TypeInfo as used in the common, non-iterative pattern is no longer amended with information and should therefore be const. Fix the documented QOM examples: sed -i 's/static TypeInfo/static const TypeInfo/g' include/qom/object.h Since frequently the wrong examples are being copied by contributors of new devices, fix all types in the tree: sed -i 's/^static TypeInfo/static const TypeInfo/g' */*.c sed -i 's/^static TypeInfo/static const TypeInfo/g' */*/*.c This also avoids to piggy-back these changes onto real functional changes or other refactorings. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-12-19softmmu: move include files to include/sysemu/Paolo Bonzini1-2/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-31cpus: Pass CPUState to run_on_cpu()Andreas Färber1-1/+1
CPUArchState is no longer needed. Move the declaration to include/qemu/cpu.h and add documentation. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31cpus: Pass CPUState to qemu_cpu_kick()Andreas Färber1-1/+1
CPUArchState is no longer needed there. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31cpu: Move stopped field to CPUStateAndreas Färber1-1/+2
Change its type to bool. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31ppce500_spin: Store PowerPCCPU in SpinKickAndreas Färber1-3/+3
Needed for moving stopped field to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity1-8/+8
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-07-21Use macro QEMU_PACKED for new packed structuresStefan Weil1-1/+1
Since commit 541dc0d47f10973c241e9955afc2aefc96adec51, some new packed structures were added without using QEMU_PACKED. QEMU_PACKED is needed for compilations with MinGW. For other platforms nothing changes. The code was fixed using this command: git grep -la '__attribute__ ((packed))'|xargs perl -pi -e 's/__attribute__ \(\(packed\)\)/QEMU_PACKED/' Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-05-01ppce500_spin: Replace assert by hw_error (fixes compiler warning)Stefan Weil1-1/+1
The default case in function spin_read should never be reached, therefore the old code used assert(0) to abort QEMU. This does not work when QEMU is compiled with macro NDEBUG defined. In this case (and also when the compiler does not know that assert never returns), there is a compiler warning because of the missing return value. Using hw_error allows an improved error message and aborts always. Signed-off-by: Stefan Weil <sw@weilnetz.de> [agraf: use __func__] Signed-off-by: Alexander Graf <agraf@suse.de>
2012-05-01booke:Use MMU API for creating initial mapping for secondary cpusBharat Bhushan1-0/+1
Initial Mapping creation for secondary CPU in SMP was missing new MMU API. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-03-15ppc: Add missing 'static' to spin_rw_opsStefan Weil1-1/+1
spin_rw_ops is only used in hw/ppce500_spin.c. Signed-off-by: Stefan Weil <sw@weilnetz.de> Acked-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-03-14ppc hw/: Don't use CPUStateAndreas Färber1-4/+4
Scripted conversion: for file in hw/ppc*.[hc] hw/mpc8544_guts.c hw/spapr*.[hc] hw/virtex_ml507.c hw/xics.c; do sed -i "s/CPUState/CPUPPCState/g" $file done Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-15qom: Unify type registrationAndreas Färber1-2/+3
Replace device_init() with generalized type_init(). While at it, unify naming convention: type_init([$prefix_]register_types) Also, type_init() is a function, so add preceding blank line where necessary and don't put a semicolon after the closing brace. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Cc: malc <av1474@comtv.ru> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03qdev: register all types natively through QEMU Object ModelAnthony Liguori1-5/+6
This was done in a mostly automated fashion. I did it in three steps and then rebased it into a single step which avoids repeatedly touching every file in the tree. The first step was a sed-based addition of the parent type to the subclass registration functions. The second step was another sed-based removal of subclass registration functions while also adding virtual functions from the base class into a class_init function as appropriate. Finally, a python script was used to convert the DeviceInfo structures and qdev_register_subclass functions to TypeInfo structures, class_init functions, and type_register_static calls. We are almost fully converted to QOM after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27sysbus: apic: ioapic: convert to QEMU Object ModelAnthony Liguori1-4/+11
This converts three devices because apic and ioapic are subclasses of sysbus. Converting subclasses independently of their base class is prohibitively hard. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-03kvm-ppc: halt secondary cpus when guest resetLiu Yu-B132011-0/+1
When guest reset, we need to halt secondary cpus until guest kick them. This already works for tcg. The patch add the support for kvm. Signed-off-by: Liu Yu <yu.liu@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de> [agraf: remove in-kernel irqchip code]
2011-11-28sysbus: rename sysbus_init_mmio_region() to sysbus_init_mmio()Avi Kivity1-1/+1
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-10-06PPC: E500: Add PV spinning codeAlexander Graf1-0/+215
CPUs that are not the boot CPU need to run in spinning code to check if they should run off to execute and if so where to jump to. This usually happens by leaving secondary CPUs looping and checking if some variable in memory changed. In an environment like Qemu however we can be more clever. We can just export the spin table the primary CPU modifies as MMIO region that would event based wake up the respective secondary CPUs. That saves us quite some cycles while the secondary CPUs are not up yet. So this patch adds a PV device that simply exports the spinning table into the guest and thus allows the primary CPU to wake up secondary ones. Signed-off-by: Alexander Graf <agraf@suse.de> --- v1 -> v2: - change into MMIO scheme - map the secondary NIP instead of 0 1:1 - only map 64MB for TLB, same as u-boot - prepare code for 64-bit spinnings v2 -> v3: - remove r6 - set MAS2_M - map EA 0 - use second TLB1 entry v3 -> v4: - change to memoryops v4 -> v5: - fix endianness bugs v5 -> v6: - add header
generated by cgit v1.1 at 2024-11-03 05:26:09 +0000