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path: root/hw/ppc/pnv_core.c
AgeCommit message (Expand)AuthorFilesLines
2024-07-26ppc/pnv: Add an LPAR per core machine optionNicholas Piggin1-0/+8
2024-07-26ppc/pnv: Implement POWER10 PC xscom registers for direct controlsNicholas Piggin1-5/+84
2024-07-26ppc/pnv: Add POWER10 ChipTOD quirk for big-coreNicholas Piggin1-0/+2
2024-07-26ppc/pnv: Implement big-core PVR for Power9/10Nicholas Piggin1-0/+4
2024-07-26ppc/pnv: Add a big-core mode that joins two regular coresNicholas Piggin1-1/+7
2024-07-26ppc: Add has_smt_siblings property to CPUPPCStateNicholas Piggin1-0/+3
2024-07-26ppc: Add a core_index to CPUPPCState for SMT vCPUsNicholas Piggin1-0/+2
2024-07-26ppc/pnv: Extend chip_pir class method to TIR as wellNicholas Piggin1-4/+6
2024-07-26ppc/pnv: Add pointer from PnvCPUState to PnvCoreNicholas Piggin1-0/+3
2024-03-13ppc/pnv: Improve pervasive topology calculation for big-coreCaleb Schlossin1-4/+4
2023-09-06hw/ppc: Reset timebase facilities on machine resetNicholas Piggin1-0/+2
2023-07-07ppc/pnv: Add QME region for P10Joel Stanley1-2/+76
2023-07-07ppc/pnv: Set P10 core xscom region size to match hardwareNicholas Piggin1-2/+4
2023-07-07ppc/pnv: Log all unimp warnings with similar messageJoel Stanley1-16/+18
2023-07-07ppc/pnv: SMT support for powernvNicholas Piggin1-8/+5
2023-07-07ppc/pnv: Return zero for core thread state xscomJoel Stanley1-0/+10
2023-07-07ppc/pnv: Add P10 core xscom modelJoel Stanley1-2/+42
2023-07-07ppc/pnv: Add P10 quad xscom modelJoel Stanley1-0/+54
2023-07-07ppc/pnv: Subclass quad xscom callbacksJoel Stanley1-13/+27
2023-07-07ppc/pnv: quad xscom callbacks are P9 specificJoel Stanley1-9/+10
2023-05-28target/ppc: Add POWER9 DD2.2 modelNicholas Piggin1-1/+1
2023-01-20include/hw/ppc: Split pnv_chip.h off pnv.hMarkus Armbruster1-0/+1
2022-10-28target/ppc: introduce ppc_maybe_interruptMatheus Ferst1-0/+1
2021-09-29ppc/pnv: Rename "id" to "quad-id" in PnvQuadCédric Le Goater1-2/+2
2021-08-27ppc/pnv: Change the POWER10 machine to support DD2 onlyCédric Le Goater1-1/+1
2021-05-04hw/ppc/pnv_core: Update hflags after setting msrRichard Henderson1-1/+2
2020-11-15non-virt: Fix Lesser GPL version numberChetan Pant1-1/+1
2020-07-10error: Eliminate error_propagate() with Coccinelle, part 1Markus Armbruster1-2/+1
2020-07-10qdev: Use returned bool to check for qdev_realize() etc. failureMarkus Armbruster1-2/+1
2020-06-15qdev: Convert bus-less devices to qdev_realize() with CoccinelleMarkus Armbruster1-1/+1
2020-05-15qdev: Unrealize must not failMarkus Armbruster1-1/+1
2020-05-15qom: Drop parameter @errp of object_property_add() & friendsMarkus Armbruster1-1/+1
2020-02-02ppc/pnv: change the PowerNV machine devices to be non user creatableCédric Le Goater1-0/+2
2020-02-02ppc/pnv: Add support for "hostboot" modeCédric Le Goater1-0/+3
2020-02-02ppc/pnv: remove useless "core-pir" property alias.Cédric Le Goater1-15/+13
2020-01-24qdev: set properties with device_class_set_props()Marc-André Lureau1-2/+2
2019-12-17ppc/pnv: Introduce a POWER10 PnvChip and a powernv10 machineCédric Le Goater1-0/+10
2019-12-17ppc/pnv: Link "chip" property to PnvCore::chip pointerGreg Kurz1-8/+2
2019-11-18ppc: Add intc_destroy() handlers to SpaprInterruptController/PnvChipGreg Kurz1-3/+4
2019-10-24ppc/pnv: Fix naming of routines realizing the CPUsCédric Le Goater1-4/+4
2019-10-24ppc: Reset the interrupt presenter from the CPU reset handlerCédric Le Goater1-2/+5
2019-10-24ppc/pnv: Add a PnvChip pointer to PnvCoreCédric Le Goater1-1/+2
2019-10-24ppc/pnv: Introduce a PnvCore reset handlerCédric Le Goater1-4/+15
2019-08-16Clean up inclusion of sysemu/sysemu.hMarkus Armbruster1-1/+0
2019-08-16Include hw/qdev-properties.h lessMarkus Armbruster1-0/+1
2019-08-16Include sysemu/reset.h a lot lessMarkus Armbruster1-0/+1
2019-06-12Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster1-0/+2
2019-03-12ppc/pnv: POWER9 XSCOM quad supportCédric Le Goater1-0/+87
2019-03-12ppc/pnv: extend XSCOM core support for POWER9Cédric Le Goater1-13/+87
2019-03-12ppc/pnv: change the CPU machine_data presenter type to Object *Cédric Le Goater1-1/+1
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