aboutsummaryrefslogtreecommitdiff
path: root/hw/pci.c
AgeCommit message (Collapse)AuthorFilesLines
2012-11-26qdev: simplify (de)allocation of busesPaolo Bonzini1-1/+1
All conditional deallocation can now be done with object_delete. Remove the @qom_allocated and @glib_allocated fields; replace the latter with a direct assignment of the @free function pointer. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-11-16fix live migrationGerd Hoffmann1-0/+4
Commit 1c380f9460522f32c8dd2577b2a53d518ec91c6d breaks live migration. DMA stops working for ehci (and probably for any pci device) after restoring the guest because the bus master region never gets enabled. Add code doing that after loading the pci config space from vmstate. Cc: Avi Kivity <avi@redhat.com> Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-10-29pci: Add class 0xc05 as 'SMBus'Jan Kiszka1-0/+1
[jbaron@redhat.com: add PCI_CLASS_SERIAL_SMBUS definition] Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29pci: introduce pci_swizzle_map_irq_fn() for standardized interrupt pin swizzleIsaku Yamahata1-0/+18
Introduce pci_swizzle_map_irq_fn() for interrupt pin swizzle which is standardized. PCI bridge swizzle is common logic, by introducing this function duplicated swizzle logic will be avoided later. [jbaron@redhat.com: drop opaque argument] Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29pci: pci capability must be in PCI spaceIsaku Yamahata1-3/+3
pci capability must be in PCI space. It can't lay in PCIe extended config space. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29pci: make each capability DWORD alignedMichael S. Tsirkin1-2/+2
PCI spec (see e.g. 6.7 Capabilities List in spec rev 3.0) requires that each capability is DWORD aligned. Ensure this when allocating space by rounding size up to 4. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29pci: Return PCI_INTX_DISABLED when no bus INTx routing supportAlex Williamson1-1/+7
Rather than assert, simply return PCI_INTX_DISABLED when we don't have a pci_route_irq_fn. PIIX already returns DISABLED for an invalid pin, so users already deal with this state. Users of this interface should only be acting on an ENABLED or INVERTED return value (though we really have no support for INVERTED). Also complain loudly when we hit this so we don't forget it's missing. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-10-29pci: Helper function for testing if an INTx route changedAlex Williamson1-0/+5
Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity1-1/+1
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-10-22pci: honor PCI_COMMAND_MASTERAvi Kivity1-2/+11
Currently we ignore PCI_COMMAND_MASTER completely: DMA succeeds even when the bit is clear. Honor PCI_COMMAND_MASTER by inserting a memory region into the device's bus master address space, and tying its enable status to PCI_COMMAND_MASTER. Tested using setpci -s 03 COMMAND=3 while a ping was running on a NIC in slot 3. The kernel (Linux) detected the stall and recovered after the command setpci -s 03 COMMAND=7 was issued. Signed-off-by: Avi Kivity <avi@redhat.com>
2012-10-22pci: give each device its own address spaceAvi Kivity1-0/+14
Accesses from different devices can resolve differently (depending on bridge settings, iommus, and PCI_COMMAND_MASTER), so set up an address space for each device. Currently iommus are expressed outside the memory API, so this doesn't work if an iommu is present. Signed-off-by: Avi Kivity <avi@redhat.com>
2012-10-06pci: add a pci_vga_init() functionAurelien Jarno1-0/+18
This function create a PCI VGA device according to the value of vga_interface_type. It returns a PCIDevice (and not a DeviceState). Cc: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-05scsi, pci, qdev, isa-bus, sysbus: don't let *_get_fw_dev_path return NULLJim Meyering1-1/+1
Use g_strdup rather than strdup, because the sole caller (qdev_get_fw_dev_path_helper) assumes it gets non-NULL, and dereferences it. Besides, in that caller, the allocated buffer is already freed with g_free, so it's better to allocate with a matching g_strdup. In one case, (scsi-bus.c) it was trivial, so I replaced an snprintf+ g_strdup combination with an equivalent g_strdup_printf use. Signed-off-by: Jim Meyering <meyering@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-07pcie: drop version_id field for live migrationJason Baron1-1/+1
While testing q35 live migration, I found that the migration would abort with the following error: "Unknown savevm section type 76". The error is due to this check failing in 'vmstate_load_state()': while(field->name) { if ((field->field_exists && field->field_exists(opaque, version_id)) || (!field->field_exists && field->version_id <= version_id)) { The VMSTATE_PCIE_DEVICE() currently has a 'version_id' set to 2. However, 'version_id' in the above check is 1. And thus we fail to load the pcie device field. Further the code returns to 'qemu_loadvm_state()' which produces the error that I saw. I'm proposing to fix this by simply dropping the 'version_id' field from VMSTATE_PCIE_DEVICE(). VMSTATE_PCI_DEVICE() defines no such field and further the vmstate_pcie_device that VMSTATE_PCI_DEVICE() refers to is already versioned. Thus, any versioning issues could be detected at the vmsd level. Taking a step back, I think that the 'field->version_id' should be compared against a saved version number for the field not the 'version_id'. Futhermore, once vmstate_load_state() is called recursively on another vmsd, the check of: if (version_id > vmsd->version_id) { return -EINVAL; } Will never fail since version_id is always equal to vmsd->version_id. So I'm wondering why we aren't storing the vmsd version id of the source in the migration stream? This patch also renames the 'name' field of vmstate_pcie_device from: PCIDevice -> PCIEDevice to differentiate it from vmstate_pci_device. Signed-off-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-07-29Merge branch pci into masterMichael S. Tsirkin1-6/+48
Merge master and pci branch, resolve build breakage in hw/esp.c introduced by f90c2bcd. Conflicts: hw/esp.c
2012-07-19pci: Add INTx routing notifierJan Kiszka1-0/+23
This per-device notifier shall be triggered by any interrupt router along the path of a device's legacy interrupt signal on routing changes. For simplicity reasons and as this is a slow path anyway, no further details on the routing changes are provided. Instead, the callback is expected to use pci_device_route_intx_to_irq to check the effect of the change. Will be used by KVM PCI device assignment and VFIO. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-07-19pci: Add pci_device_route_intx_to_irqMichael S. Tsirkin1-0/+20
Device assigned on KVM needs to know the mode (enabled/inverted/disabled) and the IRQ number that a given device triggers in the attached interrupt controller. Add a PCI IRQ path discovery function that walks from a given device to the host bridge, and gets this information. For this purpose, a host bridge callback function is introduced: route_intx_to_irq. It is so far only implemented by the PIIX3, other host bridges can be added later on as required. Will be used for KVM PCI device assignment and VFIO. Based on patch by Jan Kiszka, with minor tweaks. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-07-04pci: Unregister BARs before device exitAlex Williamson1-2/+3
BARs are registered in init functions from memory regions created by the drivers. Exit functions destroy those memory regions. By unregistering the io regions after exit(), we're calling memory_region_del_subregion on freed memory. Don't do that. The option rom comes along for the ride because it's more symmetric to how it's created. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-07-04pci: convert PCIUnregisterFunc to voidAlex Williamson1-5/+3
Not a single driver has any possibility of failure on their exit function, let's keep it that way. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-06-27iommu: Allow PCI to use IOMMU infrastructureDavid Gibson1-0/+9
This patch adds some hooks to let PCI devices and busses use the new IOMMU infrastructure. When IOMMU support is enabled, each PCI device now contains a DMAContext * which is used by the pci_dma_*() wrapper functions. By default, the contexts are initialized to NULL, assuming no IOMMU. However the platform or host bridge code which sets up the PCI bus can use pci_setup_iommu() to set a function which will determine the correct DMAContext for a given PCI device. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Richard Henderson <rth@twiddle.net> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-21pci.c: Add opaque argument to pci_for_each_device.Anthony PERARD1-4/+7
The purpose is to have a more generic pci_for_each_device by passing an extra argument to the function called on every device. This patch will be used in a next patch. Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2012-06-18Merge remote-tracking branch 'afaerber-or/qom-next-2' into stagingAnthony Liguori1-20/+31
* afaerber-or/qom-next-2: (22 commits) qom: Push error reporting to object_property_find() qdev: Remove qdev_prop_exists() qbus: Initialize in standard way qbus: Make child devices links qdev: Connect busses with their parent devices qdev: Convert busses to QEMU Object Model qdev: Move SysBus initialization to sysbus.c qdev: Use wrapper for qdev_get_path qdev: Remove qdev_prop_set_defaults qdev: Clean up global properties qdev: Move bus properties to abstract superclasses qdev: Move bus properties to a separate global qdev: Push "type" property up to Object arm_l2x0: Rename "type" property to "cache-type" m48t59: Rename "type" property to "model" qom: Assert that public types have a non-NULL parent field qom: Drop type_register_static_alias() macro qom: Make Object a type qom: Add class_base_init qom: Add object_child_foreach() ...
2012-06-18Merge remote-tracking branch 'mst/tags/for_anthony' into stagingAnthony Liguori1-0/+8
* mst/tags/for_anthony: pci_bridge_dev: fix error path in pci_bridge_dev_initfn() qdev: release parent properties on dc->init failure msi: Use msi/msix_present more consistently msi: Invoke msi/msix_write_config from PCI core msi: Guard msi/msix_write_config with msi_present msi: Invoke msi/msix_reset from PCI core msi: Guard msi_reset with msi_present ahci: Clean up reset functions intel-hda: Fix reset of MSI function ahci: Fix reset of MSI function rtl8139: honor RxOverflow flag in can_receive method shpc: unparent device before free
2012-06-18qdev: Convert busses to QEMU Object ModelAnthony Liguori1-10/+19
This is far less interesting than it sounds. We simply add an Object to each BusState and then register the types appropriately. Most of the interesting refactoring will follow in the next patches. Since we're changing fundamental type names (BusInfo -> BusClass), it all needs to convert at once. Fortunately, not a lot of code is affected. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> [AF: Made all new bus TypeInfos static const.] [AF: Made qbus_free() call object_delete(), required {qom,glib}_allocated] Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18qdev: Move bus properties to abstract superclassesPaolo Bonzini1-1/+1
In qdev, each bus in practice identified an abstract superclass, but this was mostly hidden. In QOM, instead, these abstract classes are explicit so we can move bus properties there. All bus property walks are removed, and all device property walks are changed to look along the class hierarchy instead. We would have duplicates if class A defines some properties and its subclass B does not define any, because class_b->props will be left equal to class_a->props. The solution here is to reintroduce the class_base_init TypeInfo callback, that was present in one of the early QOM versions but removed (on my request...) before committing. This breaks global bus properties, an obscure feature when used with the command-line which is actually useful and used when used by backwards-compatible machine types. So this patch also adjusts the global bus properties in hw/pc_piix.c to refer to the abstract class. Globals and other properties must be modified in the same patch to avoid complications related to initialization ordering. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18qdev: Move bus properties to a separate globalPaolo Bonzini1-10/+12
Simple code movement in order to simplify future refactoring. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-08qdev: Use int32_t container for devfn propertyMichael Roth1-1/+1
Valid range for devfn is -1 to 255 (-1 for automatic assignment). We do not currently validate this due to devfn being stored as a uint32_t. This can lead to segfaults and other strange behavior. We could technically just cast it to int32_t to implement the checking, but this will not work for visitor-based setting where we may do additional bounds-checking based on target container type, which is int32_t for this case. Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-07msi: Invoke msi/msix_write_config from PCI coreJan Kiszka1-0/+3
Also this functions is better invoked by the core than by each and every device. This allows to drop the config_write callbacks from ich and intel-hda. CC: Alexander Graf <agraf@suse.de> CC: Gerd Hoffmann <kraxel@redhat.com> CC: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-06-07msi: Invoke msi/msix_reset from PCI coreJan Kiszka1-0/+5
There is no point in pushing this burden to the devices, they tend to forget to call them (like intel-hda, ahci, xhci did). Instead, reset functions are now called from pci_device_reset. They do nothing if MSI/MSI-X is not in use. CC: Alexander Graf <agraf@suse.de> CC: Gerd Hoffmann <kraxel@redhat.com> CC: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-05-29pci: call object_unparent() before free_qdev()Amos Kong1-1/+0
Start VM with 8 multiple-function block devs, hot-removing those block devs by 'device_del ...' would cause qemu abort. | (qemu) device_del virti0-0-0 | (qemu) ** |ERROR:qom/object.c:389:object_delete: assertion failed: (obj->ref == 0) It's a regression introduced by commit 57c9fafe The whole PCI slot should be removed once. Currently only one func is cleaned in pci_unplug_device(), if you try to remove a single func by monitor cmd. free_qdev() are called for all functions in slot, but unparent_delete() is only called for one function. Signed-off-by: XXXX Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-04-10Merge commit 'ff71f2e8cacefae99179993204172bc65e4303df' into stagingAnthony Liguori1-14/+14
* commit 'ff71f2e8cacefae99179993204172bc65e4303df': (21 commits) rtl8139: do the network/host communication only in normal operating mode rtl8139: correctly check the opmode net: move compute_mcast_idx() to net.h rtl8139: support byte read to TxStatus registers rtl8139: remove unused marco rtl8139: limit transmission buffer size in c+ mode pci_regs: Add PCI_EXP_TYPE_PCIE_BRIDGE virtio-net: add DATA_VALID flag pci_bridge: upper 32 bit are long registers pci: fix bridge IO/BASE pcie: drop functionality moved to core pci: set memory type for memory behind the bridge pci: add standard bridge device slotid: add slot id capability shpc: standard hot plug controller pci_bridge: user-friendly default bus name pci: make another unused extern function static pci: don't export an internal function pci_regs: Fix value of PCI_EXP_TYPE_RC_EC. pci: Do not check if a bus exist in pci_parse_devaddr. ...
2012-03-16pci: fix double free of romfile propertyAnthony Liguori1-1/+0
The qdev property release function frees any string properties. This was resulting in a double free during hot unplug. It manifests in network devices because block devices have a NULL romfile property by default. Cc: Michael Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-16pci: fix bridge IO/BASEMichael S. Tsirkin1-2/+2
commit 5caef97a16010f818ea8b950e2ee24ba876643ad introduced a regression: we do not make IO base/limit upper 16 bit registers writeable, so we should report a 16 bit IO range type, not a 32 bit one. Note that PCI_PREF_RANGE_TYPE_32 is 0x0, but PCI_IO_RANGE_TYPE_32 is 0x1. In particular, this broke sparc64. Note: this just reverts to behaviour prior to the commit above. Making PCI_IO_BASE_UPPER16 and PCI_IO_LIMIT_UPPER16 registers writeable should, and seems to, work just as well, but as no system seems to actually be interested in 32 bit IO, let's not make unnecessary changes. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-16pci: set memory type for memory behind the bridgeMichael S. Tsirkin1-0/+3
As we make upper bits in IO and prefetcheable memory registers writeable, we should declare support for 64 bit prefetcheable memory and 32 bit io in the bridge. This changes the default for apb, dec, but I'm guessing they got the defaults wrong by accident. Alternatively, we could let bridges declare lack of 64 bit support and make the upper bits read-only zero. Reported-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-15pci: make another unused extern function staticMichael S. Tsirkin1-7/+8
Make pci_find_bus static and rename to pci_find_bus_nr to match functionality. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-15pci: don't export an internal functionMichael S. Tsirkin1-1/+1
Make an internal function, pci_parse_devaddr, static. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-03-15pci: Do not check if a bus exist in pci_parse_devaddr.Anthony PERARD1-4/+0
Actually, pci_parse_devaddr checks if the dom/bus of the PCI address exist. But this should be the jobs of a caller. In fact, the two callers of this function will try to retrieve the PCIBus related to the devaddr and return an error if they cannot. Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-02-22pci: set memory type for memory behind the bridgeMichael S. Tsirkin1-2/+13
As we make upper bits in IO and prefetcheable memory registers writeable, we should declare support for 64 bit prefetcheable memory and 32 bit io in the bridge. This changes the default for apb, dec, but I'm guessing they got the defaults wrong by accident. Alternatively, we could let bridges declare lack of 64 bit support and make the upper bits read-only zero. With this applied, we can drop these bits from express code. Reported-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Could someone familiar with apb,dec ack this please? Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-15qom: Unify type registrationAndreas Färber1-2/+2
Replace device_init() with generalized type_init(). While at it, unify naming convention: type_init([$prefix_]register_types) Also, type_init() is a function, so add preceding blank line where necessary and don't put a semicolon after the closing brace. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Cc: malc <av1474@comtv.ru> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03qom: move properties from qdev to objectAnthony Liguori1-0/+1
This is mostly code movement although not entirely. This makes properties part of the Object base class which means that we can now start using Object in a meaningful way outside of qdev. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03qdev: kill off DeviceInfoAnthony Liguori1-1/+1
It is no longer used in the tree since everything is done natively through QEMU Object Model. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03qdev: register all types natively through QEMU Object ModelAnthony Liguori1-11/+10
This was done in a mostly automated fashion. I did it in three steps and then rebased it into a single step which avoids repeatedly touching every file in the tree. The first step was a sed-based addition of the parent type to the subclass registration functions. The second step was another sed-based removal of subclass registration functions while also adding virtual functions from the base class into a class_init function as appropriate. Finally, a python script was used to convert the DeviceInfo structures and qdev_register_subclass functions to TypeInfo structures, class_init functions, and type_register_static calls. We are almost fully converted to QOM after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03qdev: remove info from classAnthony Liguori1-1/+3
Now DeviceInfo is no longer used after object construction. All of the relevant members have been moved to DeviceClass. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03qdev: make DeviceInfo privateAnthony Liguori1-5/+8
Introduce accessors and remove any code that directly accesses DeviceInfo members. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27pci: convert to QEMU Object ModelAnthony Liguori1-69/+54
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27qdev: don't access name through infoAnthony Liguori1-3/+3
We already have a QOM interface for this so let's use it. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27qdev: move qdev->info to classAnthony Liguori1-7/+9
Right now, DeviceInfo acts as the class for qdev. In order to switch to a proper ObjectClass derivative, we need to ween all of the callers off of interacting directly with the info pointer. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27pci: call reset unconditionallyAnthony Liguori1-5/+2
Because now all PCI devices are converted to qdev. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-22vga: improve VGA logicBlue Swirl1-20/+0
Improve VGA selection logic, push check for device availabilty to vl.c. Create the devices at board level unconditionally. Remove now unused pci_try_create*() functions. Make PCI VGA devices optional. Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-01-04vmstate, memory: decouple vmstate from memory APIAvi Kivity1-1/+3
Currently creating a memory region automatically registers it for live migration. This differs from other state (which is enumerated in a VMStateDescription structure) and ties the live migration code into the memory core. Decouple the two by introducing a separate API, vmstate_register_ram(), for registering a RAM block for migration. Currently the same implementation is reused, but later it can be moved into a separate list, and registrations can be moved to VMStateDescription blocks. Signed-off-by: Avi Kivity <avi@redhat.com>
generated by cgit v1.1 at 2024-11-02 23:53:30 +0000