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path: root/hw/pci-bridge
AgeCommit message (Expand)AuthorFilesLines
2022-11-07hw/pci-bridge/cxl-upstream: Add a CDAT table access DOEJonathan Cameron1-1/+194
2022-06-16pci-bridge/cxl_downstream: Add a CXL switch downstream portJonathan Cameron2-1/+250
2022-06-16pci-bridge/cxl_upstream: Add a CXL switch upstream portJonathan Cameron2-1/+217
2022-06-09pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup.Jonathan Cameron3-13/+38
2022-06-09hw/cxl: Make the CXL fixed memory window setup a machine parameter.Jonathan Cameron1-1/+1
2022-05-13CXL/cxl_component: Add cxl_get_hb_cstate()Jonathan Cameron1-0/+7
2022-05-13acpi/cxl: Create the CEDT (9.14.1)Ben Widawsky1-17/+0
2022-05-13hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142)Ben Widawsky1-7/+59
2022-05-13hw/cxl/rp: Add a root portBen Widawsky4-1/+247
2022-05-13hw/pxb: Allow creation of a CXL PXB (host bridge)Ben Widawsky1-2/+84
2022-05-13hw/pci/cxl: Create a CXL bus typeBen Widawsky1-1/+8
2022-05-13hw/pxb: Use a type for realizing expandersBen Widawsky1-4/+7
2022-03-06pci: expose TYPE_XIO3130_DOWNSTREAM nameIgor Mammedov1-1/+2
2022-03-06pci-bridge/xio3130_downstream: Fix error handlingJonathan Cameron1-1/+1
2022-03-06pci-bridge/xio3130_upstream: Fix error handlingJonathan Cameron1-1/+1
2022-03-06hw/pci-bridge/pxb: Fix missing swizzleJonathan Cameron1-0/+6
2021-10-15qdev: Make DeviceState.id independent of QemuOptsKevin Wolf1-1/+1
2021-08-03hw/pcie-root-port: Fix hotplug for PCI devices requiring IOMarcel Apfelbaum1-0/+5
2021-07-16hw/pxb: Add a bypass iommu propertyXingang Wang1-0/+3
2021-01-17Kconfig: Compile PXB for ARM_VIRTJiahui Cen1-1/+1
2020-12-18qdev: Move softmmu properties to qdev-properties-system.hEduardo Habkost1-0/+1
2020-11-15nomaintainer: Fix Lesser GPL version numberChetan Pant1-1/+1
2020-09-18Use OBJECT_DECLARE_SIMPLE_TYPE when possibleEduardo Habkost4-12/+4
2020-09-09Use DECLARE_*CHECKER* macrosEduardo Habkost5-11/+16
2020-09-09Move QOM typedefs and add missing includesEduardo Habkost5-11/+21
2020-08-21meson: convert hw/pci-bridgeMarc-André Lureau2-10/+14
2020-06-15sysbus: Convert to sysbus_realize() etc. with CoccinelleMarkus Armbruster1-1/+1
2020-06-15pci: Convert uses of pci_create() etc. with CoccinelleMarkus Armbruster1-3/+3
2020-06-15qdev: Convert uses of qdev_create() manuallyMarkus Armbruster1-2/+2
2020-06-15qdev: Convert uses of qdev_create() with CoccinelleMarkus Armbruster1-2/+2
2020-05-27hw/pci-bridge/dec: Remove dead debug codePhilippe Mathieu-Daudé1-10/+0
2020-03-08pcie_root_port: Add hotplug disabling optionJulia Suvorova2-2/+2
2020-01-24qdev: set properties with device_class_set_props()Marc-André Lureau6-7/+7
2019-09-03numa: move numa global variable nb_numa_nodes into MachineStateTao Xu1-1/+8
2019-08-16Include hw/qdev-properties.h lessMarkus Armbruster6-0/+6
2019-08-16Include migration/vmstate.h lessMarkus Armbruster5-0/+5
2019-07-30pcie_root_port: Allow ACS to be disabledDr. David Alan Gilbert1-1/+2
2019-07-12xio3130_downstream: typo fixMichael S. Tsirkin1-1/+1
2019-07-01pcie: check that slt ctrl changed before deletingMichael S. Tsirkin2-2/+8
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster1-1/+0
2019-06-12Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster11-0/+11
2019-05-29pci: Make is_bridge a boolDavid Gibson8-9/+9
2019-05-20pci: Simplify pci_bus_is_root()David Gibson1-6/+0
2019-03-18kconfig: add dependencies on CONFIG_MSI_NONBROKENPaolo Bonzini1-3/+3
2019-03-12gen_pcie_root_port: Add ACS (Access Control Services) capabilityKnut Omang2-0/+8
2019-03-07i386-softmmu.mak: remove all CONFIG_* except boards definitionsYang Zhong1-0/+1
2019-03-07build: convert pci.mak to KconfigPaolo Bonzini1-0/+8
2019-03-07kconfig: introduce kconfig filesPaolo Bonzini1-0/+20
2018-12-20pci/shpc: perform unplug via the hotplug handlerDavid Hildenbrand2-0/+11
2018-12-20pci: Reuse pci-bridge hotplug handler handlers for pcie-pci-bridgeDavid Hildenbrand2-34/+8
generated by cgit v1.1 at 2024-12-27 14:49:34 +0000