riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Collapse)	Author	Files	Lines
2013-08-21	hw/openrisc: Avoid undefined shift in openrisc_pic_cpu_handler()	Jia Liu	1	-1/+3
	In C99 signed shift (1 << 31) is undefined behavior, since the result exceeds INT_MAX. Use 1U instead and move the shift after the check. Signed-off-by: Xi Wang <xi.wang@gmail.com> Acked-by: Jia Liu <proljc@gmail.com>
2013-08-21	hw/openrisc: Fix masking in openrisc_pic_cpu_handler()	Jia Liu	1	-8/+5
	Consider the masking of PICSR and PICMR: ((cpu->env.picsr && (1 << i)) && (cpu->env.picmr && (1 << i))) To correctly mask bits, we should use the bitwise AND "&" rather than the logical AND "&&". Also, the loop is not necessary for masking. Simply use (cpu->env.picsr & cpu->env.picmr). Signed-off-by: Xi Wang <xi.wang@gmail.com> Acked-by: Jia Liu <proljc@gmail.com>
2013-03-12	cpu: Pass CPUState to cpu_interrupt()	Andreas Färber	1	-1/+1
	Move it to qom/cpu.h to avoid issues with include order. Change pc_acpi_smi_interrupt() opaque to X86CPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-12	exec: Pass CPUState to cpu_reset_interrupt()	Andreas Färber	1	-1/+2
	Move it to qom/cpu.c to avoid build failures depending on include order of cpu-qom.h and exec/cpu-all.h. Change opaques of various ..._irq_handler() functions to the appropriate CPU type to facilitate using cpu_reset_interrupt(). Fix Coding Style issues while at it (missing braces, indentation). Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-01	hw: move boards and other isolated files to hw/ARCH	Paolo Bonzini	1	-0/+60
	Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>