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2016-10-04cadence_gem: Fix priority queue out of bounds accessAlistair Francis1-18/+4
There was an error with some of the register implementation assuming there are 16 priority queues supported when the IP only supports 8. This patch corrects the registers to only support 8 queues. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reported-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 33bf2d28326d22875602234b8b15cf56fb678333.1474911607.git.alistair.francis@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22cadence_gem: Correct indentationAlistair Francis1-96/+101
Fix up the indentation inside the for loop that was introduced in the previous patch. This commit is almost empty if viewed using 'git show -w', except for a few changes that were required to avoid the 80 charecter line limit. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: b40d1b12d24be9f0ac5d72f86249103e0c1c720a.1469727764.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22cadence_gem: Add queue supportAlistair Francis1-24/+107
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 28921252217b1d14f16889bafa88675f5b7a66cb.1469727764.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22cadence_gem: Add support for screeningAlistair Francis1-2/+169
The Cadence GEM hardware allows incoming data to be 'screened' based on some register values. Add support for these screens. We also need to increase the max regs to avoid compilation failures. These new registers are implemented in the next patch. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 73e69a8ad9fa2763e9f68f71eaf2469dd5744fcc.1469727764.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22cadence_gem: Add the num-priority-queues propertyAlistair Francis1-39/+55
The Cadence GEM hardware supports N number priority queues, this patch is a step towards that by adding the property to set the queues. At the moment behaviour doesn't change as we only use queue 0. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 6543ec0d0c4bfd2678d0ed683efb197e91b17733.1469727764.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22cadence_gem: QOMify Cadence GEMAlistair Francis1-11/+17
The sysbus_init_irq() call will eventually depend on a property so it needs to be in the realize function. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 486595809cf416d18a750aafbcfa1c81d7160c59.1469727764.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-19qapi: Change Netdev into a flat unionEric Blake1-1/+1
This is a mostly-mechanical conversion that creates a new flat union 'Netdev' QAPI type that covers all the branches of the former 'NetClientOptions' simple union, where the branches are now listed in a new 'NetClientDriver' enum rather than generated from the simple union. The existence of a flat union has no change to the command line syntax accepted for new code, and will make it possible for a future patch to switch the QMP command to parse a boxed union for no change to valid QMP; but it does have some ripple effect on the C code when dealing with the new types. While making the conversion, note that the 'NetLegacy' type remains unchanged: it applies only to legacy command line options, and will not be ported to QMP, so it should remain a wrapper around a simple union; to avoid confusion, the type named 'NetClientOptions' is now gone, and we introduce 'NetLegacyOptions' in its place. Then, in the C code, we convert from NetLegacy to Netdev as soon as possible, so that the bulk of the net stack only has to deal with one QAPI type, not two. Note that since the old legacy code always rejected 'hubport', we can just omit that branch from the new 'NetLegacyOptions' simple union. Based on an idea originally by Zoltán Kővágó <DirtY.iCE.hu@gmail.com>: Message-Id: <01a527fbf1a5de880091f98cf011616a78adeeee.1441627176.git.DirtY.iCE.hu@gmail.com> although the sed script in that patch no longer applies due to other changes in the tree since then, and I also did some manual cleanups (such as fixing whitespace to keep checkpatch happy). Signed-off-by: Eric Blake <eblake@redhat.com> Message-Id: <1468468228-27827-13-git-send-email-eblake@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> [Fixup from Eric squashed in] Signed-off-by: Markus Armbruster <armbru@redhat.com>
2016-06-27cadence_gem: Set the last bit when wrap is setAlistair Francis1-0/+6
The Cadence GEM data sheet says: "Wrap - marks last descriptor in transmit buffer descriptor list. This can be set for any buffer within the frame." which seems to imply that when the wrap bit is set so is the last bit. Previously if the wrap bit is set, but the last is not then QEMU will enter an infinite loop. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reported-by: Li Qiang <liqiang6-s@360.cn> Reported-by: P J P <ppandit@redhat.com> Message-id: eb23f15c67989ea6a53609dc66568399dadf52a7.1466539342.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27cadence_gem: Avoid infinite loops with a misconfigured bufferAlistair Francis1-0/+7
A guest can write zero to the DMACFG resulting in an infinite loop when it reaches the while(bytes_to_copy) loop. To avoid this issue enforce a minimum size for the RX buffer. Hardware does not have this enforcement and relies on the guest to set a non-zero value. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reported-by: Li Qiang <liqiang6-s@360.cn> Reported-by: P J P <ppandit@redhat.com> Message-id: 84bb1c391b833275da3f573d4972920cea34c188.1466539342.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-04cadence_gem: fix buffer overflowMichael S. Tsirkin1-0/+8
gem_transmit copies a packet from guest into an tx_packet[2048] array on stack, with size limited by descriptor length set by guest. If guest is malicious and specifies a descriptor length that is too large, and should packet size exceed array size, this results in a buffer overflow. Reported-by: 刘令 <liuling-it@360.cn> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-02-04net: cadence_gem: check packet size in gem_recievePrasad J Pandit1-0/+4
While receiving packets in 'gem_receive' routine, if Frame Check Sequence(FCS) is enabled, it copies the packet into a local buffer without checking its size. Add check to validate packet length against the buffer size to avoid buffer overflow. Reported-by: Ling Liu <liuling-it@360.cn> Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-01-29arm: Clean up includesPeter Maydell1-0/+1
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1453832250-766-13-git-send-email-peter.maydell@linaro.org
2015-10-27net: cadence_gem: Set initial MAC addressSebastian Huber1-0/+6
Set initial MAC address to the one specified by the command line. Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de> Reviewed-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2015-09-08cadence_gem: Correct Marvell PHY SPCFC reset valueAlistair Francis1-1/+1
Bit 15 of the PHY Specific Status Register is reserved and should remain 0. Fix the reset value to ensure that the 15th bit is not set. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: c795069e49040ff770fe2ece19dfe1791b729e22.1441316450.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-03cadence_gem: Fix Rx buffer size field maskSai Pavan Boddu1-1/+1
This patch corrects the Rx buffer size field mask to mask bits 23 to 16 to match Xilinx UG585 documentation. Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-05-18net: cadence_gem: Split state struct and type into headerPeter Crosthwaite1-42/+1
Create a new header for Cadence GEM to allow using the device with modern SoC programming conventions. The state struct needs to be visible to embed the device in SoC containers. Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: a98b5df6440c5bff8f813a26bb53ce1cfefb4c4c.1431381507.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-05-18net: cadence_gem: Clean up variable namesPeter Crosthwaite1-35/+35
Cleanup some variable names in preparation for migrating the state struct and type cast macro to a public header. The acronym "GEM" on its own is not specific enough to be used in a more global namespace so preface with "cadence". Fix the capitalisation of "gem" in the state type while touching the typename. Also preface the GEM_MAXREG macro as this will need to migrate to public header. Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 8e2b0687b3a7b7a3fde5ba2f3bee6f3b911e84ef.1431381507.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-01-12net: remove all cleanup methods from NIC NetClientInfosPaolo Bonzini1-9/+0
All NICs have a cleanup function that, in most cases, zeroes the pointer to the NICState. In some cases, it frees data belonging to the NIC. However, this function is never called except when exiting from QEMU. It is not necessary to NULL pointers and free data here; the right place to do that would be in the device's unrealize function, after calling qemu_del_nic. Zeroing the NIC multiple times is also wrong for multiqueue devices. This cleanup function gets in the way of making the NetClientStates for the NIC hold an object_ref reference to the object, so get rid of it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-06-10net: cadence_gem: Remove &desc[0] usagesPeter Crosthwaite1-2/+2
Just use desc instead. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-06-10net: cadence_gem: Comment spelling sweepPeter Crosthwaite1-6/+6
Fix some typos in comments. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-06-10net: cadence_gem: Add Tx descriptor fetch printfPeter Crosthwaite1-0/+3
Add a debug printf for TX descriptor fetching. This is helpful to anyone needing to debug TX ring buffer traversal. It is also now consistent with the RX code which has a similar printf. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-06-10net: cadence_gem: Fix Tx descriptor updatePeter Crosthwaite1-5/+7
The local variable "desc" was being used to read-modify-write the first descriptor (of a multi-desc packet) upon packet completion. desc however continues to be used by the code as the current descriptor. Give this first desc RMW it's own local variable to avoid trampling. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-05-26net: cadence_gem: Fix top commentPeter Crosthwaite1-1/+1
To indicate Cadence GEM not Xilinx. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-05-13hw/net/cadence_gem: Remove dead codePeter Maydell1-7/+1
Commit 191946c moved the code to handle padding to minimum length from after the handling of the CRC to before it. This means that the CRC code doesn't need to cope with the possibility that the size is less than 60; remove this dead code. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
2014-05-13savevm: Remove all the unneeded version_minimum_id_old (arm)Juan Quintela1-2/+1
After commit 767adce2d, they are redundant. This way we don't assign them except when needed. Once there, there were lots of cases where the ".fields" indentation was wrong: .fields = (VMStateField []) { and .fields = (VMStateField []) { Change all the combinations to: .fields = (VMStateField[]){ The biggest problem (apart from aesthetics) was that checkpatch complained when we copy&pasted the code from one place to another. Signed-off-by: Juan Quintela <quintela@redhat.com> [PMM: fixed minor conflict, corrected commit message typos] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-05-07hw: Add missing 'static' attributesStefan Weil1-1/+1
This fixes warnings from the static code analysis (smatch). Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-04-17net: cadence_gem: Make phy respond to broadcastPeter Crosthwaite1-2/+2
Phys must respond to address 0 by specification. Implement. Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 6f4d53b04ddbfb19895bfb61a595e69f1c08859a.1396594056.git.peter.crosthwaite@xilinx.com Reviewed-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10net/cadence_gem: Don't rx packets when no rx buffer availablePeter Crosthwaite1-1/+10
Return false from can_receive() when no valid buffer descriptor is available. Ensures against mass packet droppage in some applications. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: cde00ef774e84e2586bf10fd37b542f75bf36cfb.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10net/cadence_gem: Improve can_receive debug printferyPeter Crosthwaite1-2/+10
Currently this just floods indicating that can_receive has been called by the net framework. Instead, save the result of the most recent can_receive callback as state and only print a message if the result changes (indicating some sort of actual state change in GEM). Make said debug message more meaningful as well. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 2eb74ca6a5756aea242d9f525961db95d6cfcf2c.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10net/cadence_gem: Fix register w1c logicPeter Crosthwaite1-7/+6
This write-1-clear logic was incorrect. It was always clearing w1c bits regardless of whether the written value was 1 or not. i.e. it was implementing a write-anything-to-clear strategy. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: ed905b04d3343966ded425f06aa2224bc7a35b59.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10net/cadence_gem: Fix small packet FCS strippingPeter Crosthwaite1-5/+8
The minimum packet size is 64, however this is before FCS stripping occurs. So when FCS stripping the minimum packet size is 60. Fix. Reported-by: Deepika Dhamija <deepika@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 8aac5bd737f9cf48b87f32943d7eb5939061e546.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10net/cadence_gem: Fix rx multi-fragment packetsPeter Crosthwaite1-1/+1
Bytes_to_copy was being updated before its final use where it advances the rx buffer pointer. This was causing total mayhem, where packet data for any subsequent fragments was being fetched from the wrong place. Reported-by: Deepika Dhamija <deepika@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: c2a1c65c1fd06eb274442a0fa4a6839d940e145e.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10net/cadence_gem: Add missing VMSTATE_END_OF_LISTPeter Crosthwaite1-0/+1
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 8f8c2bfb15f40fb5f0d5766aa4cd3d54c596de6a.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10net/cadence_gem: Implement SAR (de)activationPeter Crosthwaite1-4/+23
The Specific address registers can be enabled or disabled by software. QEMU was assuming they were always enabled. Implement the disable/enable feature. SARs are disabled by writing to the lower half register. They are re-enabled by then writing the upper half. Reported-by: Deepika Dhamija <deepika@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 49efd1f7450af8f980b967d3054245bae137866c.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10net/cadence_gem: Implement SAR match bit in rx descPeter Crosthwaite1-0/+2
Bit 27 of the RX buffer desc word 1 should be set when the packet was accepted due to specific address register match. Implement. This feature is absent from the Xilinx documentation (UG585) but the behaviour is tested as accurate on real hardware. Reported-by: Deepika Dhamija <deepika@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 7e3f26fc4ab244e8123efc12723e7164730abdcb.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10net/cadence_gem: Implement RX descriptor match mode flagsPeter Crosthwaite1-13/+69
The various Rx packet address matching mode flags were not being set in the rx descriptor. Implement. Reported-by: Deepika Dhamija <deepika@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 6002a24a6a8ceaa11d3009ab5392840d1c084b28.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10net/cadence_gem: Prefetch rx descriptors ASAPPeter Crosthwaite1-27/+35
The real hardware prefetches rx buffer descriptors ASAP and potentially throws relevant interrupts following the fetch even in the absence of a received packet. Reported-by: Deepika Dhamija <deepika@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 41629e35edfdb1f02f1e401f2c3d0e2e4c9e44b3.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10net/cadence_gem: simplify rx buf descriptor walkingPeter Crosthwaite1-28/+9
There was a replication of the rx descriptor address walking logic. Reorder the flow control to remove. This refactoring also obsoletes the local variables packet_desc_addr and last_desc_addr. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 2a425b457ff0b57274bf206ad2236690cd7f5909.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10net/cadence_gem: Don't assert against 0 buffer addressPeter Crosthwaite1-9/+0
This has no real hardware analog and asserting correctness of DMA addresses is not a perhiperal level problem. Delete. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: fc02417eb1874cb05e4f20531c6203c5a00110f1.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10net/cadence_gem: Update DMA rx descriptors as we process themEdgar E. Iglesias1-17/+16
We were updating the ownership bit of all descriptors if packets get split and written through several descriptors. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: d61b7847b51487118783c93765a485bc5c66d272.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10net/cadence_gem: Implement mac level loopback modePeter Crosthwaite1-1/+1
Cadence GEM has a MAC level loopback mode. Implement. Use the same basic operation as the already implemented PHY loopback. Reported-by: Deepika Dhamija <deepika@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 3a0baf1b6b2fc1be638bdf1a37408ec38988e970.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-07-29cadence_gem: QOM cast cleanupAndreas Färber1-11/+15
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-04hw/n*: pass owner to memory_region_init* functionsPaolo Bonzini1-1/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04memory: add owner argument to initialization functionsPaolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move target-independent files to subdirectoriesPaolo Bonzini1-0/+1219
This patch tackles all files that are compiled once, moving them to subdirectories of hw/. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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