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path: root/hw/net/cadence_gem.c
AgeCommit message (Expand)AuthorFilesLines
2020-09-09hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23Bin Meng1-3/+3
2020-09-09hw/net: cadence_gem: Add a new 'phy-addr' propertyBin Meng1-2/+3
2020-06-18net: cadence_gem: Fix RX address filteringTong Ho1-15/+11
2020-06-18net: cadence_gem: TX_LAST bit should be set by guestSai Pavan Boddu1-6/+0
2020-06-18net: cadence_gem: Update the reset value for interrupt mask registerSai Pavan Boddu1-0/+1
2020-06-18net: cadnece_gem: Update irq_read_clear field of designcfg_debug1 regSai Pavan Boddu1-1/+1
2020-06-18net: cadence_gem: Add support for jumbo framesSai Pavan Boddu1-5/+46
2020-06-18net: cadence_gem: Fix up code styleSai Pavan Boddu1-101/+103
2020-06-18net: cadence_gem: Move tx/rx packet buffert to CadenceGEMStateSai Pavan Boddu1-21/+17
2020-06-18net: cadence_gem: Set ISR according to queue in useSai Pavan Boddu1-10/+17
2020-06-18net: cadence_gem: Define access permission for interrupt registersSai Pavan Boddu1-0/+14
2020-06-18net: cadence_gem: Fix irq update w.r.t queueSai Pavan Boddu1-22/+3
2020-06-18net: cadence_gem: Fix the queue address update during wrap aroundSai Pavan Boddu1-4/+33
2020-06-18net: cadence_gem: Fix debug statementsSai Pavan Boddu1-14/+13
2020-05-15qom: Drop parameter @errp of object_property_add() & friendsMarkus Armbruster1-2/+1
2020-04-30net: cadence_gem: clear RX control descriptorRamon Fried1-0/+7
2020-04-30Cadence: gem: fix wraparound in 64bit descriptorsRamon Fried1-1/+8
2020-03-31hw/net: Make NetCanReceive() return a booleanPhilippe Mathieu-Daudé1-4/+4
2020-03-03hw: net: cadence_gem: Fix build errors in DB_PRINT()Bin Meng1-5/+6
2020-02-20Remove unnecessary cast when using the address_space APIPhilippe Mathieu-Daudé1-12/+9
2020-01-24qdev: set properties with device_class_set_props()Marc-André Lureau1-1/+1
2019-11-19net/cadence_gem: Set PHY autonegotiation restart statusLinus Ziegert1-4/+5
2019-08-16Include hw/qdev-properties.h lessMarkus Armbruster1-0/+1
2019-08-16Include migration/vmstate.h lessMarkus Armbruster1-0/+1
2019-08-16Include hw/irq.h a lot lessMarkus Armbruster1-0/+1
2019-06-12Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster1-0/+1
2018-11-26net: cadence_gem: Remove incorrect assert()Edgar E. Iglesias1-1/+0
2018-10-24net: cadence_gem: Announce 64bit addressing supportEdgar E. Iglesias1-1/+2
2018-10-24net: cadence_gem: Announce availability of priority queuesEdgar E. Iglesias1-1/+7
2018-10-16net: cadence_gem: Implement support for 64bit descriptor addressesEdgar E. Iglesias1-8/+39
2018-10-16net: cadence_gem: Add support for selecting the DMA MemoryRegionEdgar E. Iglesias1-22/+37
2018-10-16net: cadence_gem: Add support for extended descriptorsEdgar E. Iglesias1-18/+51
2018-10-16net: cadence_gem: Add macro with max number of descriptor wordsEdgar E. Iglesias1-2/+2
2018-10-16net: cadence_gem: Use uint32_t for 32bit descriptor wordsEdgar E. Iglesias1-21/+21
2018-10-16net: cadence_gem: Disable TSU feature bitEdgar E. Iglesias1-1/+1
2018-01-16maint: Fix macros with broken 'do/while(0); ' usageEric Blake1-1/+1
2017-04-20cadence_gem: Make the revision a propertyAlistair Francis1-1/+5
2017-04-20cadence_gem: Correct the interupt logicAlistair Francis1-5/+13
2017-04-20cadence_gem: Correct the multi-queue can rx logicAlistair Francis1-7/+10
2017-04-20cadence_gem: Read the correct queue descriptorAlistair Francis1-2/+2
2017-02-28cadence_gem: Remove unused parameter debug messageFam Zheng1-1/+1
2017-01-24hw: Fix typos found by codespellStefan Weil1-1/+1
2016-10-04cadence_gem: Fix priority queue out of bounds accessAlistair Francis1-18/+4
2016-09-22cadence_gem: Correct indentationAlistair Francis1-96/+101
2016-09-22cadence_gem: Add queue supportAlistair Francis1-24/+107
2016-09-22cadence_gem: Add support for screeningAlistair Francis1-2/+169
2016-09-22cadence_gem: Add the num-priority-queues propertyAlistair Francis1-39/+55
2016-09-22cadence_gem: QOMify Cadence GEMAlistair Francis1-11/+17
2016-07-19qapi: Change Netdev into a flat unionEric Blake1-1/+1
2016-06-27cadence_gem: Set the last bit when wrap is setAlistair Francis1-0/+6
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