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2020-04-30hw/misc/zynq_slcr: add clock generation for uartsDamien Hedde1-4/+168
2020-03-30hw/misc/allwinner-h3-dramc: enforce 64-bit multiply when calculating row mirr...Niek Linnenbank1-2/+2
2020-03-23hw/arm/bcm283x: Correct the license textPhilippe Mathieu-Daudé2-2/+6
2020-03-18Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2020-03-17' into...Peter Maydell1-4/+3
2020-03-17hw/misc/ivshmem: Use one Error * variable instead of twoMarkus Armbruster1-4/+3
2020-03-16qom/object: Use common get/set uint helpersFelipe Franciosi1-10/+3
2020-03-16misc: Replace zero-length arrays with flexible array member (automatic)Philippe Mathieu-Daudé1-1/+1
2020-03-12Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200312'...Peter Maydell7-0/+1214
2020-03-12hw/arm/allwinner-h3: add SDRAM controller deviceNiek Linnenbank3-0/+369
2020-03-12hw/arm/allwinner: add Security Identifier deviceNiek Linnenbank3-0/+173
2020-03-12hw/arm/allwinner: add CPU Configuration moduleNiek Linnenbank3-0/+288
2020-03-12hw/arm/allwinner-h3: add System Control moduleNiek Linnenbank2-0/+141
2020-03-12hw/arm/allwinner-h3: add Clock Control UnitNiek Linnenbank2-0/+243
2020-03-12q800: fix coverity warning CID 1412799Laurent Vivier1-2/+5
2020-02-25Merge branch 'exec_rw_const_v4' of https://github.com/philmd/qemu into HEADPaolo Bonzini1-1/+1
2020-02-25Merge tag 'patchew/20200219160953.13771-1-imammedo@redhat.com' of https://git...Paolo Bonzini1-19/+64
2020-02-21hw/misc/iotkit-secctl: Fix writing to 'PPC Interrupt Clear' registerPhilippe Mathieu-Daudé1-1/+1
2020-02-21aspeed/scu: Implement chip ID registerJoel Stanley1-0/+13
2020-02-21aspeed/scu: Create separate write callbacksJoel Stanley1-23/+57
2020-02-20Let cpu_[physical]_memory() calls pass a boolean 'is_write' argumentPhilippe Mathieu-Daudé1-1/+1
2020-02-19arm/aspeed: actually check RAM sizeIgor Mammedov1-19/+64
2020-02-13i.MX: Fix inverted register bits in wdt code.Roman Kapl1-1/+1
2020-01-30misc/pca9552: Add qom set and getJoel Stanley1-0/+90
2020-01-27Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell32-36/+43
2020-01-24qdev: set properties with device_class_set_props()Marc-André Lureau32-34/+34
2020-01-24pvpanic: implement crashloaded event handlingzhenwei pi1-2/+9
2020-01-23hw/misc/stm32f4xx_syscfg: Fix copy/paste errorPhilippe Mathieu-Daudé1-1/+1
2020-01-20migration: Define VMSTATE_INSTANCE_ID_ANYPeter Xu1-1/+2
2020-01-17i.MX: add an emulation for RNGCMartin Kaiser2-0/+279
2020-01-17hw/misc: Add the STM32F4xx EXTI deviceAlistair Francis4-0/+197
2020-01-17hw/misc: Add the STM32F4xx Sysconfig deviceAlistair Francis4-0/+181
2020-01-08mos6522: remove anh registerLaurent Vivier1-8/+8
2020-01-07q800: add a block backend to the PRAMLaurent Vivier1-0/+65
2020-01-07q800: fix mac_via RTC PRAM commandsLaurent Vivier2-83/+210
2020-01-06vmstate: replace DeviceState with VMStateIfMarc-André Lureau1-1/+1
2019-12-17hw/misc/ivshmem: Bury dead legacy INTx codeMarkus Armbruster1-35/+0
2019-12-16aspeed/scu: Fix W1C behaviorJoel Stanley1-5/+14
2019-12-16aspeed/sdmc: Make ast2600 default 1GJoel Stanley1-3/+3
2019-11-26mos6522: update counters when timer interrupts are offLaurent Vivier1-2/+6
2019-11-18Merge remote-tracking branch 'remotes/vivier2/tags/ppc-for-4.2-pull-request' ...Peter Maydell1-15/+52
2019-11-18mos6522: fix T1 and T2 timersLaurent Vivier1-15/+52
2019-11-05hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accessesPhilippe Mathieu-Daudé1-0/+4
2019-11-05hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registersPhilippe Mathieu-Daudé1-0/+8
2019-10-29Merge remote-tracking branch 'remotes/vivier/tags/q800-branch-pull-request' i...Peter Maydell3-0/+970
2019-10-28hw/m68k: implement ADB bus support for viaLaurent Vivier2-0/+198
2019-10-28hw/m68k: add VIA supportLaurent Vivier3-0/+772
2019-10-26Merge commit 'df84f17' into HEADPaolo Bonzini1-2/+2
2019-10-25hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensorPhilippe Mathieu-Daudé2-0/+136
2019-10-22Do not use %m in common code to print error messagesThomas Huth1-2/+2
2019-10-15hw/misc/vmcoreinfo: Add comment about reset handlerPhilippe Mathieu-Daudé1-0/+4