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path: root/hw/misc/trace-events
AgeCommit message (Expand)AuthorFilesLines
2022-08-08hw/misc/grlib_ahb_apb_pnp: Support 8 and 16 bit accessesPeter Maydell1-2/+2
2022-06-30hw/misc/aspeed: Add PECI controllerPeter Delevoryas1-0/+5
2022-06-30aspeed/scu: Add trace events for read opsCédric Le Goater1-0/+1
2022-05-08lasi: move from hw/hppa to hw/miscMark Cave-Ayland1-0/+5
2022-03-24hw: Fix misleading hexadecimal formatPhilippe Mathieu-Daudé1-2/+2
2022-03-09mos6522: add register names to register read/write trace eventsMark Cave-Ayland1-2/+2
2022-02-26aspeed/sdmc: Add trace eventsCédric Le Goater1-0/+4
2022-01-20hw/misc/aspeed_i3c.c: Introduce a dummy AST2600 I3C model.Troy Lee1-0/+6
2021-10-20mac_via: add GPIO for A/UX modeMark Cave-Ayland1-0/+1
2021-06-02docs: fix references to docs/devel/tracing.rstStefano Garzarella1-1/+1
2021-05-12Drop the deprecated lm32 targetMarkus Armbruster1-10/+0
2021-03-18Merge remote-tracking branch 'remotes/vivier/tags/q800-for-6.0-pull-request' ...Peter Maydell1-2/+2
2021-03-16mac_via: switch rtc pram trace-events to use hex rather than decimal for addr...Mark Cave-Ayland1-2/+2
2021-03-15m68k: add a system controllerLaurent Vivier1-0/+7
2021-03-12hw/misc: Add NPCM7XX MFT ModuleHao Wu1-0/+8
2021-03-11Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.0-pul...Peter Maydell1-1/+1
2021-03-09Various spelling fixesMichael Tokarev1-1/+1
2021-03-08hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU<N>_PWRCTRL register blockPeter Maydell1-0/+4
2021-01-12hw/misc: Add a PWM module for NPCM7XXHao Wu1-0/+6
2020-10-29Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201027-...Peter Maydell1-0/+9
2020-10-27hw/arm/raspi: add a skeleton implementation of the CPRMANLuc Michel1-0/+5
2020-10-27hw/misc: Add npcm7xx random number generatorHavard Skinnemoen1-0/+4
2020-10-26hw/misc/mps2-scc: Use the LED devicePhilippe Mathieu-Daudé1-1/+0
2020-10-26hw/misc/mps2-fpgaio: Use the LED devicePhilippe Mathieu-Daudé1-1/+0
2020-10-26hw/misc/led: Emit a trace event when LED intensity has changedPhilippe Mathieu-Daudé1-0/+1
2020-10-26hw/misc/led: Add a LED devicePhilippe Mathieu-Daudé1-0/+3
2020-09-14hw/misc: Add NPCM7xx Clock Controller device modelHavard Skinnemoen1-0/+4
2020-09-14hw/misc: Add NPCM7xx System Global Control Registers device modelHavard Skinnemoen1-0/+4
2020-09-09trace-events: Fix attribution of trace points to sourceMarkus Armbruster1-3/+5
2020-09-09trace-events: Delete unused trace pointsMarkus Armbruster1-1/+0
2020-07-11hw/misc: avr: Add limited support for power reduction deviceMichael Rolnik1-0/+4
2020-06-26hw/misc/pca9552: Trace GPIO change eventsPhilippe Mathieu-Daudé1-0/+1
2020-06-26hw/misc/pca9552: Trace GPIO High/Low eventsPhilippe Mathieu-Daudé1-0/+3
2020-06-26mac_via: rework ADB state machine to be compatible with both MacOS and LinuxMark Cave-Ayland1-0/+3
2020-06-09hw/misc/grlib_ahb_apb_pnp: Add trace events on read accessesPhilippe Mathieu-Daudé1-0/+4
2020-06-09hw/misc/empty_slot: Move the 'hw/misc' and cover in MAINTAINERSPhilippe Mathieu-Daudé1-0/+4
2020-03-12hw/arm/allwinner-h3: add SDRAM controller deviceNiek Linnenbank1-0/+10
2020-03-12hw/arm/allwinner: add Security Identifier deviceNiek Linnenbank1-0/+4
2020-03-12hw/arm/allwinner: add CPU Configuration moduleNiek Linnenbank1-0/+5
2020-01-17hw/misc: Add the STM32F4xx EXTI deviceAlistair Francis1-0/+5
2020-01-17hw/misc: Add the STM32F4xx Sysconfig deviceAlistair Francis1-0/+6
2020-01-07q800: fix mac_via RTC PRAM commandsLaurent Vivier1-0/+19
2019-10-15hw/misc/bcm2835_mbox: Add trace eventsPhilippe Mathieu-Daudé1-0/+6
2019-09-18trace: Remove trailing newline in eventsPhilippe Mathieu-Daudé1-5/+5
2019-07-01hw/misc/aspeed_xdma: New deviceEddie James1-0/+3
2019-03-22trace-events: Fix attribution of trace points to sourceMarkus Armbruster1-3/+5
2019-03-22trace-events: Delete unused trace pointsMarkus Armbruster1-2/+0
2019-03-22trace-events: Shorten file names in commentsMarkus Armbruster1-18/+18
2019-02-28hw/misc/armsse-mhu.c: Model the SSE-200 Message Handling UnitPeter Maydell1-0/+4
2019-02-01hw/misc/armsse-cpuid: Implement SSE-200 CPU_IDENTITY register blockPeter Maydell1-0/+4
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