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hw
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mips
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Commit message (
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Author
Files
Lines
2021-02-21
vt82c686: Move creation of ISA devices to the ISA bridge
BALATON Zoltan
1
-24
/
+5
2021-02-21
vt82c686: Fix SMBus IO base and configuration registers
BALATON Zoltan
1
-3
/
+1
2021-02-21
hw/mips/boston: Use bootloader helper to set GCRs
Jiaxun Yang
1
-34
/
+11
2021-02-21
hw/mips/boston: Use bl_gen_kernel_jump to generate bootloaders
Jiaxun Yang
1
-15
/
+2
2021-02-21
hw/mips/fuloong2e: Use bl_gen_kernel_jump to generate bootloaders
Jiaxun Yang
1
-24
/
+3
2021-02-21
hw/mips: Add a bootloader helper
Jiaxun Yang
2
-1
/
+201
2021-02-21
hw/mips: loongson3: Drop 'struct MemmapEntry'
Bin Meng
2
-9
/
+4
2021-02-05
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
Claudio Fontana
1
-2
/
+5
2021-02-05
cpu: move cc->transaction_failed to tcg_ops
Claudio Fontana
1
-2
/
+7
2021-01-14
docs/system: Remove deprecated 'fulong2e' machine alias
Philippe Mathieu-Daudé
1
-1
/
+0
2021-01-14
hw/mips/boston: Check 64-bit support with cpu_type_is_64bit()
Philippe Mathieu-Daudé
1
-4
/
+2
2021-01-04
hw/mips/fuloong2e: Correct cpuclock in PROM environment
Jiaxun Yang
1
-3
/
+3
2021-01-04
hw/mips/fuloong2e: Remove unused env entry
Jiaxun Yang
1
-1
/
+0
2021-01-04
hw/mips/fuloong2e: Replace faulty documentation links
Jiaxun Yang
1
-10
/
+3
2021-01-04
hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT
Jiaxun Yang
1
-2
/
+0
2021-01-04
hw/mips: Use address translation helper to handle ENVP_ADDR
Jiaxun Yang
2
-43
/
+43
2021-01-04
hw/mips/malta: Use address translation helper to calculate bootloader_run_addr
Jiaxun Yang
1
-2
/
+2
2021-01-04
hw/mips: Make bootloader addresses unsigned
Jiaxun Yang
3
-21
/
+21
2021-01-04
hw/mips: Add Loongson-3 machine support
Huacai Chen
3
-1
/
+651
2021-01-04
hw/mips: Add Loongson-3 boot parameter helpers
Huacai Chen
3
-0
/
+393
2021-01-04
hw/mips: Implement fw_cfg_arch_key_name()
Huacai Chen
4
-0
/
+58
2021-01-04
vt82c686: Remove legacy vt82c686b_pm_init() function
BALATON Zoltan
1
-1
/
+4
2021-01-04
vt82c686: Remove legacy vt82c686b_isa_init() function
BALATON Zoltan
1
-1
/
+3
2021-01-04
vt82c686: Remove vt82c686b_[am]c97_init() functions
BALATON Zoltan
1
-2
/
+2
2021-01-04
hw: Use the PCI_SLOT() macro from 'hw/pci/pci.h'
Philippe Mathieu-Daudé
1
-1
/
+1
2020-12-13
hw/mips/malta: Rewrite CP0_MVPConf0 access using deposit()
Philippe Mathieu-Daudé
1
-2
/
+6
2020-12-13
hw/mips/malta: Do not initialize MT registers if MT ASE absent
Philippe Mathieu-Daudé
1
-1
/
+3
2020-12-13
target/mips: Introduce ase_mt_available() helper
Philippe Mathieu-Daudé
1
-2
/
+1
2020-12-13
hw/mips: Move address translation helpers to target/mips/
Philippe Mathieu-Daudé
3
-53
/
+1
2020-12-13
target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT()
Philippe Mathieu-Daudé
2
-4
/
+4
2020-12-10
vl: extract softmmu/datadir.c
Paolo Bonzini
4
-0
/
+4
2020-12-10
mips: do not use ram_size global
Paolo Bonzini
2
-3
/
+3
2020-12-10
mips: remove bios_name
Paolo Bonzini
4
-12
/
+12
2020-11-09
hw/mips/boston: Fix memory leak in boston_fdt_filter() error-handling paths
Peter Maydell
1
-6
/
+4
2020-11-03
hw/mips/boston: Fix Lesser GPL version number
Chetan Pant
1
-1
/
+1
2020-11-03
hw/mips: Fix Lesser GPL version number
Chetan Pant
1
-1
/
+1
2020-11-03
hw/mips: Remove the 'r4k' machine
Philippe Mathieu-Daudé
3
-332
/
+0
2020-10-17
hw/mips: Remove exit(1) in case of missing ROM
Pavel Dovgalyuk
4
-24
/
+13
2020-10-17
hw/mips: Rename TYPE_MIPS_BOSTON to TYPE_BOSTON
Eduardo Habkost
1
-4
/
+4
2020-10-17
hw/mips: Simplify code using ROUND_UP(INITRD_PAGE_SIZE)
Philippe Mathieu-Daudé
4
-9
/
+6
2020-10-17
hw/mips: Simplify loading 64-bit ELF kernels
Philippe Mathieu-Daudé
2
-10
/
+2
2020-10-17
hw/mips/malta: Use clearer qdev style
Philippe Mathieu-Daudé
1
-4
/
+4
2020-10-17
hw/mips/malta: Move gt64120 related code together
Philippe Mathieu-Daudé
1
-7
/
+6
2020-10-17
hw/mips/malta: Fix FPGA I/O region size
Philippe Mathieu-Daudé
1
-1
/
+1
2020-10-17
hw/mips/cps: Do not allow use without input clock
Philippe Mathieu-Daudé
1
-0
/
+5
2020-10-17
hw/mips/malta: Set CPU frequency to 320 MHz
Philippe Mathieu-Daudé
1
-3
/
+16
2020-10-17
hw/mips/boston: Set CPU frequency to 1 GHz
Philippe Mathieu-Daudé
1
-0
/
+13
2020-10-17
hw/mips/cps: Expose input clock and connect it to CPU cores
Philippe Mathieu-Daudé
1
-0
/
+4
2020-10-17
hw/mips/jazz: Correct CPU frequencies
Philippe Mathieu-Daudé
1
-1
/
+14
2020-10-17
hw/mips/mipssim: Correct CPU frequency
Philippe Mathieu-Daudé
1
-1
/
+10
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