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2021-07-26bitops.h: revert db1ffc32dd ("qemu/bitops.h: add bitrev8 implementation")Mark Cave-Ayland1-1/+1
Commit db1ffc32dd ("qemu/bitops.h: add bitrev8 implementation") introduced a bitrev8() function to reverse the bit ordering required for storing the MAC address in the q800 PROM. This function is not required since QEMU implements its own revbit8() function which does exactly the same thing. Remove the extraneous bitrev8() function and switch its only caller in hw/m68k/q800.c to use revbit8() instead. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210725110557.3007-1-mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-07-02hw/m68k/q800: fix PROM checksum and MAC address storageMark Cave-Ayland1-5/+2
The checksum used by MacOS to validate the PROM content is an exclusive-OR rather than a sum over the corresponding bytes. In addition the MAC address must be stored in bit-reversed format as indicated in comments in Linux's macsonic.c. With the PROM contents fixed MacOS starts to probe the device registers when AppleTalk is enabled in the Control Panel. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Finn Thain <fthain@linux-m68k.org> Message-Id: <20210625065401.30170-8-mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-07-02hw/m68k/q800: move PROM and checksum calculation from dp8393x device to boardMark Cave-Ayland1-2/+22
This is in preparation for each board to have its own separate bit storage format and checksum for storing the MAC address. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Finn Thain <fthain@linux-m68k.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210625065401.30170-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-06-15softmmu/memory: Pass ram_flags to memory_region_init_ram_shared_nomigrate()David Hildenbrand1-2/+2
Let's forward ram_flags instead, renaming memory_region_init_ram_shared_nomigrate() into memory_region_init_ram_flags_nomigrate(). Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Acked-by: Eduardo Habkost <ehabkost@redhat.com> for memory backend and machine core Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210510114328.21835-6-david@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-02Do not include exec/address-spaces.h if it's not really necessaryThomas Huth6-6/+0
Stop including exec/address-spaces.h in files that don't need it. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210416171314.2074665-5-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02Do not include cpu.h if it's not really necessaryThomas Huth1-1/+0
Stop including cpu.h in files that don't need it. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210416171314.2074665-4-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02Do not include sysemu/sysemu.h if it's not really necessaryThomas Huth1-1/+0
Stop including sysemu/sysemu.h in files that don't need it. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210416171314.2074665-2-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02hw: Do not include hw/irq.h if it is not necessaryThomas Huth2-2/+0
Many files include hw/irq.h without needing it. Remove the superfluous include statements. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20210327050236.2232347-1-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02hw: Remove superfluous includes of hw/hw.hThomas Huth4-4/+0
The include/hw/hw.h header only has a prototype for hw_error(), so it does not make sense to include this in files that do not use this function. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210326151848.2217216-1-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-03-15m68k: add Virtual M68k MachineLaurent Vivier3-0/+323
The machine is based on Goldfish interfaces defined by Google for Android simulator. It uses Goldfish-rtc (timer and RTC), Goldfish-pic (PIC) and Goldfish-tty (for serial port and early tty). The machine is created with 128 virtio-mmio bus, and they can be used to use serial console, GPU, disk, NIC, HID, ... Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210312214145.2936082-6-laurent@vivier.eu>
2021-03-07esp: rename existing ESP QOM type to SYSBUS_ESPMark Cave-Ayland1-2/+2
The existing ESP QOM type currently represents a sysbus device with an embedded ESP state. Rename the type to SYSBUS_ESP accordingly. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210304221103.6369-3-mark.cave-ayland@ilande.co.uk>
2021-02-11m68k: import bootinfo headers from linuxLaurent Vivier2-68/+7
Copy bootinfo.h and bootinfo-mac.h from arch/m68k/include/uapi/asm/ to include/standard-headers/asm-m68k/ Imported from linux v5.9 but didn't change since v4.14 (header update) and since v4.10 (content update). Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20201220112615.933036-2-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-01-19hw/m68k/next-cube: Add vmstate for NeXTPC devicePeter Maydell1-1/+33
Add the vmstate for the new NeXTPC devic; this is in theory a migration compatibility break, but this machine doesn't have working migration currently anyway. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210115201206.17347-11-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2021-01-19hw/m68k/next-cube: Remove unused fields from NeXTStatePeter Maydell1-4/+0
The fields scsi_irq, scsi_dma, scsi_reset and fd_irq in NeXTState are all unused, except in commented out "this should do something like this" code. Remove the unused fields. As and when the functionality that might use them is added, we can put in the correct kind of wiring (which might or might not need to be a qemu_irq, but which in any case will need to be in the NeXTPC device, not in NeXTState). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210115201206.17347-10-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2021-01-19hw/m68k/next-cube: Move rtc into NeXTPC structPeter Maydell1-14/+8
Move the rtc into the NeXTPC struct. Since this is the last use of the 'backdoor' NextState pointer we can now remove that. Probably the RTC should be its own device at some point: in hardware there is a separate MCS1850 RTC chip connected to the Peripheral Controller via a 1-bit serial interface. That goes beyond the remit of the current refactoring, though. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210115201206.17347-9-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2021-01-19hw/m68k/next-cube: Make next_irq GPIO inputs to NEXT_PC devicePeter Maydell1-17/+4
Make the next_irq function be GPIO inputs to the NEXT_PC device, rather than a freestanding set of qemu_irq lines. This fixes a minor Coverity issue where it correctly points out the trivial memory leak of the memory allocated in the call to qemu_allocate_irqs(). Fixes: CID 1421962 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210115201206.17347-8-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2021-01-19hw/m68k/next-cube: Move int_status and int_mask to NeXTPC structPeter Maydell1-17/+16
All the code which accesses int_status and int_mask is now doing so via the NeXTPC->NeXTState indirection, so we can move these fields into the NeXTPC struct where they belong. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210115201206.17347-7-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2021-01-19hw/m68k/next-cube: Make next_irq take NeXTPC* as its opaquePeter Maydell1-8/+23
Make the next_irq function take a NeXTPC* as its opaque rather than the M68kCPU*. This will make it simpler to turn the next_irq function into a gpio input line of the NeXTPC device in the next commit. For this to work we have to pass the CPU to the NeXTPC device via a link property, in the same way we do in q800.c (and for the same reason). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210115201206.17347-6-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2021-01-19hw/m68k/next-cube: Move scr_ops into NeXTPC devicePeter Maydell1-25/+25
Move the registers handled by the scr_ops struct into the NeXTPC device. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210115201206.17347-5-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2021-01-19hw/m68k/next-cube: Move mmio_ops into NeXTPC devicePeter Maydell1-36/+44
Move the registers handled by the mmio_ops struct into the NeXTPC device. This allows us to also move the scr1 and scr2 data fields. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210115201206.17347-4-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2021-01-19hw/m68k/next-cube: Move register/interrupt functionality into a devicePeter Maydell1-0/+44
Currently the next-cube board code open-codes a lot of handling of interrupts and some miscellaneous registers. Move this into a proper QOM device. In the real hardware this functionality seems to be the responsibility of the Peripheral Controller (PC) chip, so name the device that. There are several different things that will need to be moved into this device: * the mmio_iops register set * the scr_ops register set * the next_irq IRQ handling To ease review, we structure the change as a sequence of commits: in this first commit we create the skeleton of the NeXTPC device with no content, but with a backdoor pointer to the NeXTState machine's state struct so we can move parts of the code and still have refactored and non-refactored code using the same struct data fields. Further commits will move functionality into the new device piece by piece. At the end we will be able to remove the backdoor pointer because all the data fields will be in the NeXTPC struct and not the NeXTState struct. We'll add the VMState for the new device at the end of all that; this is in theory a migration compatibility break but this machine does not currently support migration at all anyway. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210115201206.17347-3-peter.maydell@linaro.org> [huth: Add a comment in front of struct NeXTPC] Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2021-01-19hw/m68k/next-cube: Make next_irq() function staticPeter Maydell1-1/+1
The next_irq() function is global, but isn't actually used anywhere outside next-cube.c. Make it static. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210115201206.17347-2-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2020-12-12hw/m68k/q800.c: Make the GLUE chip an actual QOM devicePeter Maydell1-12/+70
The handling of the GLUE (General Logic Unit) device is currently open-coded. Make this into a proper QOM device. This minor piece of modernisation gets rid of the free floating qemu_irq array 'pic', which Coverity points out is technically leaked when we exit the machine init function. (The replacement glue device is not leaked because it gets added to the sysbus, so it's accessible via that.) Fixes: Coverity CID 1421883 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201106235109.7066-3-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-12hw/m68k/q800: Don't connect two qemu_irqs directly to the same inputPeter Maydell2-2/+11
The q800 board code connects both of the IRQ outputs of the ESCC to the same pic[3] qemu_irq. Connecting two qemu_irqs outputs directly to the same input is not valid as it produces subtly wrong behaviour (for instance if both the IRQ lines are high, and then one goes low, the PIC input will see this as a high-to-low transition even though the second IRQ line should still be holding it high). This kind of wiring needs an explicitly created OR gate; add one. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20201106235109.7066-2-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-10vl: extract softmmu/datadir.cPaolo Bonzini2-0/+2
Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-12-10m68k: do not use ram_size globalPaolo Bonzini2-2/+5
Use the machine properties instead. Cc: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-12-10m68k: remove bios_namePaolo Bonzini3-11/+7
Cc: Laurent Vivier <lvivier@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201026143028.3034018-8-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-12-09hw/m68k/mcf5206: Don't leak IRQs in mcf5206_mbar_realize()Peter Maydell1-6/+6
Coverity points out that the realize function for the TYPE_MCF5206_MBAR device leaks the IRQ array it allocates with qemu_allocate_irqs(). Keep a pointer to it in the device state struct to avoid the leak. (Since it needs to stay around for the life of the simulation there is no need to actually free it, and the leak was harmless.) Fixes: Coverity CID 1432412 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201120172314.14725-1-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-09-18Use OBJECT_DECLARE_SIMPLE_TYPE when possibleEduardo Habkost3-9/+3
This converts existing DECLARE_INSTANCE_CHECKER usage to OBJECT_DECLARE_SIMPLE_TYPE when possible. $ ./scripts/codeconverter/converter.py -i \ --pattern=AddObjectDeclareSimpleType $(git grep -l '' -- '*.[ch]') Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Paul Durrant <paul@xen.org> Message-Id: <20200916182519.415636-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-09esp: Rename ESP_STATE to ESPEduardo Habkost1-1/+1
Make the type checking macro name consistent with the TYPE_* constant. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> Message-Id: <20200902224311.1321159-40-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-09Use DECLARE_*CHECKER* macrosEduardo Habkost3-3/+6
Generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]') Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-12-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-13-ehabkost@redhat.com> Message-Id: <20200831210740.126168-14-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-09Move QOM typedefs and add missing includesEduardo Habkost3-6/+12
Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TYPE. Patch generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]') which will split "typdef struct { ... } TypedefName" declarations. Followed by: $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \ $(git grep -l '' -- '*.[ch]') which will: - move the typedefs and #defines above the type check macros - add missing #include "qom/object.h" lines if necessary Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-9-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-10-ehabkost@redhat.com> Message-Id: <20200831210740.126168-11-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-03hw/m68k: QOMify the mcf5206 system integration moduleThomas Huth2-11/+47
The mcf5206 system integration module should be a proper device. Let's finally QOMify it. Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200819065201.4045-1-huth@tuxfamily.org>
2020-08-21meson: convert hw/arch*Marc-André Lureau2-4/+7
Each architecture's sourceset is placed in an hw_arch dictionary, and picked up from there when building the per-emulator static_library. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10qom: Put name parameter before value / visitor parameterMarkus Armbruster1-2/+2
The object_property_set_FOO() setters take property name and value in an unusual order: void object_property_set_FOO(Object *obj, FOO_TYPE value, const char *name, Error **errp) Having to pass value before name feels grating. Swap them. Same for object_property_set(), object_property_get(), and object_property_parse(). Convert callers with this Coccinelle script: @@ identifier fun = { object_property_get, object_property_parse, object_property_set_str, object_property_set_link, object_property_set_bool, object_property_set_int, object_property_set_uint, object_property_set, object_property_set_qobject }; expression obj, v, name, errp; @@ - fun(obj, v, name, errp) + fun(obj, name, v, errp) Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error message "no position information". Convert that one manually. Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by ARMSSE being used both as typedef and function-like macro there. Convert manually. Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused by RXCPU being used both as typedef and function-like macro there. Convert manually. The other files using RXCPU that way don't need conversion. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-Id: <20200707160613.848843-27-armbru@redhat.com> [Straightforwad conflict with commit 2336172d9b "audio: set default value for pcspk.iobase property" resolved]
2020-07-06hw/m68k/mcf5206: Replace remaining hw_error()s by qemu_log_mask()Thomas Huth1-11/+28
hw_error() dumps the CPU state and exits QEMU. This is ok during initial code development (to see where the guest code is currently executing), but it is certainly not the desired behavior that we want to present to normal users, and it can also cause trouble when e.g. fuzzing devices. Thus let's replace these hw_error()s by qemu_log_mask()s instead. Message-Id: <20200611055807.15921-1-huth@tuxfamily.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2020-06-23qdev: Make qdev_prop_set_drive() match the other helpersMarkus Armbruster1-2/+1
qdev_prop_set_drive() can fail. None of the other qdev_prop_set_FOO() can; they abort on error. To clean up this inconsistency, rename qdev_prop_set_drive() to qdev_prop_set_drive_err(), and create a qdev_prop_set_drive() that aborts on error. Coccinelle script to update callers: @ depends on !(file in "hw/core/qdev-properties-system.c")@ expression dev, name, value; symbol error_abort; @@ - qdev_prop_set_drive(dev, name, value, &error_abort); + qdev_prop_set_drive(dev, name, value); @@ expression dev, name, value, errp; @@ - qdev_prop_set_drive(dev, name, value, errp); + qdev_prop_set_drive_err(dev, name, value, errp); Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200622094227.1271650-14-armbru@redhat.com>
2020-06-15sysbus: Convert to sysbus_realize() etc. with CoccinelleMarkus Armbruster4-11/+11
Convert from qdev_realize(), qdev_realize_and_unref() with null @bus argument to sysbus_realize(), sysbus_realize_and_unref(). Coccinelle script: @@ expression dev, errp; @@ - qdev_realize(DEVICE(dev), NULL, errp); + sysbus_realize(SYS_BUS_DEVICE(dev), errp); @@ expression sysbus_dev, dev, errp; @@ + sysbus_dev = SYS_BUS_DEVICE(dev); - qdev_realize_and_unref(dev, NULL, errp); + sysbus_realize_and_unref(sysbus_dev, errp); - sysbus_dev = SYS_BUS_DEVICE(dev); @@ expression sysbus_dev, dev, errp; expression expr; @@ sysbus_dev = SYS_BUS_DEVICE(dev); ... when != dev = expr; - qdev_realize_and_unref(dev, NULL, errp); + sysbus_realize_and_unref(sysbus_dev, errp); @@ expression dev, errp; @@ - qdev_realize_and_unref(DEVICE(dev), NULL, errp); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp); @@ expression dev, errp; @@ - qdev_realize_and_unref(dev, NULL, errp); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp); Whitespace changes minimized manually. Signed-off-by: Markus Armbruster <armbru@redhat.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200610053247.1583243-46-armbru@redhat.com> [Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-15qdev: Convert uses of qdev_create() with CoccinelleMarkus Armbruster4-28/+29
This is the transformation explained in the commit before previous. Takes care of just one pattern that needs conversion. More to come in this series. Coccinelle script: @ depends on !(file in "hw/arm/highbank.c")@ expression bus, type_name, dev, expr; @@ - dev = qdev_create(bus, type_name); + dev = qdev_new(type_name); ... when != dev = expr - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, bus, &error_fatal); @@ expression bus, type_name, dev, expr; identifier DOWN; @@ - dev = DOWN(qdev_create(bus, type_name)); + dev = DOWN(qdev_new(type_name)); ... when != dev = expr - qdev_init_nofail(DEVICE(dev)); + qdev_realize_and_unref(DEVICE(dev), bus, &error_fatal); @@ expression bus, type_name, expr; identifier dev; @@ - DeviceState *dev = qdev_create(bus, type_name); + DeviceState *dev = qdev_new(type_name); ... when != dev = expr - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, bus, &error_fatal); @@ expression bus, type_name, dev, expr, errp; symbol true; @@ - dev = qdev_create(bus, type_name); + dev = qdev_new(type_name); ... when != dev = expr - object_property_set_bool(OBJECT(dev), true, "realized", errp); + qdev_realize_and_unref(dev, bus, errp); @@ expression bus, type_name, expr, errp; identifier dev; symbol true; @@ - DeviceState *dev = qdev_create(bus, type_name); + DeviceState *dev = qdev_new(type_name); ... when != dev = expr - object_property_set_bool(OBJECT(dev), true, "realized", errp); + qdev_realize_and_unref(dev, bus, errp); The first rule exempts hw/arm/highbank.c, because it matches along two control flow paths there, with different @type_name. Covered by the next commit's manual conversions. Missing #include "qapi/error.h" added manually. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200610053247.1583243-10-armbru@redhat.com> [Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-05-30hw/m68k/mcf52xx: Replace hw_error() by qemu_log_mask()Philippe Mathieu-Daudé3-12/+24
hw_error() calls exit(). This a bit overkill when we can log the accesses as unimplemented or guest error. When fuzzing the devices, we don't want the whole process to exit. Replace some hw_error() calls by qemu_log_mask(). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200526094052.1723-3-f4bug@amsat.org> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2020-05-30hw/m68k/mcf5206: Reduce m5206_mbar_read/write() offset arg to 16-bitPhilippe Mathieu-Daudé1-4/+4
All calls to m5206_mbar_read/m5206_mbar_write are used with 'offset = hwaddr & 0x3ff', so we are sure the offset fits in 16-bit. Suggested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200526094052.1723-2-f4bug@amsat.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2020-03-17hw/m68k: Use memory_region_init_rom() with read-only regionsPhilippe Mathieu-Daudé1-2/+1
This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-03-16misc: Replace zero-length arrays with flexible array member (automatic)Philippe Mathieu-Daudé1-1/+1
Description copied from Linux kernel commit from Gustavo A. R. Silva (see [3]): --v-- description start --v-- The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member [1], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being unadvertenly introduced [2] to the Linux codebase from now on. --^-- description end --^-- Do the similar housekeeping in the QEMU codebase (which uses C99 since commit 7be41675f7cb). All these instances of code were found with the help of the following Coccinelle script: @@ identifier s, m, a; type t, T; @@ struct s { ... t m; - T a[0]; + T a[]; }; @@ identifier s, m, a; type t, T; @@ struct s { ... t m; - T a[0]; + T a[]; } QEMU_PACKED; [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=76497732932f [3] https://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux.git/commit/?id=17642a2fbd2c1 Inspired-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-02-28hw: Make MachineClass::is_default a boolean typePhilippe Mathieu-Daudé1-1/+1
There's no good reason for it to be type int, change it to bool. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200207161948.15972-3-philmd@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-02-28hw: Do not initialize MachineClass::is_default to 0Philippe Mathieu-Daudé1-1/+0
The MachineClass is already zeroed on creation. Note: The code setting is_default=0 in hw/i386/pc_piix.c is different (related to compat options). When adding a new versioned machine, we want it to be the new default, so we have to mark the previous one as not default. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200207161948.15972-2-philmd@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-02-25Merge tag 'patchew/20200219160953.13771-1-imammedo@redhat.com' of ↵Paolo Bonzini4-13/+8
https://github.com/patchew-project/qemu into HEAD This series removes ad hoc RAM allocation API (memory_region_allocate_system_memory) and consolidates it around hostmem backend. It allows to * resolve conflicts between global -mem-prealloc and hostmem's "policy" option, fixing premature allocation before binding policy is applied * simplify complicated memory allocation routines which had to deal with 2 ways to allocate RAM. * reuse hostmem backends of a choice for main RAM without adding extra CLI options to duplicate hostmem features. A recent case was -mem-shared, to enable vhost-user on targets that don't support hostmem backends [1] (ex: s390) * move RAM allocation from individual boards into generic machine code and provide them with prepared MemoryRegion. * clean up deprecated NUMA features which were tied to the old API (see patches) - "numa: remove deprecated -mem-path fallback to anonymous RAM" - (POSTPONED, waiting on libvirt side) "forbid '-numa node,mem' for 5.0 and newer machine types" - (POSTPONED) "numa: remove deprecated implicit RAM distribution between nodes" Introduce a new machine.memory-backend property and wrapper code that aliases global -mem-path and -mem-alloc into automatically created hostmem backend properties (provided memory-backend was not set explicitly given by user). A bulk of trivial patches then follow to incrementally convert individual boards to using machine.memory-backend provided MemoryRegion. Board conversion typically involves: * providing MachineClass::default_ram_size and MachineClass::default_ram_id so generic code could create default backend if user didn't explicitly provide memory-backend or -m options * dropping memory_region_allocate_system_memory() call * using convenience MachineState::ram MemoryRegion, which points to MemoryRegion allocated by ram-memdev On top of that for some boards: * missing ram_size checks are added (typically it were boards with fixed ram size) * ram_size fixups are replaced by checks and hard errors, forcing user to provide correct "-m" values instead of ignoring it and continuing running. After all boards are converted, the old API is removed and memory allocation routines are cleaned up.
2020-02-19m68k/next-cube: use memdev for RAMIgor Mammedov1-3/+2
memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200219160953.13771-50-imammedo@redhat.com>
2020-02-19m68k/mcf5208: use memdev for RAMIgor Mammedov1-3/+2
memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200219160953.13771-49-imammedo@redhat.com>
2020-02-19m68k/q800: use memdev for RAMIgor Mammedov1-4/+2
Switch to using generic main RAM allocation. To do this set MachineClass::default_ram_id to m68k_mac.ram and use MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200219160953.13771-48-imammedo@redhat.com>
2020-02-19m68k/an5206: use memdev for RAMIgor Mammedov1-3/+2
memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200219160953.13771-47-imammedo@redhat.com>
generated by cgit v1.1 at 2024-12-27 03:52:33 +0000