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path: root/hw/loongarch/virt.c
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2023-05-26hw/loongarch64: Use MachineClass->default_nic in the virt machineThomas Huth1-1/+3
Mark the default NIC via the new MachineClass->default_nic setting so that the machine-defaults code in vl.c can decide whether the default NIC is usable or not (for example when compiling with the "--without-default-devices" configure switch). Message-Id: <20230523110435.1375774-5-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Song Gao <gaosong@loongson.cn> Tested-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-05-15hw/loongarch/virt: Set max 256 cpus support on loongarch virt machineSong Gao1-4/+9
Add separate macro EXTIOI_CPUS for extioi interrupt controller, extioi only supports 4 cpu. And set macro LOONGARCH_MAX_CPUS as 256 so that loongarch virt machine supports more cpus. Interrupts from external devices can only be routed cpu 0-3 because of extioi limits, cpu internal interrupt such as timer/ipi can be triggered on all cpus. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20230512100421.1867848-3-gaosong@loongson.cn>
2023-05-15hw/loongarch/virt: Modify ipi as percpu deviceSong Gao1-6/+6
ipi is used to communicate between cpus, this patch modified loongarch ipi device as percpu device, so that there are 2 MemoryRegions with ipi device, rather than 2*cpus MemoryRegions, which may be large than QDEV_MAX_MMIO if more cpus are added on loongarch virt machine. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20230512100421.1867848-2-gaosong@loongson.cn>
2023-04-04hw/loongarch/virt: Fix virt_to_phys_addr functionTianrui Zhao1-1/+1
The virt addr should mask TARGET_PHYS_ADDR_SPACE_BITS to get the phys addr, and this is used by loading kernel elf. Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230327112313.3042829-1-zhaotianrui@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2023-03-22*: Add missing includes of qemu/error-report.hRichard Henderson1-0/+2
This had been pulled in via qemu/plugin.h from hw/core/cpu.h, but that will be removed. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230310195252.210956-5-richard.henderson@linaro.org> [AJB: add various additional cases shown by CI] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230315174331.2959-15-alex.bennee@linaro.org> Reviewed-by: Emilio Cota <cota@braap.org>
2023-03-03hw/loongarch/virt: add system_powerdown hmp command supportSong Gao1-0/+12
For loongarch virt machine, add powerdown notification callback and send ACPI_POWER_DOWN_STATUS event by acpi ged. Also add acpi dsdt table for ACPI_POWER_BUTTON_DEVICE device in this patch. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20230303010548.295580-1-gaosong@loongson.cn>
2023-03-03hw/loongarch/virt: rename PCH_PIC_IRQ_OFFSET with VIRT_GSI_BASEBibo Mao1-4/+4
In theory gsi base can start from 0 on loongarch virt machine, however gsi base is hard-coded in linux kernel loongarch system, else system fails to boot. This patch renames macro PCH_PIC_IRQ_OFFSET with VIRT_GSI_BASE, keeps value unchanged. GSI base is common concept in acpi spec and easy to understand. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20221228030719.991878-1-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2023-01-06hw/intc/loongarch_pch: Change default irq number of pch irq controllerTianrui Zhao1-1/+1
Change the default irq number of pch pic to 32, so that the irq number of pch msi is 224(256 - 32), and move the 'PCH_PIC_IRQ_NUM' macro to pci-host/ls7a.h and add prefix 'VIRT' on it to keep standard format. Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230104020518.2564263-4-zhaotianrui@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2023-01-06hw/intc/loongarch_pch_pic: add irq number propertyTianrui Zhao1-3/+5
With loongarch 7A1000 manual, irq number supported can be set in PCH_PIC_INT_ID_HI register. This patch adds irq number property for loongarch_pch_pic, so that virt machine can set different irq number when pch_pic intc is added. Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20230104020518.2564263-3-zhaotianrui@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2023-01-06hw/intc/loongarch_pch_msi: add irq number propertyTianrui Zhao1-5/+8
This patch adds irq number property for loongarch msi interrupt controller, and remove hard coding irq number macro. Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230104020518.2564263-2-zhaotianrui@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-12-15hw/loongarch/virt: Add cfi01 pflash deviceXiaojuan Yang1-0/+62
Add cfi01 pflash device for LoongArch virt machine Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221130100647.398565-1-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-12-05Revert "hw/loongarch/virt: Add cfi01 pflash device"Song Gao1-62/+0
This reverts commit 14dccc8ea6ece7ee63273144fb55e4770a05e0fd. Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20221205113007.683505-1-gaosong@loongson.cn>
2022-12-02hw/loongarch/virt: Add cfi01 pflash deviceXiaojuan Yang1-0/+62
Add cfi01 pflash device for LoongArch virt machine Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221130100647.398565-1-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-11-22hw/loongarch: Fix setprop_sized method in fdt rtc node.Xiaojuan Yang1-1/+1
Fix setprop_sized method in fdt rtc node. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20221116040300.3459818-1-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-11-22hw/loongarch: Add default stdout uart in fdtXiaojuan Yang1-0/+2
Add "chosen" subnode into LoongArch fdt, and set it's "stdout-path" prop to uart node. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20221115114923.3372414-1-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-11-12hw/loongarch: Fix loongarch fdt addr confictSong Gao1-4/+4
Fix LoongArch check-tcg error: TEST hello on loongarch64 qemu-system-loongarch64: Some ROM regions are overlapping These ROM regions might have been loaded by direct user request or by default. They could be BIOS/firmware images, a guest kernel, initrd or some other file loaded into guest memory. Check whether you intended to load all this guest code, and whether it has been built to load to the correct addresses. The following two regions overlap (in the memory address space): hello ELF program header segment 0 (addresses 0x0000000000200000 - 0x0000000000242000) fdt (addresses 0x0000000000200000 - 0x0000000000300000) make[1]: *** [Makefile:177: run-hello] Error 1 Fixes: 021836936ef ("hw/loongarch: Load FDT table into dram memory space") Reported-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20221109020449.978064-1-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-11-04hw/loongarch: Add TPM device for LoongArch virt machineXiaojuan Yang1-0/+4
Add TPM device for LoongArch virt machine, including establish TPM acpi info and add TYPE_TPM_TIS_SYSBUS to dynamic_sysbus_devices list. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20221028014007.2718352-4-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-11-04hw/loongarch: Improve fdt for LoongArch virt machineXiaojuan Yang1-0/+31
Add new items into LoongArch FDT, including rtc and uart info. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20221028014007.2718352-3-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-11-04hw/loongarch: Load FDT table into dram memory spaceXiaojuan Yang1-7/+11
Load FDT table into dram memory space, and the addr is 2 MiB. Since lowmem region starts from 0, FDT base address is located at 2 MiB to avoid NULL pointer access. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Acked-by: Song Gao <gaosong@loongson.cn> Message-Id: <20221028014007.2718352-2-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-10-14hw/arm, loongarch: Move load_image_to_fw_cfg() to common locationSunil V L1-33/+0
load_image_to_fw_cfg() is duplicated by both arm and loongarch. The same function will be required by riscv too. So, it's time to refactor and move this function to a common path. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20221004092351.18209-2-sunilvl@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-09-20hw/loongarch: Improve acpi dsdt tableXiaojuan Yang1-0/+1
Cleanup the previous pci information in acpi dsdt table. And using the common acpi_dsdt_add_gpex function to build the gpex and pci information. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Acked-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220908094623.73051-10-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-09-20hw/loongarch: Support memory hotplugXiaojuan Yang1-1/+104
Add hotplug/unplug interface for memory device. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Acked-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220908094623.73051-9-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-09-20hw/loongarch: Add RAMFB to dynamic_sysbus_devices listXiaojuan Yang1-0/+2
Add RAMFB device to dynamic_sysbus_devices list so that it can be hotpluged to the machine. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Acked-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220908094623.73051-7-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-09-20hw/loongarch: Add hotplug handler for machineXiaojuan Yang1-0/+32
Add hotplug handler for LoongArch virt machine and now only support the dynamic sysbus device. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Acked-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220908094623.73051-6-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-09-20hw/loongarch: Add platform bus supportXiaojuan Yang1-0/+33
Add platform bus support and add the bus information such as address, size, irq number to FDT table. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Acked-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220908094623.73051-5-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-09-20hw/loongarch: Add interrupt information to FDT tableXiaojuan Yang1-0/+28
Add interrupt information to FDT table, such as interrupt controller info, compatiable info, etc. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Acked-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220908094623.73051-4-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-09-19hw/loongarch: Support fw_cfg dma functionXiaojuan Yang1-1/+1
Support fw_cfg dma function for LoongArch virt machine. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Acked-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220908094623.73051-3-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-09-19hw/loongarch: Remove vga device when loongarch initXiaojuan Yang1-3/+0
Remove the vga device when loongarch machine init and we will support other display device in the future. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Acked-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220908094623.73051-2-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-07-29hw/loongarch: Change macro name 'LS7A_XXX' to 'VIRT_XXX'Xiaojuan Yang1-28/+28
Change macro name 'LS7A_XXX' to 'VIRT_XXX', as the loongarch virt machinue use the GPEX bridge instead of LS7A bridge. So the macro name should keep consistency. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220729073018.27037-3-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-29hw/loongarch: Rename file 'loongson3.XXX' to 'virt.XXX'Xiaojuan Yang1-0/+781
1. Rename 'loongson3.c' to 'virt.c' and change the meson.build file. 2. Rename 'loongson3.rst' to 'virt.rst'. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220729073018.27037-2-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
generated by cgit v1.1 at 2025-07-14 06:07:16 +0000