riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-10-30	hw/intc/sh_intc: Remove unneeded local variable initialisers	BALATON Zoltan	1	-11/+10
2021-10-30	hw/intc/sh_intc: Simplify allocating sources array	BALATON Zoltan	1	-11/+4
2021-10-30	hw/intc/sh_intc: Avoid using continue in loops	BALATON Zoltan	1	-24/+20
2021-10-30	hw/intc/sh_intc: Replace abort() with g_assert_not_reached()	BALATON Zoltan	1	-5/+3
2021-10-30	hw/intc/sh_intc: Inline and drop sh_intc_source() function	BALATON Zoltan	1	-32/+22
2021-10-30	hw/intc/sh_intc: Use array index instead of pointer arithmetics	BALATON Zoltan	1	-14/+14
2021-10-30	hw/intc/sh_intc: Remove excessive parenthesis	BALATON Zoltan	1	-4/+5
2021-10-30	hw/intc/sh_intc: Move sh_intc_register() closer to its only user	BALATON Zoltan	1	-30/+30
2021-10-30	hw/intc/sh_intc: Drop another useless macro	BALATON Zoltan	1	-11/+4
2021-10-30	hw/intc/sh_intc: Rename iomem region	BALATON Zoltan	1	-7/+4
2021-10-30	hw/intc/sh_intc: Turn some defines into an enum	BALATON Zoltan	1	-24/+18
2021-10-30	hw/intc/sh_intc: Use existing macro instead of local one	BALATON Zoltan	1	-7/+5
2021-10-30	hw/sh4: Change debug printfs to traces	BALATON Zoltan	2	-59/+28
2021-10-30	hw/sh4: Coding style: Add missing braces	BALATON Zoltan	1	-40/+47
2021-10-30	hw/sh4: Coding style: White space fixes	BALATON Zoltan	1	-16/+23
2021-10-30	hw/sh4: Coding style: Fix multi-line comments	BALATON Zoltan	1	-4/+5
2021-10-30	hw/sh4: Coding style: Remove tabs	BALATON Zoltan	1	-110/+110
2021-10-22	hw/intc: sifive_plic: Cleanup the irq_request function	Alistair Francis	1	-6/+4
2021-10-22	hw/intc: sifive_plic: Cleanup the realize function	Alistair Francis	1	-21/+24
2021-10-22	hw/intc: sifive_plic: Move the properties	Alistair Francis	1	-15/+15
2021-10-22	hw/intc: Remove the Ibex PLIC	Alistair Francis	2	-308/+0
2021-10-21	spapr/xive: Use xive_esb_rw() to trigger interrupts	Cédric Le Goater	1	-3/+1
2021-10-21	spapr/xive: Add source status helpers	Cédric Le Goater	3	-12/+8
2021-09-30	Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...	Peter Maydell	1	-0/+1
2021-09-30	memory: Name all the memory listeners	Peter Xu	1	-0/+1
2021-09-30	spapr/xive: Fix kvm_xive_source_reset trace event	Cédric Le Goater	1	-2/+2
2021-09-30	hw/intc: openpic: Clean up the styles	Bin Meng	1	-21/+34
2021-09-30	hw/intc: openpic: Drop Raven related codes	Bin Meng	1	-27/+1
2021-09-30	hw/intc: openpic: Correct the reset value of IPIDR for FSL chipset	Bin Meng	1	-0/+9
2021-09-29	ppc/xive: Export xive_tctx_word2() helper	Cédric Le Goater	1	-5/+0
2021-09-29	ppc/xive: Export priority_to_ipb() helper	Cédric Le Goater	1	-15/+6
2021-09-21	Merge remote-tracking branch 'remotes/alistair23/tags/pull-riscv-to-apply-202...	Richard Henderson	6	-307/+491
2021-09-21	hw/intc: Upgrade the SiFive CLINT implementation to RISC-V ACLINT	Anup Patel	1	-114/+259
2021-09-21	hw/intc: Rename sifive_clint sources to riscv_aclint sources	Anup Patel	3	-3/+3
2021-09-21	hw/intc: sifive_plic: Convert the PLIC to use RISC-V CPU GPIO lines	Alistair Francis	1	-7/+23
2021-09-21	hw/intc: ibex_plic: Convert the PLIC to use RISC-V CPU GPIO lines	Alistair Francis	1	-11/+6
2021-09-21	hw/intc: sifive_clint: Use RISC-V CPU GPIO lines	Alistair Francis	1	-20/+48
2021-09-20	hw/intc: Set GIC maintenance interrupt level to only 0 or 1	Shashi Mallela	1	-2/+3
2021-09-13	hw/intc: GICv3 redistributor ITS processing	Shashi Mallela	6	-2/+193
2021-09-13	hw/intc: GICv3 ITS Feature enablement	Shashi Mallela	4	-4/+27
2021-09-13	hw/intc: GICv3 ITS Command processing	Shashi Mallela	2	-1/+376
2021-09-13	hw/intc: GICv3 ITS command queue framework	Shashi Mallela	2	-0/+359
2021-09-13	hw/intc: GICv3 ITS register definitions added	Shashi Mallela	2	-0/+405
2021-09-13	hw/intc: GICv3 ITS initial framework	Shashi Mallela	5	-13/+334
2021-09-01	arm: Move system PPB container handling to armv7m	Peter Maydell	1	-141/+4
2021-09-01	arm: Move systick device creation from NVIC to ARMv7M object	Peter Maydell	1	-73/+0
2021-09-01	arm: Move M-profile RAS register block into its own device	Peter Maydell	1	-56/+0
2021-09-01	hw/intc/arm_gicv3: Replace mis-used MEMTX_* constants by booleans	Philippe Mathieu-Daudé	1	-95/+106
2021-09-01	hw/intc/arm_gicv3_dist: Rename 64-bit accessors with 'q' suffix	Philippe Mathieu-Daudé	1	-6/+6
2021-09-01	hw/intc/sifive_clint: Fix muldiv64 overflow in sifive_clint_write_timecmp()	David Hoppenbrouwers	1	-2/+23