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2021-01-08hw/intc/armv7m_nvic: Correct handling of CCR.BFHFNMIGNPeter Maydell1-0/+15
2021-01-08intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUsEdgar E. Iglesias1-1/+3
2021-01-06Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20210106' into...Peter Maydell1-1/+4
2021-01-06hw/sparc: Make grlib-irqmp device handle its own inbound IRQ linesPeter Maydell1-1/+4
2021-01-06Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.0-20210106' in...Peter Maydell4-19/+334
2021-01-06ppc: Simplify reverse dependencies of POWERNV and PSERIES on XICS and XIVEGreg Kurz2-5/+2
2021-01-06ppc: Fix build with --without-default-devicesGreg Kurz2-13/+6
2021-01-06spapr/xive: Make spapr_xive_pic_print_info() staticCédric Le Goater1-1/+1
2021-01-06ppc: Convert PPC UIC to a QOM devicePeter Maydell3-0/+325
2021-01-04hw/intc: Rework Loongson LIOINTCHuacai Chen1-20/+16
2021-01-01Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2020-12-19' into ...Peter Maydell1-1/+1
2020-12-30Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-12-1...Peter Maydell1-0/+8
2020-12-19migration: Replace migration's JSON writer by the general oneMarkus Armbruster1-1/+1
2020-12-18hw/intc/arm_gicv3_kvm: silence the compiler warningsChen Qun1-0/+8
2020-12-17intc/ibex_plic: Clear interrupts that occur during claim processAlistair Francis1-3/+10
2020-12-15target/nios2: Move IIC code into CPU object properPeter Maydell2-96/+0
2020-12-14xive: Add trace eventsCédric Le Goater4-3/+108
2020-12-14spapr/xics: Drop unused argument to xics_kvm_has_broken_disconnect()Greg Kurz1-1/+1
2020-12-14spapr/xive: Turn some sanity checks into assertionsGreg Kurz1-10/+4
2020-12-10i386: do not use ram_size globalPaolo Bonzini1-1/+2
2020-12-10hw/intc/armv7m_nvic: Implement read/write for RAS register blockPeter Maydell1-0/+56
2020-12-10target/arm: Implement M-profile "minimal RAS implementation"Peter Maydell1-0/+13
2020-12-10hw/intc/armv7m_nvic: Fix "return from inactive handler" checkPeter Maydell1-27/+32
2020-12-10hw/intc/armv7m_nvic: Support v8.1M CCR.TRD bitPeter Maydell1-8/+18
2020-12-10target/arm: Implement v8.1M REVIDR registerPeter Maydell1-0/+5
2020-12-10hw/intc/armv7m_nvic: Update FPDSCR masking for v8.1MPeter Maydell1-1/+8
2020-12-10hw/intc/armv7m_nvic: Make all of system PPB range be RAZWI/BusFaultPeter Maydell1-11/+67
2020-11-23hw/intc: fix heap-buffer-overflow in rxicu_realize()Chen Qun1-10/+8
2020-11-18Revert series "spapr/xive: Allocate vCPU IPIs from the vCPU contexts"Greg Kurz1-84/+18
2020-11-15nomaintainer: Fix Lesser GPL version numberChetan Pant5-5/+5
2020-11-15arm tcg cpus: Fix Lesser GPL version numberChetan Pant2-2/+2
2020-11-15non-virt: Fix Lesser GPL version numberChetan Pant1-1/+1
2020-11-13intc/ibex_plic: Ensure we don't loose interruptsAlistair Francis1-1/+16
2020-11-13intc/ibex_plic: Fix some typos in the commentsAlistair Francis1-2/+2
2020-11-09hw/intc/ibex_plic: Clear the claim register when readAlistair Francis1-0/+3
2020-11-04Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-fixes-20201103'...Peter Maydell1-2/+2
2020-11-03hw/intc/loongson: Fix incorrect 'core' calculation in liointc_read/writeAlexChen1-2/+2
2020-11-03target/riscv: Add sifive_plic vmstateYifei Jiang1-1/+25
2020-11-02hw/intc/arm_gicv3_cpuif: Make GIC maintenance interrupts workPeter Maydell1-3/+2
2020-10-22hw/intc: Move sifive_plic.h to the include directoryBin Meng1-83/+0
2020-10-20hw/intc/bcm2836_control: Use IRQ definitions instead of magic numbersPhilippe Mathieu-Daudé1-4/+4
2020-10-20hw/intc/bcm2835_ic: Trace GPU/CPU IRQ handlersPhilippe Mathieu-Daudé2-1/+7
2020-10-01hw/intc/armv7m_nvic: Only show ID register values for Main Extension CPUsPeter Maydell1-0/+42
2020-10-01target/arm: Move id_pfr0, id_pfr1 into ARMISARegistersPeter Maydell1-2/+2
2020-09-23qemu/atomic.h: rename atomic_ to qatomic_Stefan Hajnoczi2-8/+8
2020-09-18Use OBJECT_DECLARE_SIMPLE_TYPE when possibleEduardo Habkost11-36/+12
2020-09-18sifive: Use DECLARE_*CHECKER* macrosEduardo Habkost1-2/+2
2020-09-18sifive: Move QOM typedefs and add missing includesEduardo Habkost1-2/+4
2020-09-13Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200...Peter Maydell5-0/+879
2020-09-09hw/riscv: Move sifive_plic model to hw/intcBin Meng4-0/+609