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2015-02-18hmp: Name HMP info handler functions hmp_info_SUBCOMMAND()Markus Armbruster2-4/+4
Some are called do_info_SUBCOMMAND() (old ones, usually), some hmp_info_SUBCOMMAND(), some SUBCOMMAND_info(), sometimes SUBCOMMAND pointlessly differs in spelling. Normalize to hmp_info_SUBCOMMAND(), where SUBCOMMAND is exactly the subcommand name with '-' replaced by '_'. Exceptions: * sun4m_irq_info(), sun4m_pic_info() renamed to sun4m_hmp_info_irq(), sun4m_hmp_info_pic(). * lm32_irq_info(), lm32_pic_info() renamed to lm32_hmp_info_irq(), lm32_hmp_info_pic(). Signed-off-by: Markus Armbruster <armbru@redhat.com>
2015-01-26apic: do not dereference pointer before it is checked for NULLPaolo Bonzini1-3/+5
Right now you only get to apic_init_reset if you have an APIC (do_cpu_init is reached only if CPU_INTERRUPT_INIT is set and that only happens in hw/intc/apic.c). However, this is wrong because for example a port 92 or keyboard controller reset is really an INIT, and that can happen also with no APIC. So keep the check and fix the error that Coverity reported. Reported-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-01-26vmstate: accept QEMUTimer in VMSTATE_TIMER*, add VMSTATE_TIMER_PTR*Paolo Bonzini1-1/+1
Old users of VMSTATE_TIMER* are mechanically changed to VMSTATE_TIMER_PTR variants. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-12-15Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell3-2/+5
- Migration and linuxboot fixes for 2.2 regressions - valgrind/KVM support - small i386 patches - PCI SD host controller support - malloc/free cleanups from Markus (x86/scsi) - IvyBridge model - XSAVES support for KVM - initial patches from record/replay # gpg: Signature made Mon 15 Dec 2014 16:35:08 GMT using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (47 commits) sdhci: Support SDHCI devices on PCI sdhci: Define SDHCI PCI ids sdhci: Add "sysbus" to sdhci QOM types and methods sdhci: Remove class "virtual" methods sdhci: Set a default frequency clock serial: only resample THR interrupt on rising edge of IER.THRI serial: update LSR on enabling/disabling FIFOs serial: clean up THRE/TEMT handling serial: reset thri_pending on IER writes with THRI=0 linuxboot: fix loading old kernels kvm/apic: fix 2.2->2.1 migration target-i386: add Ivy Bridge CPU model target-i386: add f16c and rdrand to Haswell and Broadwell target-i386: add VME to all CPUs pc: add 2.3 machine types i386: do not cross the pages boundaries in replay mode cpus: make icount warp behave well with respect to stop/cont timer: introduce new QEMU_CLOCK_VIRTUAL_RT clock cpu-exec: invalidate nocache translation if they are interrupted icount: introduce cpu_get_icount_raw ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-12-15kvm/apic: fix 2.2->2.1 migrationPaolo Bonzini1-0/+5
The wait_for_sipi field is set back to 1 after an INIT, so it was not effective to reset it in kvm_apic_realize. Introduce a reset callback and reset wait_for_sipi there. Reported-by: Igor Mammedov <imammedo@redhat.com> Cc: qemu-stable@nongnu.org Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-12-15KVM_CAP_IRQFD and KVM_CAP_IRQFD_RESAMPLE checksEric Auger2-2/+0
Compute kvm_irqfds_allowed by checking the KVM_CAP_IRQFD extension. Remove direct settings in architecture specific files. Add a new kvm_resamplefds_allowed variable, initialized by checking the KVM_CAP_IRQFD_RESAMPLE extension. Add a corresponding kvm_resamplefds_enabled() function. A special notice for s390 where KVM_CAP_IRQFD was not immediatly advirtised when irqfd capability was introduced in the kernel. KVM_CAP_IRQ_ROUTING was advertised instead. This was fixed in "KVM: s390: announce irqfd capability", ebc3226202d5956a5963185222982d435378b899 whereas irqfd support was brought in 84223598778ba08041f4297fda485df83414d57e, "KVM: s390: irq routing for adapter interrupts". Both commits first appear in 3.15 so there should not be any kernel version impacted by this QEMU modification. Signed-off-by: Eric Auger <eric.auger@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-12-11arm_gic_kvm: Tell kernel about number of IRQsPeter Maydell1-0/+20
Newer kernels support a device attribute on the GIC which allows us to tell it how many IRQs this GIC instance is configured with; use it, if it exists. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Message-id: 1417718679-1071-1-git-send-email-peter.maydell@linaro.org
2014-11-24apic: fix incorrect handling of ExtINT interrupts wrt processor priorityPaolo Bonzini1-4/+4
This fixes another failure with ExtINT, demonstrated by QNX. The failure mode is as follows: - IPI sent to cpu 0 (bit set in APIC irr) - IPI accepted by cpu 0 (bit cleared in irr, set in isr) - IPI sent to cpu 0 (bit set in both irr and isr) - PIC interrupt sent to cpu 0 The PIC interrupt causes CPU_INTERRUPT_HARD to be set, but apic_irq_pending observes that the highest pending APIC interrupt priority (the IPI) is the same as the processor priority (since the IPI is still being handled), so apic_get_interrupt returns a spurious interrupt rather than the pending PIC interrupt. The result is an endless sequence of spurious interrupts, since nothing will clear CPU_INTERRUPT_HARD. Instead, ExtINT interrupts should have ignored the processor priority. Calling apic_check_pic early in apic_get_interrupt ensures that apic_deliver_pic_intr is called instead of delivering the spurious interrupt. apic_deliver_pic_intr then clears CPU_INTERRUPT_HARD if needed. Reported-by: Richard Bilson <rbilson@qnx.com> Tested-by: Richard Bilson <rbilson@qnx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-24apic: fix loss of IPI due to masked ExtINTPaolo Bonzini1-1/+3
This patch fixes an obscure failure of the QNX kernel on QEMU x86 SMP. In QNX, all hardware interrupts come via the PIC, and are delivered by the cpu 0 LAPIC in ExtINT mode, while IPIs are delivered by the LAPIC in fixed mode. This bug happens as follows: - cpu 0 masks a particular PIC interrupt - IPI sent to cpu 0 (CPU_INTERRUPT_HARD is set) - before the IPI is accepted, the masked interrupt line is asserted by the device Since the interrupt is masked, apic_deliver_pic_intr will clear CPU_INTERRUPT_HARD. The IPI will still be set in the APIC irr, but since CPU_INTERRUPT_HARD is not set the cpu will not notice. Depending on the scenario this can cause a system hang, i.e. if cpu 0 is expected to unmask the interrupt. In order to fix this, do a full check of the APIC before an EXTINT is acknowledged. This can result in clearing CPU_INTERRUPT_HARD, but can also result in delivering the lost IPI. Reported-by: Richard Bilson <rbilson@qnx.com> Tested-by: Richard Bilson <rbilson@qnx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-24apic: avoid getting out of halted state on masked PIC interruptsPaolo Bonzini1-3/+5
After the next patch, if a masked PIC interrupts causes CPU_INTERRUPT_POLL to be set, the CPU will spuriously get out of halted state. While this is technically valid, we should avoid that. Make CPU_INTERRUPT_POLL run apic_update_irq in the right thread and then look at CPU_INTERRUPT_HARD. If CPU_INTERRUPT_HARD does not get set, do not report the CPU as having work. Also move the handling of software-disabled APIC from apic_update_irq to apic_irq_pending, and always trigger CPU_INTERRUPT_POLL. This will be important once we will add a case that resets CPU_INTERRUPT_HARD from apic_update_irq. We want to run it even if we go through CPU_INTERRUPT_POLL, and even if the local APIC is software disabled. Reported-by: Richard Bilson <rbilson@qnx.com> Tested-by: Richard Bilson <rbilson@qnx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-13apic_common: migrate missing fieldsPavel Dovgalyuk1-0/+38
This patch adds missed sipi_vector and wait_for_sipi fields to a new subsection of the vmstate of the apic_common module. Saving and loading of these fields makes migration of the apic state deterministic. Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru> [Initialize the field in pre_load and kvm_apic_realize. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-04PPC: openpic_kvm: Only map first occurence in address spaceAlexander Graf1-0/+19
The in-kernel OpenPIC emulation only supports a single map. However, we map the OpenPIC at 2 locations: The CPU visible one and the PCI visible one. For KVM acceleration, we only care about the first one. To make sure that we only map that first mapping and not the PCI map that happens dynamically later during bootup, ignore maps that happen when we are already considering ourselves mapped. Credits due are to Bogdan and Mihai for debugging this. Reported-by: Bogdan Purcareata <bogdan.purcareata@freescale.com> Reported-by: Mihai Caraman <mihai.caraman@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-10-24arm_gic: remove unused parameter.KONRAD Frederic3-4/+4
This removes num_irq parameter from gic_init_irqs_and_distributor as it is not used. Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com> Message-id: 1412859651-15060-1-git-send-email-fred.konrad@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-29hw/intc/imx_avic.c: Remove unused function imx_avic_set_prio()Peter Maydell1-9/+0
The function imx_avic_set_prio() is unused; delete it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1410723223-17711-3-git-send-email-peter.maydell@linaro.org
2014-09-02Fix debug print warningGonglei1-1/+1
Steps: 1.enable qemu debug print, using simply scprit as below: grep "//#define DEBUG" * -rl | xargs sed -i "s/\/\/#define DEBUG/#define DEBUG/g" 2. make -j 3. get some warning: hw/i2c/pm_smbus.c: In function 'smb_ioport_writeb': hw/i2c/pm_smbus.c:142: warning: format '%04x' expects type 'unsigned int', but argument 2 has type 'hwaddr' hw/i2c/pm_smbus.c:142: warning: format '%02x' expects type 'unsigned int', but argument 3 has type 'uint64_t' hw/i2c/pm_smbus.c: In function 'smb_ioport_readb': hw/i2c/pm_smbus.c:209: warning: format '%04x' expects type 'unsigned int', but argument 2 has type 'hwaddr' hw/intc/i8259.c: In function 'pic_ioport_read': hw/intc/i8259.c:373: warning: format '%02x' expects type 'unsigned int', but argument 2 has type 'hwaddr' hw/input/pckbd.c: In function 'kbd_write_command': hw/input/pckbd.c:232: warning: format '%02x' expects type 'unsigned int', but argument 2 has type 'uint64_t' hw/input/pckbd.c: In function 'kbd_write_data': hw/input/pckbd.c:333: warning: format '%02x' expects type 'unsigned int', but argument 2 has type 'uint64_t' hw/isa/apm.c: In function 'apm_ioport_writeb': hw/isa/apm.c:44: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'hwaddr' hw/isa/apm.c:44: warning: format '%02x' expects type 'unsigned int', but argument 3 has type 'uint64_t' hw/isa/apm.c: In function 'apm_ioport_readb': hw/isa/apm.c:67: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'hwaddr' hw/timer/mc146818rtc.c: In function 'cmos_ioport_write': hw/timer/mc146818rtc.c:394: warning: format '%02x' expects type 'unsigned int', but argument 3 has type 'uint64_t' hw/i386/pc.c: In function 'port92_write': hw/i386/pc.c:479: warning: format '%02x' expects type 'unsigned int', but argument 2 has type 'uint64_t' Fix them. Cc: qemu-trivial@nongnu.org Signed-off-by: Gonglei <arei.gonglei@huawei.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-08-29hw/intc/arm_gic: honor target mask in gic_update()Sergey Fedorov1-1/+2
Take IRQ target mask into account when determining the highest priority pending interrupt. Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Message-id: 1407947471-26981-1-git-send-email-serge.fdrv@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-29arm_gic: Use GIC_NR_SGIS constantAdam Lackorzynski1-1/+1
Use constant rather than a plain number. Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de> Message-id: 1408372255-12358-5-git-send-email-adam@os.inf.tu-dresden.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-29arm_gic: Do not force PPIs to edge-triggered modeAdam Lackorzynski1-1/+1
Only SGIs must be WI, done by forcing them to their default (edge-triggered). Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de> Message-id: 1408372255-12358-4-git-send-email-adam@os.inf.tu-dresden.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-29arm_gic: GICD_ICFGR: Write model only for pre v1 GICsAdam Lackorzynski1-4/+6
Setting the model is only available in pre-v1 GIC models. Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de> Message-id: 1408372255-12358-3-git-send-email-adam@os.inf.tu-dresden.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-29arm_gic: Fix read of GICD_ICFGRAdam Lackorzynski1-1/+1
The GICD_ICFGR register covers 4 interrupts per byte. Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de> Message-id: 1408372255-12358-2-git-send-email-adam@os.inf.tu-dresden.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-15intc: i8259: Convert Array allocation to g_new0Peter Crosthwaite1-1/+1
To be more array friendly and to indicate the IRQs are initially disconnected. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-08-15ppc: convert g_new(qemu_irq usages to g_new0Peter Crosthwaite1-1/+1
To indicate the IRQs are initially disconnected. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-08-15apic: Fix reported DFR contentJan Kiszka1-1/+1
IA-32 SDM, Figure 10-14: Bits 27:0 are reserved as 1. Fixes Jailhouse hypervisor start with in-kernel irqchips off. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-06-27xics: Implement xics_ics_free()Alexey Kardashevskiy1-0/+27
This implements interrupt release function so IRQs can be returned back to the pool for reuse in cases such as PCI hot plug. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-27spapr: Move interrupt allocator to xicsAlexey Kardashevskiy1-0/+88
The current allocator returns IRQ numbers from a pool and does not support IRQs reuse in any form as it did not keep track of what it previously returned, it only keeps the last returned IRQ. Some use cases such as PCI hot(un)plug may require IRQ release and reallocation. This moves an allocator from SPAPR to XICS. This switches IRQ users to use new API. This uses LSI/MSI flags to know if interrupt is allocated. The interrupt release function will be posted as a separate patch. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-27xics: Disable flags reset on xics resetAlexey Kardashevskiy2-0/+14
Since islsi[] array has been merged into the ICSState struct, we must not reset flags as they tell if the interrupt is in use. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-27xics: Add xics_find_source()Alexey Kardashevskiy1-5/+25
PAPR allows having multiple interrupt sources such as PHB. This adds a source lookup function and makes use of it. Since at the moment QEMU only supports a single source, no change in behaviour is expected. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-27xics: Add flags for interruptsAlexey Kardashevskiy2-11/+20
The existing interrupt allocation scheme in SPAPR assumes that interrupts are allocated at the start time, continously and the config will not change. However, there are cases when this is not going to work such as: 1. migration - we will have to have an ability to choose interrupt numbers for devices in the command line and this will create gaps in interrupt space. 2. PCI hotplug - interrupts from unplugged device need to be returned back to interrupt pool, otherwise we will quickly run out of interrupts. This replaces a separate lslsi[] array with a byte in the ICSIRQState struct and defines "LSI" and "MSI" flags. Neither of these flags set signals that the descriptor is not allocated and not in use. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-27spapr: Fix RTAS token numbersAlexey Kardashevskiy2-18/+12
At the moment spapr_rtas_register() allocates a new token number for every new RTAS callback so numbers are not fixed and depend on the number of supported RTAS handlers and the exact order of spapr_rtas_register() calls. These tokens are copied into the device tree and remain the same during the guest lifetime. When we start another guest to receive a migration, it calls spapr_rtas_register() as well. If the number of RTAS handlers or their order is different in QEMU on source and destination sides, the "/rtas" node in the device tree will differ. Since migration overwrites the device tree (as it overwrites the entire RAM), the actual RTAS config on the destination side gets broken. This defines global contant values for every RTAS token which QEMU is using today. This changes spapr_rtas_register() to accept a token number instead of allocating one. This changes all users of spapr_rtas_register(). This changes XICS-KVM not to cache tokens registered with KVM as they constant now. This makes TOKEN_BASE global as RTAS_XXX use TOKEN_BASE as a base. TOKEN_MAX is moved and renamed too and its value is changed to the last token + 1. Boundary checks for token values are adjusted. This reserves token numbers for "os-term" handlers and PCI hotplug which we are working on. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-19armv7m_nvic: fix AIRCR implementationOran Avraham1-1/+4
The returned reset value was wrong (off by one zero nibble), and qemu didn't log unimplemented writes to the PRIGROUP field. Signed-off-by: Oran Avraham <oranav@gmail.com> Message-id: 1403010447-4627-1-git-send-email-oranav@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-16PPC: openpic_kvm: Implement resetAlexander Graf1-5/+10
When we trigger a system reset, the in-kernel openpic controller should also get reset. This happens through a write to the GCR.RESET register which is the same mechanism a guest would use to manually reset the device. Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-16openpic: Reset IRQ source private membersPaul Janzen1-2/+2
The openpic emulation code maintains an allowable-CPU's bitmap ("destmask") for each IRQ source which is calculated from the IDR register value whenever the guest OS writes to it. However, if the guest OS relies on the system to set the IDR register to a default value at reset, and does not write IDR, then destmask does not get updated, and interrupts do not get propagated to the guest. Additionally, if an IRQ source is marked as critical, the source's internal "output" and "nomask" fields are not correctly reset when the PIC is reset. Fix both these issues by calling write_IRQreg_idr from within openpic_reset, instead of simply setting the IDR register to the specified idr_reset value. Signed-off-by: Paul Janzen <pcj@pauljanzen.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-16openpic: Move definition of openpic_resetPaul Janzen1-49/+50
This patch moves the definition of openpic_reset after the various register read/write functions. No functional change. It is in preparation for using the register read/write functions in openpic_reset. Signed-off-by: Paul Janzen <pcj@pauljanzen.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-16savevm: Remove all the unneeded version_minimum_id_old (x86)Juan Quintela2-2/+0
After previous Peter patch, they are redundant. This way we don't assign them except when needed. Once there, there were lots of case where the ".fields" indentation was wrong: .fields = (VMStateField []) { and .fields = (VMStateField []) { Change all the combinations to: .fields = (VMStateField[]){ The biggest problem (appart from aesthetics) was that checkpatch complained when we copy&pasted the code from one place to another. Signed-off-by: Juan Quintela <quintela@redhat.com> Acked-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
2014-06-16savevm: Remove all the unneeded version_minimum_id_old (ppc)Juan Quintela2-10/+5
After previous Peter patch, they are redundant. This way we don't assign them except when needed. Once there, there were lots of case where the ".fields" indentation was wrong: .fields = (VMStateField []) { and .fields = (VMStateField []) { Change all the combinations to: .fields = (VMStateField[]){ The biggest problem (appart from aesthetics) was that checkpatch complained when we copy&pasted the code from one place to another. Signed-off-by: Juan Quintela <quintela@redhat.com> Acked-by: Alexey Kardashevskiy <aik@ozlabs.ru>
2014-06-10hw/intc/openpic: Remove unused function IRQ_testbit()Peter Maydell1-5/+0
The IRQ_testbit() function is never used; remove it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-06-10s390x/kvm: inject via flicCornelia Huck1-0/+10
Try to inject floating interrupts via the flic if it is available. This allows us to inject the full range of floating interrupts. Reviewed-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2014-06-10s390x/kvm: make flic play well with old kernelsCornelia Huck1-2/+4
If we run with an old kernel that does not support KVM_CAP_IRQ_ROUTING, we don't have to do anything in the ->register_io_adapter and ->io_adapter_map callbacks and therefore should return 0 instead of -ENOSYS (just as the non-kvm flic does). This fixes using adapter interrupts when running under an older kernel, which broke with "s390x: add I/O adapter registration". Reported-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2014-06-09intc: xilinx_uartlite: Convert SBD::init -> instance_initPeter Crosthwaite1-10/+7
SysBusDevice::init is depracated. Convert to Object::init as prescribed by QOM conventions. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2014-05-20s390x/virtio-ccw: wire up irq routing and irqfdsCornelia Huck2-0/+87
Make use of the new s390 adapter irq routing support to enable real in-kernel irqfds for virtio-ccw with adapter interrupts. Note that s390 doesn't provide the common KVM_CAP_IRQCHIP capability, but rather needs KVM_CAP_S390_IRQCHIP to be enabled. This is to ensure backward compatibility. Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2014-05-20s390x: add I/O adapter registrationCornelia Huck2-0/+45
Register an I/O adapter interrupt source for when virtio-ccw devices start using adapter interrupts. Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2014-05-20s390x: split flic into kvm and non-kvm partsCornelia Huck3-287/+357
Introduce a common parent class for both cases, where kvm and non-kvm can hook up callbacks. This will be used by follow-on patches for adapter registration and mapping. We now always have a flic, regardless of whether we use kvm; the non-kvm implementation just doesn't do anything. Reviewed-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2014-05-15Merge remote-tracking branch 'remotes/juanquintela/tags/migration/20140515' ↵Peter Maydell2-6/+3
into staging migration/next for 20140515 # gpg: Signature made Thu 15 May 2014 02:32:25 BST using RSA key ID 5872D723 # gpg: Can't check signature: public key not found * remotes/juanquintela/tags/migration/20140515: usb: fix up post load checks migration: show average throughput when migration finishes savevm: Remove all the unneeded version_minimum_id_old (rest) savevm: Remove all the unneeded version_minimum_id_old (usb) Split ram_save_block arch_init: Simplify code for load_xbzrle() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-05-15Merge remote-tracking branch ↵Peter Maydell5-7/+2
'remotes/pmaydell/tags/pull-target-arm-20140513' into staging target-arm queue: * update libvixl to 1.4 * remove version_minimum_id_old from ARM devices * stellaris_enet tx/rx/migration overhaul * various minor fixes for coverity issues # gpg: Signature made Tue 13 May 2014 16:25:12 BST using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * remotes/pmaydell/tags/pull-target-arm-20140513: hw/arm/omap_gpmc: Avoid buffer overrun filling prefetch FIFO hw/arm/stellaris: Correct handling of GPTM TAR register hw/timer/exynos4210_mct: Avoid overflow in exynos4210_ltick_recalc_count hw/dma/omap_dma: Add (uint32_t) casts when shifting uint16_t by 16 hw/arm/omap1: Avoid unintended sign extension writing omap_rtc YEARS_REG hw/net/cadence_gem: Remove dead code hw/intc/allwinner-a10-pic: Add missing 'break' target-arm/helper.c: Don't flush the TLB if SCTLR is rewritten unchanged hw/net/stellaris_enet: Convert to vmstate hw/net/stellaris_enet: Get rid of rx_fifo pointer hw/net/stellaris_enet: Fix debug format strings hw/net/stellaris_enet: Correctly implement the TR and THR registers hw/net/stellaris_enet: Rewrite tx fifo handling code hw/net/stellaris_enet: Correct handling of packet padding hw/net/stellaris_enet: Restructure tx_fifo code to avoid buffer overrun savevm: Remove all the unneeded version_minimum_id_old (arm) disas/libvixl: Update to libvixl 1.4 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-05-14savevm: Remove all the unneeded version_minimum_id_old (rest)Juan Quintela2-6/+3
After previous Peter patch, they are redundant. This way we don't assign them except when needed. Once there, there were lots of case where the ".fields" indentation was wrong: .fields = (VMStateField []) { and .fields = (VMStateField []) { Change all the combinations to: .fields = (VMStateField[]){ The biggest problem (appart from aesthetics) was that checkpatch complained when we copy&pasted the code from one place to another. Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2014-05-13hw/intc/allwinner-a10-pic: Add missing 'break'Peter Maydell1-0/+1
Add missing 'break' after handling of AW_A10_PIC_BASE_ADDR write. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
2014-05-13savevm: Remove all the unneeded version_minimum_id_old (arm)Juan Quintela5-7/+1
After commit 767adce2d, they are redundant. This way we don't assign them except when needed. Once there, there were lots of cases where the ".fields" indentation was wrong: .fields = (VMStateField []) { and .fields = (VMStateField []) { Change all the combinations to: .fields = (VMStateField[]){ The biggest problem (apart from aesthetics) was that checkpatch complained when we copy&pasted the code from one place to another. Signed-off-by: Juan Quintela <quintela@redhat.com> [PMM: fixed minor conflict, corrected commit message typos] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-05-13apic: do not accept SIPI on the bootstrap processorPaolo Bonzini1-1/+1
SIPI interrupts are ignored on the bootstrap. Never accept one. Cc: Andreas Faerber <afaerber@suse.de> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-05-13xilinx_intc: Fix writes into MER registerGuenter Roeck1-0/+3
The MER register only has two valid bits. This is now used by the linux kernel to auto-detect endianness, and causes Linux 3.15-rc1 and later to hang when run under qemu-microblaze. Mask valid bits before writing the register to solve the problem. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> [Edgar: Untabified] Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2014-05-07Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell3-2/+4
pc,net,MAINTAINERS,build updates MAINTAINERS updated with link to the security process documentation apic version modified to make more guests happy On top of that, bugfixes all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Wed 07 May 2014 17:15:29 BST using RSA key ID D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" * remotes/mst/tags/for_upstream: configure: make source tree build more robust MAINTAINERS: addresses for responsible disclosure pm_smbus: correctly report unclaimed cycles smbus: return -1 if nothing found at the given address smbus: allow returning an error from reads apic: use emulated lapic version 0x14 on pc machines >= 2.1 pc: add compat_props placeholder for 2.0 machine type i8259: don't abort when trying to use level sensitive irqs acpi: fix tables for no-hpet configuration acpi-build: properly decrement objects' reference counters acpi/pcihp.c: Rewrite acpi_pcihp_get_bsel using object_property_get_int Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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