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Author
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Lines
2017-09-21
nvic: Support banked exceptions in acknowledge and complete
Peter Maydell
1
-2
/
+2
2017-09-21
nvic: Make SHPR registers banked
Peter Maydell
1
-1
/
+1
2017-09-21
nvic: Make set_pending and clear_pending take a secure parameter
Peter Maydell
1
-2
/
+2
2017-09-21
nvic: Handle banked exceptions in nvic_recompute_state()
Peter Maydell
1
-0
/
+1
2017-09-21
nvic: Add cached vectpending_prio state
Peter Maydell
1
-1
/
+1
2017-08-01
trace-events: fix code style: print 0x before hex numbers
Vladimir Sementsov-Ogievskiy
1
-78
/
+78
2017-08-01
trace-events: fix code style: %# -> 0x%
Vladimir Sementsov-Ogievskiy
1
-10
/
+10
2017-07-31
docs: fix broken paths to docs/devel/tracing.txt
Philippe Mathieu-Daudé
1
-1
/
+1
2017-07-14
s390x/flic: introduce inject_airq callback
Yi Min Zhao
1
-0
/
+4
2017-02-28
armv7m: Rewrite NVIC to not use any GIC code
Michael Davidsaver
1
-0
/
+15
2017-01-31
trace: clean up trace-events files
Stefan Hajnoczi
1
-1
/
+0
2017-01-20
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
Peter Maydell
1
-0
/
+7
2017-01-20
hw/intc/arm_gicv3: Implement gicv3_cpuif_virt_update()
Peter Maydell
1
-0
/
+2
2017-01-20
hw/intc/arm_gicv3: Implement ICV_ registers EOIR and IAR
Peter Maydell
1
-0
/
+2
2017-01-20
hw/intc/arm_gicv3: Implement ICV_ HPPIR, DIR and RPR registers
Peter Maydell
1
-0
/
+3
2017-01-20
hw/intc/arm_gicv3: Implement ICV_ registers which are just accessors
Peter Maydell
1
-0
/
+10
2017-01-20
hw/intc/arm_gicv3: Add accessors for ICH_ system registers
Peter Maydell
1
-0
/
+16
2017-01-16
x86: ioapic: add traces for ioapic
Peter Xu
1
-0
/
+7
2016-10-17
hw/intc/arm_gicv3: Fix ICC register tracepoints
Peter Maydell
1
-7
/
+7
2016-10-14
ppc/xics: Split ICS into ics-base and ics class
Benjamin Herrenschmidt
1
-5
/
+5
2016-10-14
ppc/xics: Make the ICSState a list
Benjamin Herrenschmidt
1
-2
/
+3
2016-08-12
trace-events: fix first line comment in trace-events
Laurent Vivier
1
-1
/
+1
2016-06-20
trace: split out trace events for hw/intc/ directory
Daniel P. Berrange
1
-0
/
+123