Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2022-07-06 | ppc: Define SETFIELD for the ppc target | Alexey Kardashevskiy | 1 | -20/+0 |
2022-06-20 | pnv/xive2: Access direct mapped thread contexts from all chips | Frederic Barrat | 1 | -4/+14 |
2022-05-26 | pnv/xive2: Don't overwrite PC registers when writing TCTXT registers | Frederic Barrat | 1 | -3/+0 |
2022-03-02 | pnv/xive2: Add support for 8bits thread id | Cédric Le Goater | 1 | -0/+5 |
2022-03-02 | pnv/xive2: Add support for automatic save&restore | Cédric Le Goater | 1 | -1/+17 |
2022-03-02 | xive2: Add a get_config() handler for the router configuration | Cédric Le Goater | 1 | -0/+13 |
2022-03-02 | pnv/xive2: Add support XIVE2 P9-compat mode (or Gen1) | Cédric Le Goater | 1 | -5/+17 |
2022-03-02 | ppc/pnv: add XIVE Gen2 TIMA support | Cédric Le Goater | 1 | -2/+25 |
2022-03-02 | pnv/xive2: Introduce new capability bits | Cédric Le Goater | 1 | -2/+2 |
2022-03-02 | ppc/xive: Add support for PQ state bits offload | Cédric Le Goater | 1 | -3/+34 |
2022-03-02 | ppc/pnv: Add a XIVE2 controller to the POWER10 chip | Cédric Le Goater | 1 | -0/+2028 |