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path: root/hw/intc/pnv_xive2.c
AgeCommit message (Expand)AuthorFilesLines
2023-07-07pnv/xive2: Always pass a presenter object when accessing the TIMAFrederic Barrat1-2/+4
2023-07-07pnv/xive2: Fix TIMA offset for indirect accessFrederic Barrat1-2/+18
2023-07-07pnv/xive2: Allow indirect TIMA accesses of all sizesFrederic Barrat1-2/+2
2023-06-25pnv/xive2: Check TIMA special ops against a dedicated array for P10Frederic Barrat1-32/+0
2023-06-25pnv/xive2: Add a get_config() method on the presenter classFrederic Barrat1-0/+12
2023-06-10pnv/xive2: Quiet down some error messagesFrederic Barrat1-0/+4
2023-06-10pnv/xive2: Handle TIMA access through all portsFrederic Barrat1-0/+4
2023-06-10pnv/xive2: Allow writes to the Physical Thread Enable registersFrederic Barrat1-0/+1
2023-06-10pnv/xive2: Add definition for the ESB cache configuration registerFrederic Barrat1-0/+7
2023-06-10pnv/xive2: Add definition for TCTXT Config registerFrederic Barrat1-1/+7
2023-01-20include/hw/ppc: Split pnv_chip.h off pnv.hMarkus Armbruster1-0/+1
2022-07-06ppc: Define SETFIELD for the ppc targetAlexey Kardashevskiy1-20/+0
2022-06-20pnv/xive2: Access direct mapped thread contexts from all chipsFrederic Barrat1-4/+14
2022-05-26pnv/xive2: Don't overwrite PC registers when writing TCTXT registersFrederic Barrat1-3/+0
2022-03-02pnv/xive2: Add support for 8bits thread idCédric Le Goater1-0/+5
2022-03-02pnv/xive2: Add support for automatic save&restoreCédric Le Goater1-1/+17
2022-03-02xive2: Add a get_config() handler for the router configurationCédric Le Goater1-0/+13
2022-03-02pnv/xive2: Add support XIVE2 P9-compat mode (or Gen1)Cédric Le Goater1-5/+17
2022-03-02ppc/pnv: add XIVE Gen2 TIMA supportCédric Le Goater1-2/+25
2022-03-02pnv/xive2: Introduce new capability bitsCédric Le Goater1-2/+2
2022-03-02ppc/xive: Add support for PQ state bits offloadCédric Le Goater1-3/+34
2022-03-02ppc/pnv: Add a XIVE2 controller to the POWER10 chipCédric Le Goater1-0/+2028
generated by cgit v1.1 at 2025-01-26 15:37:39 +0000