index
:
riscv-gnu-toolchain/qemu.git
block
master
stable-0.10
stable-0.11
stable-0.12
stable-0.13
stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
stable-1.3
stable-1.4
stable-1.5
stable-1.6
stable-1.7
stable-2.0
stable-2.1
stable-2.10
stable-2.11
stable-2.12
stable-2.2
stable-2.3
stable-2.4
stable-2.5
stable-2.6
stable-2.7
stable-2.8
stable-2.9
stable-3.0
stable-3.1
stable-4.0
stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.1
stable-7.2
stable-8.0
stable-8.1
stable-8.2
stable-9.0
stable-9.1
stable-9.2
staging
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
staging-9.1
staging-9.2
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
hw
/
intc
/
arm_gic.c
Age
Commit message (
Expand
)
Author
Files
Lines
2021-02-02
hw/intc/arm_gic: Fix interrupt ID in GICD_SGIR register
Philippe Mathieu-Daudé
1
-1
/
+1
2021-02-02
hw/intc/arm_gic: Allow to use QTest without crashing
Philippe Mathieu-Daudé
1
-1
/
+2
2021-01-08
intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs
Edgar E. Iglesias
1
-1
/
+3
2020-02-28
arm_gic: Mask the un-supported priority bits
Sai Pavan Boddu
1
-2
/
+31
2019-08-21
hw/core: Move cpu.c, cpu.h from qom/ to hw/core/
Markus Armbruster
1
-1
/
+1
2019-08-16
Include hw/irq.h a lot less
Markus Armbruster
1
-0
/
+1
2019-06-12
Include qemu/module.h where needed, drop it from qemu-common.h
Markus Armbruster
1
-0
/
+1
2018-09-25
hw/intc/arm_gic: Drop GIC_BASE_IRQ macro
Peter Maydell
1
-17
/
+14
2018-08-24
hw/intc/arm_gic: Make per-cpu GICH memory regions 0x200 bytes large
Peter Maydell
1
-1
/
+1
2018-08-14
intc/arm_gic: Improve traces
Luc Michel
1
-6
/
+25
2018-08-14
intc/arm_gic: Implement maintenance interrupt generation
Luc Michel
1
-0
/
+97
2018-08-14
intc/arm_gic: Implement gic_update_virt() function
Luc Michel
1
-39
/
+136
2018-08-14
intc/arm_gic: Implement the virtual interface registers
Luc Michel
1
-2
/
+233
2018-08-14
intc/arm_gic: Wire the vCPU interface
Luc Michel
1
-2
/
+35
2018-08-14
intc/arm_gic: Implement virtualization extensions in gic_cpu_(read|write)
Luc Michel
1
-5
/
+15
2018-08-14
intc/arm_gic: Implement virtualization extensions in gic_(deactivate|complete...
Luc Michel
1
-4
/
+47
2018-08-14
intc/arm_gic: Implement virtualization extensions in gic_acknowledge_irq
Luc Michel
1
-19
/
+33
2018-08-14
intc/arm_gic: Implement virtualization extensions in gic_(activate_irq|drop_p...
Luc Michel
1
-12
/
+38
2018-08-14
intc/arm_gic: Add virtualization enabled IRQ helper functions
Luc Michel
1
-18
/
+14
2018-08-14
intc/arm_gic: Refactor secure/ns access check in the CPU interface
Luc Michel
1
-17
/
+22
2018-08-14
intc/arm_gic: Add virtualization extensions helper macros and functions
Luc Michel
1
-0
/
+5
2018-08-14
intc/arm_gic: Add the virtualization extensions to the GIC state
Luc Michel
1
-1
/
+1
2018-08-14
intc/arm_gic: Remove some dead code and put some functions static
Luc Michel
1
-21
/
+2
2018-08-14
intc/arm_gic: Implement GICD_ISACTIVERn and GICD_ICACTIVERn registers
Luc Michel
1
-4
/
+57
2018-08-14
intc/arm_gic: Refactor operations on the distributor
Luc Michel
1
-77
/
+86
2018-07-16
hw/intc/arm_gic: Fix handling of GICD_ITARGETSR
Peter Maydell
1
-2
/
+4
2018-07-16
hw/intc/arm_gic: Check interrupt number in gic_deactivate_irq()
Peter Maydell
1
-1
/
+15
2018-02-05
qdev: use device_class_set_parent_realize/unrealize/reset()
Philippe Mathieu-Daudé
1
-2
/
+1
2018-01-25
hw/intc/arm_gic: Fix the NS view of C_BPR when C_CTRL.CBPR is 1
Luc MICHEL
1
-3
/
+13
2018-01-25
hw/intc/arm_gic: Fix group priority computation for group 1 IRQs
Luc MICHEL
1
-1
/
+2
2018-01-25
hw/intc/arm_gic: Fix C_RPR value on idle priority
Luc MICHEL
1
-0
/
+5
2018-01-25
hw/intc/arm_gic: Prevent the GIC from signaling an IRQ when it's "active and ...
Luc MICHEL
1
-0
/
+1
2018-01-11
hw/intc/arm_gic: reserved register addresses are RAZ/WI
Peter Maydell
1
-2
/
+3
2017-07-11
ARM: KVM: Enable in-kernel timers with user space gic
Alexander Graf
1
-0
/
+7
2017-03-09
hw/intc/arm_gic: modernise the DPRINTF
Alex Bennée
1
-4
/
+9
2017-02-28
arm: gic: Remove references to NVIC
Michael Davidsaver
1
-26
/
+5
2016-11-07
nvic: set pending status for not active interrupts
Marcin Krzeminski
1
-2
/
+20
2016-06-06
hw/intc/gic: RAZ/WI non-sec access to sec interrupts
Jens Wiklander
1
-6
/
+62
2016-05-19
hw: explicitly include qemu/log.h
Paolo Bonzini
1
-0
/
+1
2016-05-16
hw/intc/arm_gic: add tracepoints
Hollis Blanchard
1
-0
/
+12
2016-03-22
include/qemu/osdep.h: Don't include qapi/error.h
Markus Armbruster
1
-0
/
+1
2016-03-04
hw/intc/arm_gic.c: Implement GICv2 GICC_DIR
Peter Maydell
1
-1
/
+44
2016-01-29
arm: Clean up includes
Peter Maydell
1
-0
/
+1
2016-01-21
arm_gic: Update ID registers based on revision
Alistair Francis
1
-5
/
+30
2015-11-19
hw/arm_gic: Correctly restore nested irq priority
François Baldassari
1
-2
/
+2
2015-11-10
hw/intc/arm_gic: Remove the definition of NUM_CPU
Wei Huang
1
-5
/
+3
2015-09-11
maint: remove double semicolons in many files
Daniel P. Berrange
1
-1
/
+1
2015-09-08
hw/intc/arm_gic: Actually set the active bits for active interrupts
Peter Maydell
1
-0
/
+2
2015-09-08
hw/intc/arm_gic: Drop running_irq and last_active arrays
Peter Maydell
1
-29
/
+74
2015-09-08
hw/intc/arm_gic: Fix handling of GICC_APR<n>, GICC_NSAPR<n> registers
Peter Maydell
1
-2
/
+112
[next]