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i386
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intel_iommu.c
Age
Commit message (
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Author
Files
Lines
2017-05-25
intel_iommu: support passthrough (PT)
Peter Xu
1
-59
/
+172
2017-05-25
intel_iommu: allow dev-iotlb context entry conditionally
Peter Xu
1
-13
/
+36
2017-05-25
intel_iommu: use IOMMU_ACCESS_FLAG()
Peter Xu
1
-1
/
+1
2017-05-25
intel_iommu: provide vtd_ce_get_type()
Peter Xu
1
-1
/
+6
2017-05-25
intel_iommu: renaming context entry helpers
Peter Xu
1
-12
/
+12
2017-05-25
memory: tune last param of iommu_ops.translate()
Peter Xu
1
-2
/
+2
2017-05-18
Merge remote-tracking branch 'mst/tags/for_upstream' into staging
Stefan Hajnoczi
1
-2
/
+12
2017-05-17
iommu: Remove FIXME comment about user_creatable=true
Eduardo Habkost
1
-4
/
+1
2017-05-17
sysbus: Set user_creatable=false by default on TYPE_SYS_BUS_DEVICE
Eduardo Habkost
1
-0
/
+5
2017-05-10
iommu: Don't crash if machine is not PC_MACHINE
Eduardo Habkost
1
-2
/
+12
2017-04-20
intel_iommu: enable remote IOTLB
Peter Xu
1
-13
/
+178
2017-04-20
intel_iommu: allow dynamic switch of IOMMU region
Peter Xu
1
-5
/
+76
2017-04-20
intel_iommu: provide its own replay() callback
Peter Xu
1
-5
/
+177
2017-04-20
intel_iommu: use the correct memory region for device IOTLB notification
Jason Wang
1
-1
/
+1
2017-02-17
intel_iommu: vtd_slpt_level_shift check level
Peter Xu
1
-0
/
+1
2017-02-17
intel_iommu: convert dbg macros to trace for trans
Peter Xu
1
-45
/
+24
2017-02-17
intel_iommu: convert dbg macros to traces for inv
Peter Xu
1
-57
/
+38
2017-02-17
intel_iommu: renaming gpa to iova where proper
Peter Xu
1
-22
/
+22
2017-02-17
intel_iommu: simplify irq region translation
Peter Xu
1
-22
/
+6
2017-02-17
intel_iommu: add "caching-mode" option
Aviv Ben-David
1
-0
/
+5
2017-02-01
intel_iommu: fix and simplify size calculation in process_device_iotlb_desc()
Jason Wang
1
-1
/
+9
2017-01-10
intel_iommu: support device iotlb descriptor
Jason Wang
1
-5
/
+78
2017-01-10
intel_iommu: allocate new key when creating new address space
Jason Wang
1
-2
/
+3
2017-01-10
intel_iommu: name vtd address space with devfn
Jason Wang
1
-1
/
+3
2017-01-10
intel_iommu: allow migration
Peter Xu
1
-1
/
+21
2016-11-30
intel_iommu: fix incorrect device invalidate
Peter Xu
1
-0
/
+1
2016-11-15
intel_iommu: fix incorrect assert
Peter Xu
1
-1
/
+1
2016-11-15
intel_iommu: fix several incorrect endianess and bit fields
Peter Xu
1
-1
/
+1
2016-11-15
intel_iommu: fixing source id during IOTLB hash key calculation
Jason Wang
1
-1
/
+1
2016-10-17
intel_iommu: reject broken EIM
Radim Krčmář
1
-1
/
+15
2016-10-17
intel_iommu: add OnOffAuto intr_eim as "eim" property
Radim Krčmář
1
-3
/
+21
2016-10-17
intel_iommu: redo configuraton check in realize
Radim Krčmář
1
-8
/
+18
2016-10-17
intel_iommu: pass whole remapped addresses to apic
Radim Krčmář
1
-12
/
+9
2016-10-10
intel-iommu: Check IOAPIC's Trigger Mode against the one in IRTE
Feng Wu
1
-0
/
+12
2016-09-27
intel_iommu, amd_iommu: allow UNMAP notifiers
Peter Xu
1
-4
/
+8
2016-09-27
memory: introduce IOMMUOps.notify_flag_changed
Peter Xu
1
-2
/
+4
2016-09-24
hw/i386: AMD IOMMU IVRS table
David Kiarie
1
-0
/
+1
2016-07-21
intel_iommu: avoid unnamed fields
Michael S. Tsirkin
1
-21
/
+21
2016-07-21
intel_iommu: disallow kernel-irqchip=on with IR
Peter Xu
1
-0
/
+11
2016-07-21
intel_iommu: support all masks in interrupt entry cache invalidation
Radim Krčmář
1
-1
/
+1
2016-07-21
intel_iommu: add SID validation for IR
Peter Xu
1
-11
/
+58
2016-07-21
intel_iommu: Add support for Extended Interrupt Mode
Jan Kiszka
1
-7
/
+9
2016-07-21
x86-iommu: introduce IEC notifiers
Peter Xu
1
-7
/
+29
2016-07-21
intel_iommu: add support for split irqchip
Peter Xu
1
-0
/
+7
2016-07-21
q35: ioapic: add support for emulated IOAPIC IR
Peter Xu
1
-1
/
+5
2016-07-21
intel_iommu: get rid of {0} initializers
Michael S. Tsirkin
1
-3
/
+3
2016-07-20
intel_iommu: Add support for PCI MSI remap
Peter Xu
1
-0
/
+239
2016-07-20
intel_iommu: handle interrupt remap enable
Peter Xu
1
-0
/
+20
2016-07-20
intel_iommu: define interrupt remap table addr register
Peter Xu
1
-1
/
+51
2016-07-20
intel_iommu: set IR bit for ECAP register
Peter Xu
1
-0
/
+6
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