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AgeCommit message (Expand)AuthorFilesLines
2018-10-15i2c: switch ddc to use the new edid generatorGerd Hoffmann1-192/+8
2018-09-25aspeed/i2c: Fix receive done interrupt handlingGuenter Roeck1-1/+9
2018-09-25aspeed/i2c: Handle receive command in separate functionGuenter Roeck1-16/+21
2018-09-25aspeed/i2c: interrupts should be cleared by software onlyCédric Le Goater1-4/+12
2018-08-23i2c: pm_smbus: Add the ability to force block transfer enableCorey Minyard2-2/+5
2018-08-23i2c: pm_smbus: Don't delay host status register busy bit when interrupts are ...Corey Minyard1-6/+13
2018-08-23i2c: pm_smbus: Add interrupt handlingCorey Minyard2-1/+29
2018-08-23i2c: pm_smbus: Add block transfer capabilityCorey Minyard2-13/+146
2018-08-23i2c: pm_smbus: Make the I2C block read command read-onlyCorey Minyard1-5/+4
2018-08-23i2c: pm_smbus: Fix the semantics of block I2C transfersCorey Minyard2-15/+32
2018-08-23i2c: pm_smbus: Clean up some style issuesCorey Minyard1-20/+38
2018-07-03ppc4xx_i2c: Rewrite to model hardware more closelyBALATON Zoltan1-142/+157
2018-06-26hw/i2c/omap_i2c: Use qemu_log_mask(UNIMP) instead of fprintfPhilippe Mathieu-Daudé1-8/+12
2018-06-21ppc4xx_i2c: Implement directcntl registerBALATON Zoltan1-1/+13
2018-06-21ppc4xx_i2c: Remove unimplemented sdata and intr registersBALATON Zoltan1-15/+1
2018-06-12ppc4xx_i2c: Clean up and improve error loggingBALATON Zoltan1-43/+51
2018-06-08hw/i2c: Add trace eventsPhilippe Mathieu-Daudé2-7/+25
2018-06-08smbus: add a smbus_eeprom_init_one() routineCédric Le Goater1-5/+11
2018-06-01hw/i2c: Use DeviceClass::realize instead of I2CSlaveClass::initPhilippe Mathieu-Daudé1-13/+0
2018-06-01hw/i2c/smbus: Use DeviceClass::realize instead of SMBusDeviceClass::initPhilippe Mathieu-Daudé2-12/+2
2018-03-01hw/i2c-ddc: Do not fail writesLinus Walleij1-2/+2
2018-03-01i2c: Move the bus class to i2c.hCorey Minyard1-17/+0
2018-03-01i2c: Fix some brace style issuesCorey Minyard1-2/+1
2018-02-09Include qapi/error.h exactly where neededMarkus Armbruster1-1/+0
2018-02-05i2c: Add a CONFIG_I2C master switch to the configuration filesThomas Huth1-1/+1
2018-01-22Replace all occurances of __FUNCTION__ with __func__Alistair Francis1-3/+3
2018-01-16Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell1-1/+1
2018-01-16maint: Fix macros with broken 'do/while(0); ' usageEric Blake1-1/+1
2018-01-11Merge remote-tracking branch 'origin/master' into HEADMichael S. Tsirkin3-32/+168
2018-01-10ppc4xx_i2c: Implement basic I2C functionsBALATON Zoltan1-30/+168
2017-12-22smbus: do not immediately complete commandsHervé Poussineau1-1/+15
2017-12-18hw/i2c: remove old i386 dependencyPhilippe Mathieu-Daudé2-2/+0
2017-10-15pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devicesEduardo Habkost1-0/+4
2017-09-27migration: pre_save return intDr. David Alan Gilbert1-1/+3
2017-09-21hw/i2c/omap_i2c.c: Don't use old_mmioPeter Maydell1-12/+32
2017-09-08ppc4xx_i2c: Move to hw/i2cBALATON Zoltan2-0/+217
2017-06-02Merge remote-tracking branch 'remotes/juanquintela/tags/migration/20170601' i...Peter Maydell1-0/+1
2017-06-02aspeed/i2c: introduce a state machineCédric Le Goater1-3/+33
2017-06-02aspeed/i2c: handle LAST command under the RX commandCédric Le Goater1-3/+6
2017-06-02aspeed/i2c: improve command handlingCédric Le Goater1-6/+18
2017-06-01migration: Split qemu-file.hJuan Quintela1-0/+1
2017-05-17qdev: Replace cannot_instantiate_with_device_add_yet with !user_creatableEduardo Habkost3-3/+3
2017-01-20arm: Uniquely name imx25 I2C buses.Alastair D'Silva1-1/+1
2017-01-09i2c: Allow I2C devices to NAK start eventsCorey Minyard3-11/+37
2016-12-27hw/i2c: Add a NULL check for i2c slave init callbacksAlastair D'Silva1-1/+5
2016-11-07hw/i2c/bitbang_i2c: Handle NACKs from devicesPeter Maydell1-4/+15
2016-10-24i2c: Add asserts for second smbus i2c_start_transfer()Corey Minyard2-4/+15
2016-10-24i2c: Fix SMBus read transactions to avoid double eventsCorey Minyard1-13/+19
2016-08-03i2c: fix migration regression introduced by broadcast supportIgor Mammedov1-3/+7
2016-06-29ICH9 SMB: make TYPE_ICH9_SMB_DEVICE macro publicEfimov Vasily1-1/+0
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