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2012-12-11hw/arm_boot, exynos4210, highbank: Fix secondary boot GIC initPeter Maydell1-3/+7
Fix the code in the secondary CPU boot stubs so that it correctly initialises the GIC rather than relying on bugs or implementation dependent aspects of the QEMU GIC implementation: * set the GIC_PMR.Priority field to all-ones, so that all interrupts are passed through. The default of all-zeroes means all interrupts are masked, and QEMU only booted because of a bug in the priority masking in our GIC implementation. * add a barrier after GIC setup and before WFI to ensure that GIC config is complete before we go into a possible low power state. This isn't needed with the software GIC model but could be required when using KVM and executing this code on the real hardware CPU. Note that of the three secondary stub implementations, only the common generic one needs to support both v6 and v7 DSB encodings; highbank and exynos4210 will always be v7 CPUs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Igor Mitsyanko <i.mitsyanko@samsung.com>
2012-07-20exynos4210: add Exynos4210 i2c implementationMitsyanko Igor1-0/+27
Create 9 exynos4210 i2c interfaces. Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-07-04Exynos4: add RTC deviceOleg Ogurtsov1-0/+8
Signed-off-by: Oleg Ogurtsov <o.ogurtsov@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-07-04hw/exynos4210.c: Fix misleading initialization of IROM mirrorEvgeny Voevodin1-1/+1
We want to mirror whole IROM and should pass zero instead of EXYNOS4210_IROM_BASE_ADDR (though it equals to zero too) since memory_region_init_alias takes an offset within an original region as an argument. Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-19ARM: Exynos4210 IRQ: Introduce new IRQ gate functionality.Evgeny Voevodin1-15/+17
New IRQ gate consists of n_in input qdev gpio lines and one output sysbus IRQ line. The output IRQ level is formed as OR between all gpio inputs. Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-11arm_pic: Pass ARMCPU to arm_pic_init_cpu()Andreas Färber1-1/+2
Pass it through to arm_pic_cpu_handler(). Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Igor Mitsyanko <i.mitsyanko@samsung.com> (for exynos)
2012-06-11exynos4210: Use cpu_arm_init() to store ARMCPUAndreas Färber1-3/+3
Needed for arm_pic_init_cpu(). Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Igor Mitsyanko <i.mitsyanko@samsung.com>
2012-06-11arm_boot: Pass ARMCPU to arm_boot_info::write_secondary_boot()Andreas Färber1-1/+1
Adapt exynos4210 and highbank accordingly. The parameter itself is unused. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Igor Mitsyanko <i.mitsyanko@samsung.com> (for exynos)
2012-04-13ARM: Exynos4210: Drop gic_cpu_write() after initialization.Evgeny Voevodin1-0/+30
Remove gic_cpu_write() call after initialization that was emulating functionality of earliest SOC bootloader which enables external GIC CPU1 interface. Instead introduce Exynos4210-specific secondary CPU bootloader, which enables both Internal and External GIC CPU1 interfaces. Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17Exynos4210: added display controller implementationMitsyanko Igor1-0/+10
Exynos4210 display controller (FIMD) has 5 hardware windows with alpha and chroma key blending functions. Signed-off-by: Mitsyanko Igor <i.mitsyanko@samsung.com> Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17ARM: exynos4210: MCT support.Evgeny Voevodin1-0/+19
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17ARM: exynos4210: basic Power Management Unit implementationMaksim Kozlov1-0/+9
Patch adds basic model for Exynos4210 SoC PMU. This model implements PMU registers just as a bulk of memory. Currently, the only reason this device exists is that secondary CPU boot loader uses PMU INFORM5 register as a holding pen. Signed-off-by: Maksim Kozlov <m.kozlov@samsung.com> Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17ARM: exynos4210: PWM support.Evgeny Voevodin1-0/+12
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17ARM: exynos4210: UART supportMaksim Kozlov1-0/+29
Add basic support of exynos4210 UART Signed-off-by: Maksim Kozlov <m.kozlov@samsung.com> Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17ARM: Samsung exynos4210-based boards emulationEvgeny Voevodin1-0/+191
Add initial support of NURI and SMDKC210 boards Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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