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AgeCommit message (Expand)AuthorFilesLines
2021-04-09cpu/core: Fix "help" of CPU core device typesGreg Kurz1-2/+8
2020-09-22cpu/core: Register core-id and nr-threads as class propertiesEduardo Habkost1-4/+4
2020-09-22qom: simplify object_find_property / object_class_find_propertyDaniel P. Berrangé2-3/+3
2020-09-18Use OBJECT_DECLARE_SIMPLE_TYPE when possibleEduardo Habkost1-3/+1
2020-09-09Use DECLARE_*CHECKER* macrosEduardo Habkost1-2/+2
2020-09-09Move QOM typedefs and add missing includesEduardo Habkost1-2/+4
2020-08-24hw/cpu/a9mpcore: Verify the machine use Cortex-A9 coresPhilippe Mathieu-Daudé1-1/+11
2020-08-21meson: convert hw/cpuMarc-André Lureau2-5/+6
2020-07-10error: Eliminate error_propagate() with Coccinelle, part 1Markus Armbruster5-34/+14
2020-07-10qapi: Use returned bool to check for failure, Coccinelle partMarkus Armbruster1-4/+2
2020-07-10qdev: Use returned bool to check for qdev_realize() etc. failureMarkus Armbruster4-24/+12
2020-06-15sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 3Markus Armbruster1-3/+2
2020-06-15sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 2Markus Armbruster4-29/+22
2020-05-15qom: Drop parameter @errp of object_property_add() & friendsMarkus Armbruster1-2/+2
2020-02-28cpu/arm11mpcore: Set number of GIC priority bits to 4Sai Pavan Boddu1-0/+5
2020-02-28cpu/a9mpcore: Set number of GIC priority bits to 5Sai Pavan Boddu1-0/+4
2020-01-24qdev: set properties with device_class_set_props()Marc-André Lureau5-5/+5
2019-08-21hw/core: Move cpu.c, cpu.h from qom/ to hw/core/Markus Armbruster2-2/+2
2019-08-16Include hw/qdev-properties.h lessMarkus Armbruster5-0/+5
2019-08-16Include hw/irq.h a lot lessMarkus Armbruster4-0/+4
2019-07-05general: Replace global smp variables with smp machine propertiesLike Xu1-1/+3
2019-06-12Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster5-0/+6
2019-03-07kconfig: introduce kconfig filesPaolo Bonzini1-0/+8
2019-02-06hw/cpu/cluster: Mark the cpu-cluster device with user_creatable = falseThomas Huth1-0/+3
2019-01-29qom/cpu: Add cluster_index to CPUStatePeter Maydell1-0/+46
2019-01-07hw/cpu: introduce CPU clustersLuc Michel2-1/+51
2018-08-24hw/cpu/a15mpcore: If CPU has EL2, enable it on the GIC and wire it upPeter Maydell1-3/+28
2018-07-17hw/*/realview: Fix introspection problem with 'realview_mpcore' & 'realview_gic'Thomas Huth1-4/+4
2018-07-17hw/cpu/arm11mpcore: Fix introspection problem with 'arm11mpcore_priv'Thomas Huth1-8/+6
2018-07-17hw/cpu/a9mpcore: Fix introspection problems with the "a9mpcore_priv" deviceThomas Huth1-10/+8
2018-07-17hw/cpu/a15mpcore: Fix introspection problem with the a15mpcore_priv deviceThomas Huth1-5/+3
2017-12-18hw: use "qemu/osdep.h" as first #include in source filesPhilippe Mathieu-Daudé1-0/+1
2017-08-02cpu: don't allow negative core idLaurent Vivier1-0/+5
2017-06-09hw/cpu: core.c can be compiled as common objectThomas Huth1-2/+1
2017-01-27Introduce DEVICE_CATEGORY_CPU for CPU devicesThomas Huth1-0/+8
2016-06-17cpu: Abstract CPU core typeBharata B Rao2-0/+89
2016-05-19explicitly include qom/cpu.hPaolo Bonzini1-0/+1
2016-03-22include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster4-0/+4
2016-03-04hw/intc/arm_gic.c: Implement GICv2 GICC_DIRPeter Maydell1-1/+1
2016-01-29hw: Clean up includesPeter Maydell1-0/+1
2016-01-29arm devices: Clean up includesPeter Maydell3-0/+3
2015-10-02icc_bus: drop the unused filesZhu Guihua2-119/+0
2015-09-14hw/cpu/{a15mpcore, a9mpcore}: Handle missing has_el3 CPU props gracefullyEdgar E. Iglesias2-2/+2
2015-09-08hw/cpu/{a15mpcore, a9mpcore}: enable TrustZone in GIC if it is enabled in CPUsPeter Maydell2-0/+24
2015-08-13hw/cpu/a15mpcore: Wire up hyp and secure physical timer interruptsPeter Maydell1-7/+14
2015-08-13Introduce gic_class_name() instead of repeating conditionPavel Fedin1-6/+2
2014-11-03icc_bus: fix typo ICC_BRIGDE -> ICC_BRIDGEZhu Guihua1-2/+2
2014-10-15target-i386: ICC bus: Drop BusState::allow_hotplugIgor Mammedov1-8/+0
2013-12-24icc_bus: QOM'ify ICCxiaoqiang zhao1-8/+6
2013-12-10cpu/a9mpcore: Add Global TimerFrançois LEGAL1-5/+21
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