| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2012-01-27 | sysbus: apic: ioapic: convert to QEMU Object Model | Anthony Liguori | 1 | -9/+16 | |
| This converts three devices because apic and ioapic are subclasses of sysbus. Converting subclasses independently of their base class is prohibitively hard. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> | |||||
| 2012-01-04 | add L2x0/PL310 cache controller device | Rob Herring | 1 | -0/+181 | |
| This is just a dummy device for ARM L2 cache controllers, based on the pl310. The cache type parameter can be defined by a property value and has a meaningful default. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> [Peter Maydell: removed stray blank line at end] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | |||||
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index : riscv-gnu-toolchain/qemu.git | |
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