aboutsummaryrefslogtreecommitdiff
path: root/hw/arm_boot.c
AgeCommit message (Collapse)AuthorFilesLines
2013-01-26hw/arm_boot: Align device tree to 4KB boundary, not pagePeter Maydell1-3/+6
Align the device tree blob to a 4KB boundary, not to QEMU's idea of a page boundary -- the latter is the smallest possible page size for the architecture, which on ARM is 1KB. The documentation for Linux does not impose separation or alignment requirements on the device tree blob, but in practice some kernels will happily trash the entire page the initrd ends in after they have finished uncompressing the initrd. So 4KB-align the DTB to ensure it does not get trampled by these kernels. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-19softmmu: move include files to include/sysemu/Paolo Bonzini1-2/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19misc: move include files to include/qemu/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19janitor: do not rely on indirect inclusions of or from qemu-char.hPaolo Bonzini1-0/+1
Various header files rely on qemu-char.h including qemu-config.h or main-loop.h, but they really do not need qemu-char.h at all (particularly interesting is the case of the block layer!). Clean this up, and also add missing inclusions of qemu-char.h itself. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-11hw/arm_boot, exynos4210, highbank: Fix secondary boot GIC initPeter Maydell1-3/+14
Fix the code in the secondary CPU boot stubs so that it correctly initialises the GIC rather than relying on bugs or implementation dependent aspects of the QEMU GIC implementation: * set the GIC_PMR.Priority field to all-ones, so that all interrupts are passed through. The default of all-zeroes means all interrupts are masked, and QEMU only booted because of a bug in the priority masking in our GIC implementation. * add a barrier after GIC setup and before WFI to ensure that GIC config is complete before we go into a possible low power state. This isn't needed with the software GIC model but could be required when using KVM and executing this code on the real hardware CPU. Note that of the three secondary stub implementations, only the common generic one needs to support both v6 and v7 DSB encodings; highbank and exynos4210 will always be v7 CPUs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Igor Mitsyanko <i.mitsyanko@samsung.com>
2012-11-01arm_boot: Change initrd load address to "halfway through RAM"Peter Maydell1-15/+25
To avoid continually having to bump the initrd load address to account for larger kernel images, put the initrd halfway through RAM. This allows large kernels on new boards with lots of RAM to work OK, without breaking existing usecases for boards with only 32MB of RAM. Note that this change fixes in passing a bug where we were passing an overly large max_size to load_image_targphys() for the initrd, which meant that we wouldn't correctly refuse to load an enormous initrd that didn't actually fit into RAM. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Tested-by: Cole Robinson <crobinso@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity1-7/+7
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-07-20hw/arm_boot.c: Support DTBs which use 64 bit addressesPeter Maydell1-3/+32
Support the case where the device tree blob specifies that #address-cells and #size-cells are greater than 1. (This is needed for device trees which can handle 64 bit physical addresses and thus total RAM sizes over 4GB.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-07-20hw/arm_boot.c: Check for RAM sizes exceeding ATAGS capacityPeter Maydell1-0/+6
The legacy ATAGS format for passing information to the kernel only allows RAM sizes which fit in 32 bits; enforce this restriction rather than silently doing something weird. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-07-20hw/arm_boot.c: Consistently use ram_size from arm_boot_info structPeter Maydell1-2/+3
Clean up the mix of getting the RAM size from the global ram_size and from the ram_size field in the arm_boot_info structure, so that we always use the structure field. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-06-19arm_boot: Conditionalised DTB command line updatePeter A. G. Crosthwaite1-4/+6
The DTB command line should only be overwritten if the user provides a command line with -append. Otherwise whatever command line was in the DTB should stay unchanged. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-11arm_boot: Pass ARMCPU to arm_load_kernel()Andreas Färber1-2/+2
In particular this simplifies the &s->mpu->cpu->env expression again. first_cpu and ->next_cpu are expected to be QOM'ified later. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Igor Mitsyanko <i.mitsyanko@samsung.com> (for exynos) Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-11arm_boot: Pass ARMCPU to arm_boot_info::secondary_cpu_reset_hook()Andreas Färber1-2/+4
Adapt highbank accordingly. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-11arm_boot: Pass ARMCPU to arm_boot_info::write_secondary_boot()Andreas Färber1-3/+3
Adapt exynos4210 and highbank accordingly. The parameter itself is unused. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Igor Mitsyanko <i.mitsyanko@samsung.com> (for exynos)
2012-06-04arm_boot: Pass ARMCPU to do_cpu_reset()Andreas Färber1-3/+6
Allows us to use cpu_reset() in place of cpu_state_reset(). Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-14arm hw/: Don't use CPUStateAndreas Färber1-4/+4
Scripted conversion: for file in hw/arm-misc.h hw/arm_boot.c hw/arm_pic.c hw/armv7m.c hw/exynos4210.h hw/highbank.c hw/integratorcp.c hw/musicpal.c hw/omap.h hw/pxa.h hw/pxa2xx_gpio.c hw/pxa2xx_pic.c hw/realview.c hw/strongarm.h hw/versatilepb.c hw/vexpress.c hw/xilinx_zynq.c ; do sed -i "s/CPUState/CPUARMState/g" $file done Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14Rename cpu_reset() to cpu_state_reset()Andreas Färber1-1/+1
Frees the identifier cpu_reset for QOM CPUs (manual rename). Don't hide the parameter type behind explicit casts, use static functions with strongly typed argument to indirect. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-02arm: add device tree supportGrant Likely1-6/+96
If compiled with CONFIG_FDT, allow user to specify a device tree file using the -dtb argument. If the machine supports it then the dtb will be loaded into memory and passed to the kernel on boot. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> [Peter Maydell: Use machine opt rather than global to pass dtb filename] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17arm_boot: Pass base address of GIC CPU interface, not whole GICPeter Maydell1-4/+4
The arm_boot secondary boot loader code needs the address of the GIC CPU interface. Obtaining this from the base address of the private peripheral region was possible for A9 and 11MPcore, but the A15 puts the GIC CPU interface in a different place. So make boards pass in the GIC CPU interface address directly. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17hw/arm: Remove redundant arguments from set_kernel_args*Stefan Weil1-9/+8
The parameters initrd_size and base are already included in the info parameter, so there is no need to pass them separately. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>,
2012-01-26arm_boot: support board IDs more than 16 bits widePeter Maydell1-6/+5
Support passing a board ID value to the kernel in r1 that is more than 16 bits wide. This is needed to pass the '-1 == invalid' value for boards which only support device tree booting. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
2012-01-26arm: add secondary cpu boot callbacks to arm_boot.cMark Langsdorf1-11/+43
Create two functions, write_secondary_boot() and secondary_cpu_reset_hook(), to allow platforms more control of how secondary CPUs are brought up. The new functions default to NULL and aren't called unless they are populated so there are no changes to existing platform models. Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-01-17hw/arm_boot.c: Make SMP boards specify address to poll in bootup loopEvgeny Voevodin1-8/+10
The secondary CPU bootloader in arm_boot.c holds secondary CPUs in a pen until the primary CPU releases them. Make boards specify the address to be polled to determine whether to leave the pen (it was previously hardcoded to 0x10000030, which is a Versatile Express/ Realview specific system register address). Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-07-23Correct spelling of licensedMatthew Fernandez1-1/+1
Correct typos of "licenced" to "licensed". Reviewed-by: Stefan Weil <weil@mail.berlios.de> Reviewed-by: Andreas F=E4rber <andreas.faerber@web.de> Signed-off-by: Matthew Fernandez <matthew.fernandez@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-07-04arm: Add const attribute to some arm_boot_info pointersStefan Weil1-3/+3
Parameter 'info' is const, so add the missing attribute. v2: Add 'const' to the local variable info in do_cpu_reset() and to the boot_info field in CPUARMState (suggested by Peter Maydell). Cc: Andrzej Zaborowski <balrogg@gmail.com> Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-04-20hw/arm_boot.c: move initrd load address up to accommodate large kernelsPeter Maydell1-1/+1
Newer kernels are large enough that they can overlap the address where qemu places the initrd. Move the initrd up so that there is enough space for the kernel again. Unfortunately it's not possible to automatically determine the size of the kernel if it is compressed, so this is the best we can do. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06target-arm: Integrate secondary CPU reset in arm_bootAdam Lackorzynski1-8/+15
Integrate secondary CPU reset into arm_boot, removing it from realview.c. On non-Linux systems secondary CPUs start with the same entry as the boot CPU. Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-31arm: fix arm kernel boot for non zero start addrLars Munch1-0/+1
Booting an arm kernel has been broken a while when booting from non zero start address. This is due to the order of events: board init loads the kernel and sets register 15 to the start address and then qemu_system_reset reset the cpu making register 15 zero again. This patch fixes the usage of the register 15 start address trick in combination with arm_load_kernel. Signed-off-by: Lars Munch <lars@segv.dk> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-16load_elf: replace the address addend by a translation functionAurelien Jarno1-2/+2
A few machines need to translate the ELF header addresses into physical addresses. Currently the only possibility is to add a value to the addresses. This patch replaces the addend argument by and a translation function and an opaque passed to the function. A NULL function does not translate the address. The patch also convert all machines that have an addend, simplify the PowerPC kernel loading and fix the MIPS kernel loading using this new feature. Other machines may benefit from this feature. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-11-19ARM PBX-A9 board supportPaul Brook1-3/+4
Implement ARM RealView PBX-A9 board support. Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-11-11Fix ARM MCore secondary cpu bootPaul Brook1-2/+2
Make MPCore secondary cpu initialization work with the new reset handling. Also change the inital FLAG value from 3 to zero to match recent kenrels. Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-11-11Fix ARM system emulationPaul Brook1-28/+37
Since 45a50b1 load_image_targphys should only be called once. ARM boards incorrectly call it every time the system is reset. Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori1-5/+5
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Get rid of _t suffixmalc1-5/+5
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
2009-09-20Compile loader only onceBlue Swirl1-2/+12
Callers must pass ELF machine, byte swapping and symbol LSB clearing information to ELF loader. A.out loader needs page size information, pass that too as a parameter. Extract prototypes to a separate file. Move loader.[ch] and elf_ops.h under hw. Adjust callers. Also use target_phys_addr_t instead of target_ulong for addresses: loader addresses aren't virtual. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-06-29Revert "Introduce reset notifier order"Jan Kiszka1-1/+1
This reverts commit 8217606e6edb49591b4a6fd5a0d1229cebe470a9 (and updates later added users of qemu_register_reset), we solved the problem it originally addressed less invasively. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-05-22Introduce reset notifier orderJan Kiszka1-1/+1
Add the parameter 'order' to qemu_register_reset and sort callbacks on registration. On system reset, callbacks with lower order will be invoked before those with higher order. Update all existing users to the standard order 0. Note: At least for x86, the existing users seem to assume that handlers are called in their registration order. Therefore, the patch preserves this property. If someone feels bored, (s)he could try to identify this dependency and express it properly on callback registration. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-04-09Use load_image_targphys.pbrook1-11/+6
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7054 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-09Use guest memory access functions when setting up arm boorloader.pbrook1-67/+82
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7053 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-07clean build: Fix arm build warningsaurel321-1/+1
Fix remaining arm warnings - except for the mess in the NetWinder FP emulator. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6766 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-20uImage: rename load_uboot() to load_uimage() (Hollis Blanchard)aliguori1-2/+2
u-boot is a firmware. uImage is an executable file format. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5764 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-20uImage: return base load address (Hollis Blanchard)aliguori1-1/+2
Return the base address at which the image was loaded so that callers may keep track of currently occupied guest memory. This will be required by the PPC 440 embedded code to avoid hard coding a device model/initrd location. Other users of this function could make use of this parameter to avoid hard coding these locations in the future too. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5763 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-14Move the excess of arm_load_kernel() parameters into a struct.balrog1-55/+63
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4212 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17Break up vl.h.pbrook1-1/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11ARMv7 support.pbrook1-1/+21
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3572 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths1-3/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-27Optionally setup old style linux bootparams for -kernel, by Juergen Lock.balrog1-1/+77
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3089 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-30Account for machine with RAM which is not mapped at 0x0 in arm_boot.c.balrog1-9/+10
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2757 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01Improved initrd support for mips.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2574 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-11ARM reabbot support (orginal patch by Aurelien Jarno).pbrook1-0/+19
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2476 c046a42c-6fe2-441c-8c8c-71466251a162
generated by cgit v1.1 at 2024-10-01 20:28:34 +0000