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2025-05-14hw/arm: Replace TABs for spaces in OMAP board and device codeSantiago Monserrat Campanello2-509/+509
In hw/arm and include/hw/arm, some source files for the OMAP SoC and the sx1 boards that are our only remaining OMAP boards still have hard-coded tabs (almost entirely used for the indent on inline comments, not for actual code indent). Replace the tabs with spaces using vim :retab. I used 4 spaces except in some defines and comments where I tried to put everything aligned in the same column for better readability. This commit is a purely whitespace-only change. Signed-off-by: Santiago Monserrat Campanello <santimonserr@gmail.com> Message-id: 20250505131130.82206-1-santimonserr@gmail.com Resolves: https://gitlab.com/qemu-project/qemu/-/issues/373 [PMM: expanded commit message] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/virt: Remove deprecated virt-4.0 machinePhilippe Mathieu-Daudé1-7/+0
This machine has been supported for a period of more than 6 years. According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type deprecation & removal") it can now be removed. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250429153907.31866-5-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/virt: Remove deprecated virt-3.1 machinePhilippe Mathieu-Daudé1-7/+0
This machine has been supported for a period of more than 6 years. According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type deprecation & removal") it can now be removed. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250429153907.31866-4-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/virt: Remove deprecated virt-3.0 machinePhilippe Mathieu-Daudé1-7/+0
This machine has been supported for a period of more than 6 years. According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type deprecation & removal") it can now be removed. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250429153907.31866-3-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/virt: Update comment about Multiprocessor Affinity RegisterPhilippe Mathieu-Daudé1-6/+1
Support on ARMv7 has been dropped in commit 82bf7ae84ce ("target/arm: Remove KVM support for 32-bit Arm hosts"). Update the comment in virt_cpu_mp_affinity() to avoid mentioning it. Suggested-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250429153907.31866-2-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm: Attach PSPI module to NPCM8XX SoCTim Lee1-1/+10
Nuvoton's PSPI is a general purpose SPI module which enables connections to SPI-based peripheral devices. Attach it to the NPCM8XX. Tested: NPCM8XX PSPI driver probed successfully from dmesg log. Signed-off-by: Tim Lee <timlee660101@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Message-id: 20250414020629.1867106-1-timlee660101@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/virt: Remove VirtMachineClass::no_highmem_ecam fieldPhilippe Mathieu-Daudé1-1/+1
The VirtMachineClass::no_highmem_ecam field was only used by virt-2.12 machine, which got removed. Remove it and simplify virt_instance_init(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/virt: Remove deprecated virt-2.12 machinePhilippe Mathieu-Daudé1-11/+0
This machine has been supported for a period of more than 6 years. According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type deprecation & removal") it can now be removed. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/virt: Remove VirtMachineClass::smbios_old_sys_ver fieldPhilippe Mathieu-Daudé1-3/+1
The VirtMachineClass::smbios_old_sys_ver field was only used by virt-2.11 machine, which got removed. Remove it and simplify virt_build_smbios(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/virt: Remove deprecated virt-2.11 machinePhilippe Mathieu-Daudé1-10/+0
This machine has been supported for a period of more than 6 years. According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type deprecation & removal") it can now be removed. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/virt: Remove deprecated virt-2.10 machinePhilippe Mathieu-Daudé1-9/+0
This machine has been supported for a period of more than 6 years. According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type deprecation & removal") it can now be removed. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/virt: Remove deprecated virt-2.9 machinePhilippe Mathieu-Daudé1-7/+0
This machine has been supported for a period of more than 6 years. According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type deprecation & removal") it can now be removed. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/virt: Remove VirtMachineClass::claim_edge_triggered_timers fieldPhilippe Mathieu-Daudé2-9/+1
The VirtMachineClass::claim_edge_triggered_timers field was only used by virt-2.8 machine, which got removed. Remove it and simplify fdt_add_timer_nodes() and build_gtdt(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/virt: Remove deprecated virt-2.8 machinePhilippe Mathieu-Daudé1-13/+0
This machine has been supported for a period of more than 6 years. According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type deprecation & removal") it can now be removed. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/virt: Remove VirtMachineClass::no_its fieldPhilippe Mathieu-Daudé2-13/+8
The VirtMachineClass::no_its field was only used by virt-2.7 machine, which got removed. Remove it and simplify virt_instance_init() and virt_acpi_build(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/virt: Remove deprecated virt-2.7 machinePhilippe Mathieu-Daudé1-13/+0
This machine has been supported for a period of more than 6 years. According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type deprecation & removal") it can now be removed. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/virt: Remove VirtMachineClass::disallow_affinity_adjustmentPhilippe Mathieu-Daudé1-16/+15
The VirtMachineClass::disallow_affinity_adjustment field was only used by virt-2.6 machine, which got removed. Remove it and simplify virt_cpu_mp_affinity(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> [PMM: Remove now-unused variable] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/virt: Remove VirtMachineClass::no_pmu fieldPhilippe Mathieu-Daudé1-4/+0
The VirtMachineClass::no_pmu field was only used by virt-2.6 machine, which got removed. Remove it and simplify machvirt_init(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/virt: Remove deprecated virt-2.6 machinePhilippe Mathieu-Daudé1-12/+0
This machine has been supported for a period of more than 6 years. According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type deprecation & removal") it can now be removed. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06hw/arm/npcm8xx_boards: Correct valid_cpu_types setting of NPCM8XX SoCTim Lee1-1/+1
NPCM8XX SoC is the successor of the NPCM7XX. It features quad-core Cortex-A35 (Armv8, 64-bit) CPUs and some additional peripherals. Correct the `valid_cpu_types` setting to match the NPCM8XX SoC. Cc: qemu-stable@nongnu.org Fixes: 7e70eb3cad7c83 ("hw/arm: Add NPCM845 Evaluation board") Signed-off-by: Tim Lee <timlee660101@gmail.com> Message-id: 20250428022934.3081139-1-timlee660101@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-05hw/arm: Introduce ASPEED AST2700 A1 full core machineSteven Lee2-1/+195
- Added new machine type `ast2700fc` with full core support. - Defined `Ast2700FCState` structure for the new machine type. - Implemented initialization functions for CA35, SSP, and TSP components. - Updated `ast2700fc_types` to include the new machine type. - Set machine class properties for `ast2700fc`. Test Step: - Download ast2700-default-obmc.tar.gz from AspeedTech-BMC OpenBmc release page. - Run the following QEMU command: ``` IMGDIR=~/path/to/image UBOOT_SIZE=$(stat --format=%s -L ${IMGDIR}/u-boot-nodtb.bin) ./qemu-system-aarch64 -machine ast2700fc \ -device loader,force-raw=on,addr=0x400000000,file=${IMGDIR}/u-boot-nodtb.bin \ -device loader,force-raw=on,addr=$((0x400000000 + ${UBOOT_SIZE})),file=${IMGDIR}/u-boot.dtb \ -device loader,force-raw=on,addr=0x430000000,file=${IMGDIR}/bl31.bin \ -device loader,force-raw=on,addr=0x430080000,file=${IMGDIR}/tee-raw.bin \ -device loader,cpu-num=0,addr=0x430000000 \ -device loader,cpu-num=1,addr=0x430000000 \ -device loader,cpu-num=2,addr=0x430000000 \ -device loader,cpu-num=3,addr=0x430000000 \ -device loader,file=${IMGDIR}/ast2700-ssp.elf,cpu-num=4 \ -device loader,file=${IMGDIR}/ast2700-tsp.elf,cpu-num=5 \ -drive file=${IMGDIR}/image-bmc,if=mtd,format=raw \ -serial pty -serial pty -serial pty \ -snapshot \ -S -nographic ``` - After starting QEMU, serial devices will be redirected: char device redirected to /dev/pts/51 (label serial0) char device redirected to /dev/pts/52 (label serial1) char device redirected to /dev/pts/53 (label serial2) - serial0 is the console for the four Cortex-A35 primary processors, serial1 and serial2 are the consoles for the two Cortex-M4 coprocessors. - Connect to the consoles using a terminal emulator. Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Change-Id: I32447b9372a78eb53a07135afef59c2a19202328 Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-8-steven_lee@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-05hw/arm/aspeed_ast27x0-tsp: Introduce AST27x0 A1 TSP SoCSteven Lee2-0/+295
AST2700 TSP(Tertiary Service Processor) is a Cortex-M4 coprocessor The patch adds support for TSP with following update: - Introduce Aspeed27x0TSPSoCState structure in aspeed_soc.h - Implement initialization and realization functions - Add support for UART, INTC, and SCU devices - Map unimplemented devices for IPC and SCUIO - Defined memory map and IRQ maps for AST27x0 A1 TSP SoC The IRQ mapping is similar to AST2700 CA35 SoC, featuring a two-level interrupt controller. Difference from AST2700: - AST2700 - Support GICINT128 to GICINT136 in INTC - The INTCIO GIC_192_201 has 10 output pins, mapped as follows: Bit 0 -> GIC 192 Bit 1 -> GIC 193 Bit 2 -> GIC 194 Bit 3 -> GIC 195 Bit 4 -> GIC 196 - AST2700-tsp - Support TSPINT128 to TSPINT136 in INTC - The INTCIO TSPINT_160_169 has 10 output pins, mapped as follows: Bit 0 -> TSPINT 160 Bit 1 -> TSPINT 161 Bit 2 -> TSPINT 162 Bit 3 -> TSPINT 163 Bit 4 -> TSPINT 164 Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Change-Id: I69eec2b68b26ef04187b2922c5f2e584b9076c66 Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-7-steven_lee@aspeedtech.com [ clg: removed local 'Error* err' in aspeed_soc_ast27x0tsp_realize() ] Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-05hw/arm/aspeed_ast27x0-ssp: Introduce AST27x0 A1 SSP SoCSteven Lee2-0/+295
The AST2700 SSP (Secondary Service Processor) is a Cortex-M4 coprocessor. This patch adds support for A1 SSP with the following updates: - Introduce Aspeed27x0SSPSoCState structure in aspeed_soc.h - Define memory map and IRQ map for AST27x0 A1 SSP SoC - Implement initialization and realization functions - Add support for UART, INTC, and SCU devices - Map unimplemented devices for IPC and SCUIO The IRQ mapping is similar to AST2700 CA35 SoC, featuring a two-level interrupt controller. Difference from AST2700: - AST2700 - Support GICINT128 to GICINT136 in INTC - The INTCIO GIC_192_201 has 10 output pins, mapped as follows: Bit 0 -> GIC 192 Bit 1 -> GIC 193 Bit 2 -> GIC 194 Bit 3 -> GIC 195 Bit 4 -> GIC 196 - AST2700-ssp - Support SSPINT128 to SSPINT136 in INTC - The INTCIO SSPINT_160_169 has 10 output pins, mapped as follows: Bit 0 -> SSPINT 160 Bit 1 -> SSPINT 161 Bit 2 -> SSPINT 162 Bit 3 -> SSPINT 163 Bit 4 -> SSPINT 164 Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Change-Id: I924bf1a657f1e83f9e16d6673713f4a06ecdb496 Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-6-steven_lee@aspeedtech.com [ clg: removed local 'Error* err' in aspeed_soc_ast27x0ssp_realize() ] Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-05aspeed: ast27x0: Correct hex notation for device addressesSteven Lee1-14/+14
Corrected the hexadecimal notation for several device addresses in the aspeed_soc_ast2700_memmap array by changing the uppercase 'X' to lowercase 'x'. Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Change-Id: I45426e18ea8e68d7ccdf9b60c4ea235c4da33cc3 Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-3-steven_lee@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-05aspeed: ast27x0: Map unimplemented devices in SoC memorySteven Lee1-7/+45
Maps following unimplemented devices in SoC memory - dpmcu - iomem - iomem0 - iomem1 - ltpi Iomem, Iomem0 and Iomem1 include unimplemented controllers in the memory ranges 0x0 - 0x1000000, 0x120000000 - 0x121000000 and 0x14000000 - 0x141000000. For instance: - USB hub at 0x12010000 - eSPI at 0x14C5000 - PWM at 0x140C0000 DPMCU stands for Display Port MCU controller. LTPI is used to connect to AST1700. AST1700 is an I/O expander that supports the DC-SCM 2.1 LTPI protocol. It provides AST2700 with additional GPIO, UART, I3C, and other interfaces. Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Change-Id: Iae4db49a4818af3e2c43c16a27fc76329d2405d6 Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-2-steven_lee@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-05hw/arm/aspeed: Add support for loading vbootrom image via "-bios"Jamin Lin1-0/+36
Introduce "aspeed_load_vbootrom()" to support loading a virtual boot ROM image into the vbootrom memory region, using the "-bios" command-line option. Introduce a new "vbootrom" field in the AspeedMachineClass to indicate whether a machine supports the virtual boot ROM region. Set this field to true by default for the AST2700-A0 and AST2700-A1 EVB machines. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Nabih Estefan <nabihestefan@google.com> Tested-by: Nabih Estefan <nabihestefan@google.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250424075135.3715128-4-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-05hw/arm/aspeed_ast27x0 Introduce vbootrom memory regionJamin Lin1-0/+9
Introduce a new vbootrom memory region. The region is mapped at address "0x00000000" and has a size of 128KB, identical to the SRAM region size. This memory region is intended for loading a vbootrom image file as part of the boot process. The vbootrom registered in the SoC's address space using the ASPEED_DEV_VBOOTROM index. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Nabih Estefan <nabihestefan@google.com> Tested-by: Nabih Estefan <nabihestefan@google.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250424075135.3715128-2-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-05hw/arm/aspeed_ast27x0: Rename variable sram_name to name in ast2700 realizeJamin Lin1-4/+4
The variable "sram_name" was only used for naming the SRAM memory region. Rename it to "name" for consistency with similar code and avoid unnecessary new local variable declarations. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Tested-by: Nabih Estefan <nabihestefan@google.com> Link: https://lore.kernel.org/qemu-devel/20250423072350.541742-2-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-05hw/arm: ast27x0: Wire up EHCI controllersTroy Lee1-0/+28
AST27x0 has 4 EHCI controllers, where each CPU and I/O die has 2 instances. This patch use existing TYPE_PLATFORM_EHCI. After wiring up the EHCI controller, the ast2700a1-evb can find up to 4 USB EHCI interfaces. ehci-platform 12061000.usb: EHCI Host Controller ehci-platform 12061000.usb: new USB bus registered, assigned bus number 2 ehci-platform 12063000.usb: EHCI Host Controller ehci-platform 12063000.usb: new USB bus registered, assigned bus number 3 ehci-platform 12061000.usb: irq 88, io mem 0x12061000 ehci-platform 12063000.usb: irq 90, io mem 0x12063000 ehci-platform 14121000.usb: EHCI Host Controller ehci-platform 14123000.usb: EHCI Host Controller ehci-platform 12061000.usb: USB 2.0 started, EHCI 1.00 ehci-platform 14121000.usb: new USB bus registered, assigned bus number 5 ehci-platform 14123000.usb: new USB bus registered, assigned bus number 6 ehci-platform 14121000.usb: irq 91, io mem 0x14121000 ehci-platform 14123000.usb: irq 92, io mem 0x14123000 ehci-platform 12063000.usb: USB 2.0 started, EHCI 1.00 usb usb2: Manufacturer: Linux 6.6.78-dirty-bafd2830c17c-gbafd2830c17c-dirty ehci_hcd usb usb3: Manufacturer: Linux 6.6.78-dirty-bafd2830c17c-gbafd2830c17c-dirty ehci_hcd ehci-platform 14121000.usb: USB 2.0 started, EHCI 1.00 usb usb5: Manufacturer: Linux 6.6.78-dirty-bafd2830c17c-gbafd2830c17c-dirty ehci_hcd ehci-platform 14123000.usb: USB 2.0 started, EHCI 1.00 usb usb6: Manufacturer: Linux 6.6.78-dirty-bafd2830c17c-gbafd2830c17c-dirty ehci_hcd Note that, AST27x0A0 only has 2 EHCI controllers due to hw issue. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250317065938.1902272-2-troy_lee@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-04-25qom: Make InterfaceInfo[] uses constPhilippe Mathieu-Daudé3-3/+3
Mechanical change using: $ sed -i -E 's/\(InterfaceInfo.?\[/\(const InterfaceInfo\[/g' \ $(git grep -lE '\(InterfaceInfo.?\[\]\)') Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250424194905.82506-7-philmd@linaro.org>
2025-04-25qom: Constify TypeInfo::class_dataPhilippe Mathieu-Daudé1-1/+1
All callers now correctly expect a const class data. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250424194905.82506-5-philmd@linaro.org>
2025-04-25qom: Have class_init() take a const data argumentPhilippe Mathieu-Daudé63-147/+161
Mechanical change using gsed, then style manually adapted to pass checkpatch.pl script. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250424194905.82506-4-philmd@linaro.org>
2025-04-24Merge tag 'pull-misc-2025-04-24' of https://repo.or.cz/qemu/armbru into stagingStefan Hajnoczi3-3/+0
Miscellaneous patches for 2025-04-24 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmgJ7dYSHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZTiZIP/1PFAg/s3SoiLQwH/ZrjyUkm1kiKnjOH # CC5Stw6I9tuYnDAhASAdSymofLv0NNydNe5ai6ZZAWRyRYjIcfNigKAGK4Di+Uhe # nYxT0Yk8hNGwMhl6NnBp4mmCUNCwcbjT9uXdiYQxFYO/qqYR1388xJjeN3c362l3 # AaLrE5bX5sqa6TAkTeRPjeIqxlyGT7jnCrN7I1hMhDvbc3ITF3AMfYFMjnmAQgr+ # mTWGS1QogqqkloODbR1DKD1CAWOlpK+0HibhNF+lz71P0HlwVvy+HPXso505Wf0B # dMwlSrZ1DnqNVF/y5IhMEMslahKajbjbFVhBjmrGl/8T821etCxxgB20c0vyFRy8 # qTyJGwBZaEo0VWr70unSmq45TRoeQvdHAw/e+GtilR0ci80q2ly4gbObnw7L8le+ # gqZo4IWmrwp2sbPepE57sYKQpEndwbRayf/kcFd0LPPpeINu9ZooXkYX0pOo6Cdg # vDKMaEB1/fmPhjSlknxkKN9LZdR+nDw8162S1CKsUdWanAOjmP8haN19aoHhIekZ # q+r2qUq/U827yNy9/qbInmsoFYDz9s6sAOE63jibd5rZZ9Anei6NOSgLzA4CqCR1 # +d0+TXp19gP9mLMFs7/ZclwkXCz47OQYhXYphjI3wM9x+xbdRcI4n+DOH5u5coKx # AsA6+2n0GF4Y # =GaoH # -----END PGP SIGNATURE----- # gpg: Signature made Thu 24 Apr 2025 03:52:54 EDT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-misc-2025-04-24' of https://repo.or.cz/qemu/armbru: cleanup: Drop pointless label at end of function cleanup: Drop pointless return at end of function cleanup: Re-run return_directly.cocci Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-04-24cleanup: Drop pointless return at end of functionMarkus Armbruster3-3/+0
A few functions now end with a label. The next commit will clean them up. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250407082643.2310002-3-armbru@redhat.com> [Straightforward conflict with commit 988ad4ccebb6 (hw/loongarch/virt: Fix cpuslot::cpu set at last in virt_cpu_plug()) resolved]
2025-04-23hw/arm: make most of the compilation units commonPierrick Bouvier1-56/+56
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250325045915.994760-30-pierrick.bouvier@linaro.org>
2025-04-23hw/arm/xlnx-versal: prepare compilation unit to be commonPierrick Bouvier1-2/+0
Remove kvm unused headers. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250325045915.994760-29-pierrick.bouvier@linaro.org>
2025-04-23hw/arm/xlnx-zynqmp: prepare compilation unit to be commonPierrick Bouvier1-2/+0
Remove kvm unused headers. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250325045915.994760-28-pierrick.bouvier@linaro.org>
2025-04-23hw/arm/digic_boards: prepare compilation unit to be commonPierrick Bouvier1-1/+1
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250325045915.994760-27-pierrick.bouvier@linaro.org>
2025-04-23hw/arm/boot: make compilation unit hw commonPierrick Bouvier2-1/+5
Now we eliminated poisoned identifiers from headers, this file can now be compiled once for all arm targets. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250325045915.994760-25-pierrick.bouvier@linaro.org>
2025-04-23exec/cpu-all: remove exec/target_page includePierrick Bouvier2-0/+2
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23include/system: Move exec/address-spaces.h to system/address-spaces.hRichard Henderson24-24/+24
Convert the existing includes with sed. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23include/system: Move exec/memory.h to system/memory.hRichard Henderson1-1/+1
Convert the existing includes with sed -i ,exec/memory.h,system/memory.h,g Move the include within cpu-all.h into a !CONFIG_USER_ONLY block. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23hw: add compat machines for 10.1Cornelia Huck1-1/+8
Add 10.1 machine types for arm/i440fx/m68k/q35/s390x/spapr. Signed-off-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-ID: <20250414094543.221241-1-cohuck@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-04-08hw/arm/imx8mp-evk: Temporarily remove unimplemented imx8mp-fspi node from ↵Guenter Roeck1-1/+16
devicetree The nxp,imx8mp-fspi node triggers a warning backtrace. Remove it from the devicetree file. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Inspired-by: commit bf1da4b308 ("hw/arm/raspi4b: Temporarily disable unimplemented rpi4b devices") Signed-off-by: Bernhard Beschow <shentey@gmail.com> [Bernhard: split patch, adapt commit message] Message-ID: <20250405214900.7114-4-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-04-08hw/arm/imx8mp-evk: Remove unimplemented cpu-idle-states properties from ↵Guenter Roeck1-0/+14
devicetree The cpu-idle-states property causes a hard boot hang. Rather than documenting the workaround, perform the removal from the devicetree automatically. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Bernhard Beschow <shentey@gmail.com> [Bernhard: split patch, update documentation, adapt commit message] Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-ID: <20250405214900.7114-3-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-03-31hw/arm/fsl-imx8mp: Derive struct FslImx8mpState from TYPE_SYS_BUS_DEVICEBernhard Beschow2-2/+2
Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be reset upon machine reset. It also makes the SoC implementation not user-creatable which can trigger the following crash: $ ./qemu-system-aarch64 -M virt -device fsl-imx8mp ** ERROR:../../devel/qemu/tcg/tcg.c:1006:tcg_register_thread: assertion failed: (n < tcg_max_ctxs) Bail out! ERROR:../../devel/qemu/tcg/tcg.c:1006:tcg_register_thread: assertion failed: (n < tcg_max_ctxs) Aborted (core dumped) Fixes: a4eefc69b237 "hw/arm: Add i.MX 8M Plus EVK board" Reported-by: Thomas Huth <thuth@redhat.com> Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-ID: <20250318205709.28862-3-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-03-31hw/arm/imx8mp-evk: Fix reference count of SoC objectBernhard Beschow1-1/+1
TYPE_FSL_IMX8MP is created using object_new(), so must be realized with qdev_realize_and_unref() to keep the reference counting intact. Fixes: a4eefc69b237 "hw/arm: Add i.MX 8M Plus EVK board" Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-ID: <20250318205709.28862-2-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-03-31hw/arm/armv7m: Expose and access System Control Space as little endianPhilippe Mathieu-Daudé1-7/+7
We only build ARM system emulators using little endianness, so the MO_TE definition always expands to MO_LE, and DEVICE_TARGET_ENDIAN to DEVICE_LITTLE_ENDIAN. Replace the definitions by their expanded value, making it closer to the Armv7-M Architecture Reference Manual (ARM DDI 0403E) description: The System Control Space (SCS, address range 0xE000E000 to 0xE000EFFF) is a memory-mapped 4KB address space that provides 32-bit registers for configuration, status reporting and control. All accesses to the SCS are little endian. Fixes: d5d680cacc ("memory: Access MemoryRegion with endianness") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250312104821.1012-1-philmd@linaro.org>
2025-03-20rust: Kconfig: Factor out whether PL011 is Rust or CPeter Maydell1-20/+10
Currently every board that uses the PL011 duplicates the logic that selects the Rust implementation if Rust was enabled and the C implementation if it does not. Factor this out into a separate Kconfig stanza, so that boards can go back to simply doing "select PL011" and get whichever implementation is correct for the build. This fixes a compilation failure if CONFIG_VMAPPLE is enabled in a Rust build, because hw/vmapple/Kconfig didn't have the "pick the Rust PL011 if Rust is enabled" logic in it. Fixes: 59f4d65584bd33 ("hw/vmapple/vmapple: Add vmapple machine type") Reported-by: Tanish Desai <tanishdesai37@gmail.com> Analyzed-by: Tanish Desai <tanishdesai37@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Link: https://lore.kernel.org/r/20250319193110.1565578-2-peter.maydell@linaro.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-03-12hw/sd/sdhci: Remove need for SDHCI_VENDOR_IMX definitionPhilippe Mathieu-Daudé5-10/+0
All instances of TYPE_IMX_USDHC set vendor=SDHCI_VENDOR_IMX. No need to special-case it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20250308213640.13138-3-philmd@linaro.org>
generated by cgit v1.1 at 2025-07-16 05:39:18 +0000