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2023-05-19Revert "arm/kvm: add support for MTE"Peter Maydell1-39/+30
This reverts commit b320e21c48ce64853904bea6631c0158cc2ef227, which accidentally broke TCG, because it made the TCG -cpu max report the presence of MTE to the guest even if the board hadn't enabled MTE by wiring up the tag RAM. This meant that if the guest then tried to use MTE QEMU would segfault accessing the non-existent tag RAM: ==346473==ERROR: UndefinedBehaviorSanitizer: SEGV on unknown address (pc 0x55f328952a4a bp 0x00000213a400 sp 0x7f7871859b80 T346476) ==346473==The signal is caused by a READ memory access. ==346473==Hint: this fault was caused by a dereference of a high value address (see register values below). Disassemble the provided pc to learn which register was used. #0 0x55f328952a4a in address_space_to_flatview /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/include/exec/memory.h:1108:12 #1 0x55f328952a4a in address_space_translate /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/include/exec/memory.h:2797:31 #2 0x55f328952a4a in allocation_tag_mem /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-clang/../../target/arm/tcg/mte_helper.c:176:10 #3 0x55f32895366c in helper_stgm /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-clang/../../target/arm/tcg/mte_helper.c:461:15 #4 0x7f782431a293 (<unknown module>) It's also not clear that the KVM logic is correct either: MTE defaults to on there, rather than being only on if the board wants it on. Revert the whole commit for now so we can sort out the issues. (We didn't catch this in CI because we have no test cases in avocado that use guests with MTE support.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20230519145808.348701-1-peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-18hw/arm/vexpress: Avoid trivial memory leak of 'flashalias'Peter Maydell1-20/+20
In the vexpress board code, we allocate a new MemoryRegion at the top of vexpress_common_init() but only set it up and use it inside the "if (map[VE_NORFLASHALIAS] != -1)" conditional, so we leak it if not. This isn't a very interesting leak as it's a tiny amount of memory once at startup, but it's easy to fix. We could silence Coverity simply by moving the g_new() into the if() block, but this use of g_new(MemoryRegion, 1) is a legacy from when this board model was originally written; we wouldn't do that if we wrote it today. The MemoryRegions are conceptually a part of the board and must not go away until the whole board is done with (at the end of the simulation), so they belong in its state struct. This machine already has a VexpressMachineState struct that extends MachineState, so statically put the MemoryRegions in there instead of dynamically allocating them separately at runtime. Spotted by Coverity (CID 1509083). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230512170223.3801643-3-peter.maydell@linaro.org
2023-05-18sbsa-ref: use Bochs graphics card instead of VGAMarcin Juszkiewicz1-1/+1
Bochs card is normal PCI Express card so it fits better in system with PCI Express bus. VGA is simple legacy PCI card. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Message-id: 20230505120936.1097060-1-marcin.juszkiewicz@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-05-18arm/kvm: add support for MTECornelia Huck1-30/+39
Extend the 'mte' property for the virt machine to cover KVM as well. For KVM, we don't allocate tag memory, but instead enable the capability. If MTE has been enabled, we need to disable migration, as we do not yet have a way to migrate the tags as well. Therefore, MTE will stay off with KVM unless requested explicitly. Signed-off-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230428095533.21747-2-cohuck@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-05-18sbsa-ref: switch default cpu core to Neoverse-N1Marcin Juszkiewicz1-1/+1
The world outside moves to newer and newer cpu cores. Let move SBSA Reference Platform to something newer as well. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Message-id: 20230506183417.1360427-1-marcin.juszkiewicz@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-05-10hw/arm: Select XLNX_USB_SUBSYS for xlnx-zcu102 machineFabiano Rosas1-0/+1
This machine hardcodes initialization of the USB device, so select the corresponding Kconfig. It is not enough to have it as "default y if XLNX_VERSAL" at usb/Kconfig because building --without-default-devices disables the default selection resulting in: $ ./qemu-system-aarch64 -M xlnx-zcu102 qemu-system-aarch64: missing object type 'usb_dwc3' Aborted (core dumped) Signed-off-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230208192654.8854-8-farosas@suse.de> Message-Id: <20230503091244.1450613-8-alex.bennee@linaro.org> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-02hw/arm/raspi: Use arm_write_bootloader() to write boot codePeter Maydell1-30/+34
When writing the secondary-CPU stub boot loader code to the guest, use arm_write_bootloader() instead of directly calling rom_add_blob_fixed(). This fixes a bug on big-endian hosts, because arm_write_bootloader() will correctly byte-swap the host-byte-order array values into the guest-byte-order to write into the guest memory. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230424152717.1333930-4-peter.maydell@linaro.org
2023-05-02hw/arm/aspeed: Use arm_write_bootloader() to write the bootloaderCédric Le Goater1-20/+22
When writing the secondary-CPU stub boot loader code to the guest, use arm_write_bootloader() instead of directly calling rom_add_blob_fixed(). This fixes a bug on big-endian hosts, because arm_write_bootloader() will correctly byte-swap the host-byte-order array values into the guest-byte-order to write into the guest memory. Cc: qemu-stable@nongnu.org Signed-off-by: Cédric Le Goater <clg@kaod.org> Tested-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20230424152717.1333930-3-peter.maydell@linaro.org [PMM: Moved the "make arm_write_bootloader() function public" part to its own patch; updated commit message to note that this fixes an actual bug; adjust to the API changes noted in previous commit] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-05-02hw/arm/boot: Make write_bootloader() public as arm_write_bootloader()Cédric Le Goater1-27/+8
The arm boot.c code includes a utility function write_bootloader() which assists in writing a boot-code fragment into guest memory, including handling endianness and fixing it up with entry point addresses and similar things. This is useful not just for the boot.c code but also in board model code, so rename it to arm_write_bootloader() and make it globally visible. Since we are making it public, make its API a little neater: move the AddressSpace* argument to be next to the hwaddr argument, and allow the fixupcontext array to be const, since we never modify it in this function. Cc: qemu-stable@nongnu.org Signed-off-by: Cédric Le Goater <clg@kaod.org> Tested-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20230424152717.1333930-2-peter.maydell@linaro.org [PMM: Split out from another patch by Cédric, added doc comment] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-05-02hw/arm/bcm2835_property: Implement "get command line" messageDaniel Bertalan3-0/+6
This query copies the kernel command line into the message buffer. It was previously stubbed out to return empty, this commit makes it reflect the arguments specified with `-append`. I observed the following peculiarities on my Pi 3B+: - If the buffer is shorter than the string, the response header gives the full length, but no data is actually copied. - No NUL terminator is added: even if the buffer is long enough to fit one, the buffer's original contents are preserved past the string's end. - The VC firmware adds the following extra parameters beside the user-supplied ones (via /boot/cmdline.txt): `video`, `vc_mem.mem_base` and `vc_mem.mem_size`. This is currently not implemented in qemu. Signed-off-by: Daniel Bertalan <dani@danielbertalan.dev> Message-id: 20230425103250.56653-1-dani@danielbertalan.dev Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: added comment about NUL and short-buffer behaviour] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-05-02arm/Kconfig: Do not build TCG-only boards on a KVM-only buildFabiano Rosas1-1/+41
Move all the CONFIG_FOO=y from default.mak into "default y if TCG" statements in Kconfig. That way they won't be selected when CONFIG_TCG=n. I'm leaving CONFIG_ARM_VIRT in default.mak because it allows us to keep the two default.mak files not empty and keep aarch64-default.mak including arm-default.mak. That way we don't surprise anyone that's used to altering these files. With this change we can start building with --disable-tcg. Signed-off-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230426180013.14814-12-farosas@suse.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-05-02arm/Kconfig: Always select SEMIHOSTING when TCG is presentFabiano Rosas1-1/+0
We are about to enable the build without TCG, so CONFIG_SEMIHOSTING and CONFIG_ARM_COMPATIBLE_SEMIHOSTING cannot be unconditionally set in default.mak anymore. So reflect the change in a Kconfig. Instead of using semihosting/Kconfig, use a target-specific file, so that the change doesn't affect other architectures which might implement semihosting in a way compatible with KVM. The selection from ARM_v7M needs to be removed to avoid a cycle during parsing. Signed-off-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230426180013.14814-11-farosas@suse.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-05-02target/arm: move cpu_tcg to tcg/cpu32.cClaudio Fontana1-2/+0
move the module containing cpu models definitions for 32bit TCG-only CPUs to tcg/ and rename it for clarity. Signed-off-by: Claudio Fontana <cfontana@suse.de> Signed-off-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230426180013.14814-8-farosas@suse.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-05-02target/arm: Move 64-bit TCG CPUs into tcg/Fabiano Rosas1-2/+4
Move the 64-bit CPUs that are TCG-only: - cortex-a35 - cortex-a55 - cortex-a72 - cortex-a76 - a64fx - neoverse-n1 Keep the CPUs that can be used with KVM: - cortex-a57 - cortex-a53 - max - host Signed-off-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230426180013.14814-6-farosas@suse.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-21Merge tag 'pull-tpm-2023-04-20-1' of ↵Richard Henderson1-0/+1
https://github.com/stefanberger/qemu-tpm into staging Merge tpm 2023/04/20 v1 # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEEuBi5yt+QicLVzsZrda1lgCoLQhEFAmRBLgoACgkQda1lgCoL # QhEPyQf/WfEg8k2hDLExobsSgup1IsnT+mHHTBOZVJvq2efg2YXUTHA56fmD9X6d # crqTq68L5oaMES5iYEZhA7EAgfk3RvxDQGrlXBByPzrc6SSwEHHMR4Zzi5zrbCoW # t6TmaKQrlQqYwkhhsbyqnG46bj0ugCDagkBLfJdVl96fjkYgTspcDxaNwqwy/DPn # GTmQlvdRY09D1nylIdtcLBIfsM+sIkRslyngbUEIy+Bx8EWRy2a8Qw0BdY9g1XoE # e0CaRaFMpju1KOIjq0YSIzt0LSQDFfPc1IlUAC0ZALhNmp+PPNtr4E7+4kFfO2ym # 1sT2w25ho8dYDdm/m8tIauCdGoHw4A== # =ML27 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 20 Apr 2023 01:20:26 PM BST # gpg: using RSA key B818B9CADF9089C2D5CEC66B75AD65802A0B4211 # gpg: Good signature from "Stefan Berger <stefanb@linux.vnet.ibm.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B818 B9CA DF90 89C2 D5CE C66B 75AD 6580 2A0B 4211 * tag 'pull-tpm-2023-04-20-1' of https://github.com/stefanberger/qemu-tpm: qtest: Add a test case for TPM TIS I2C connected to Aspeed I2C controller qtest: Move tpm_util_tis_transmit() into tpm-tis-utils.c and rename it qtest: Add functions for accessing devices on Aspeed I2C controller tests/avocado/aspeed: Add TPM TIS I2C test tpm: Add support for TPM device over I2C bus tpm: Extend common APIs to support TPM TIS I2C docs: Add support for TPM devices over I2C bus Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-21Merge tag 'pull-request-2023-04-20' of https://gitlab.com/thuth/qemu into ↵Richard Henderson1-1/+8
staging * Compat machines for version 8.1 * Allow setting a chardev input file on the command line * Fix .travis.yml to work with non-public Travis instances, too * Move a lot of code from specifc_ss into softmmu_ss * Add a test case for TPM TIS I2C connected to Aspeed I2C controller * Update tests/vm/freebsd to version 13 * Some more misc minor fixes here and there # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmRBDtMRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbXfjw//UYytlyZsDOLAMfFNGQViMmVf29KbrDRe # doDh4Nl1oZLNKm9C5XlQExhsRbLm6Hi9nyQvSCJs4CvZ1jBY6U7GfgMNIaozXWb3 # 4gQyJb9ACe/z8bQmPUVF2sdW1QZ9zpf8LWpCOTGUZiI2Tevzkz7b/F5ZxiQiseG6 # dXe8UIwdZhG4jz2+6viqjHiGlKoBkegGYoJthcwnR07aRz2woiNr7rKRiJEiv2G7 # UfMVB96uLkpEhaDoohz440/rjviazO1nt6HDvgEajXT1X5P/8phT9IvT7olAZXZH # R2Qm6YyYcSWavoPms3AryAWG8FjomcyBjuebfAVW5/x+fl/401sn9quBMoZrYPEX # dfzF64vVokdXNQEH6+qc95PdB6/+d0CZPY8ilMRtAttf2sMw7IgqhG3zDLbj9t6R # dns2/DY9zu2pp07IEAXn/iVbW4rl2HADUQncr6B/cPy++lYiFvv7LX8OE+YWOsk0 # gvxzYx6rRhr5j7xT1sP30pLwsG3mX7qRDfba1Bt19CzSbu7UGN+w+S1xclgZDoqE # 0AZIeVUuqqNTEoBLoa2xHUDGs9NjeI2+qIh0R5csS/bqDscLXj0cOluvJO48n4Rt # +SGQSCSmU/lxn6EbBz4tw3orlp0clBH9fEaSg9lYxuUTYvQOpdYS7u4d63VQFvzp # dwQ9LRDFNsA= # =8ZFL # -----END PGP SIGNATURE----- # gpg: Signature made Thu 20 Apr 2023 11:07:15 AM BST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [undefined] # gpg: aka "Thomas Huth <thuth@redhat.com>" [undefined] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2023-04-20' of https://gitlab.com/thuth/qemu: (23 commits) tests/vm/freebsd: Update to FreeBSD 13.2 qtest: Add a test case for TPM TIS I2C connected to Aspeed I2C controller qtest: Move tpm_util_tis_transmit() into tpm-tis-utils.c and rename it qtest: Add functions for accessing devices on Aspeed I2C controller MAINTAINERS: Add Juan Quintela to developer guides review cpu: Remove parameter of list_cpus() hw/core: Move numa.c into the target independent source set softmmu: Move dirtylimit.c into the target independent source set hw/display: Compile vga.c as target-independent code softmmu: Make qtest.c target independent include/exec: Provide the tswap() functions for target independent code, too softmmu/qtest: Move the target-specific pseries RTAS code out of qtest.c hw/char: Move two more files from specific_ss to softmmu_ss target/i386: Set family/model/stepping of the "max" CPU according to LM bit tests/migration: Only run auto_converge in slow mode travis.yml: Add missing 'flex', 'bison' packages to 'GCC (user)' job travis.yml: Add missing clang-10 package to the 'Clang (disable-tcg)' job chardev: Allow setting file chardev input file on the command line qtest: Don't assert on "-qtest chardev:myid" test: Fix test-crypto-secret when compiling without keyring support ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-20tpm: Add support for TPM device over I2C busNinad Palsule1-0/+1
Qemu already supports devices attached to ISA and sysbus. This drop adds support for the I2C bus attached TPM devices. I2C model only supports TPM2 protocol. This commit includes changes for the common code. - Added I2C emulation model. Logic was added in the model to temporarily cache the data as I2C interface works per byte basis. - New tpm type "tpm-tis-i2c" added for I2C support. The user has to provide this string on command line. Testing: TPM I2C device module is tested using SWTPM (software based TPM package). Qemu uses the rainier machine and is connected to swtpm over the socket interface. The command to start swtpm is as follows: $ swtpm socket --tpmstate dir=/tmp/mytpm1 \ --ctrl type=unixio,path=/tmp/mytpm1/swtpm-sock \ --tpm2 --log level=100 The command to start qemu is as follows: $ qemu-system-arm -M rainier-bmc -nographic \ -kernel ${IMAGEPATH}/fitImage-linux.bin \ -dtb ${IMAGEPATH}/aspeed-bmc-ibm-rainier.dtb \ -initrd ${IMAGEPATH}/obmc-phosphor-initramfs.rootfs.cpio.xz \ -drive file=${IMAGEPATH}/obmc-phosphor-image.rootfs.wic.qcow2,if=sd,index=2 \ -net nic -net user,hostfwd=:127.0.0.1:2222-:22,hostfwd=:127.0.0.1:2443-:443 \ -chardev socket,id=chrtpm,path=/tmp/mytpm1/swtpm-sock \ -tpmdev emulator,id=tpm0,chardev=chrtpm \ -device tpm-tis-i2c,tpmdev=tpm0,bus=aspeed.i2c.bus.12,address=0x2e Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Tested-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Tested-by: Joel Stanley <joel@jms.id.au> Message-id: 20230414220754.1191476-4-ninadpalsule@us.ibm.com
2023-04-20arm/mcimx7d-sabre: Set fec2-phy-connected property to falseGuenter Roeck1-0/+2
On mcimx7d-sabre, the MDIO bus is connected to the first Ethernet interface. Set fec2-phy-connected to false to reflect this. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-6-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20fsl-imx7: Add fec[12]-phy-connected propertiesGuenter Roeck1-0/+20
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-5-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20arm/mcimx6ul-evk: Set fec1-phy-connected property to falseGuenter Roeck1-0/+2
On mcimx6ul-evk, the MDIO bus is connected to the second Ethernet interface. Set fec1-phy-connected to false to reflect this. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-4-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20fsl-imx6ul: Add fec[12]-phy-connected propertiesGuenter Roeck1-0/+20
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-3-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20hw/arm/virt: Restrict Cortex-A7 check to TCGPhilippe Mathieu-Daudé1-0/+2
The Cortex-A7 core is only available when TCG is enabled (see commit 80485d88f9 "target/arm: Restrict v7A TCG cpus to TCG accel"). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230405100848.76145-3-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20hw/arm: Add WDT to Allwinner-H3 and Orangepi-PCStrahinja Jankovic2-0/+9
This patch adds WDT to Allwinner-H3 and Orangepi-PC. WDT is added as an overlay to the Timer module memory area. Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20230326202256.22980-4-strahinja.p.jankovic@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20hw/arm: Add WDT to Allwinner-A10 and CubieboardStrahinja Jankovic2-0/+8
This patch adds WDT to Allwinner-A10 and Cubieboard. WDT is added as an overlay to the Timer module memory map. Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20230326202256.22980-3-strahinja.p.jankovic@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20hw/arm: Fix some typos in comments (most found by codespell)Stefan Weil8-9/+9
Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230409200526.1156456-1-sw@weilnetz.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20hw: Add compat machines for 8.1Cornelia Huck1-1/+8
Add 8.1 machine types for arm/i440fx/m68k/q35/s390x/spapr. Signed-off-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20230314173009.152667-1-cohuck@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Gavin Shan <gshan@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-03hw/arm: do not free machine->fdt in arm_load_dtb()Markus Armbruster1-1/+4
At this moment, arm_load_dtb() can free machine->fdt when binfo->dtb_filename is NULL. If there's no 'dtb_filename', 'fdt' will be retrieved by binfo->get_dtb(). If get_dtb() returns machine->fdt, as is the case of machvirt_dtb() from hw/arm/virt.c, fdt now has a pointer to machine->fdt. And, in that case, the existing g_free(fdt) at the end of arm_load_dtb() will make machine->fdt point to an invalid memory region. Since monitor command 'dumpdtb' was introduced a couple of releases ago, running it with any ARM machine that uses arm_load_dtb() will crash QEMU. Let's enable all arm_load_dtb() callers to use dumpdtb properly. Instead of freeing 'fdt', assign it back to ms->fdt. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-arm@nongnu.org Fixes: bf353ad55590f ("qmp/hmp, device_tree.c: introduce dumpdtb") Reported-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-id: 20230328165935.1512846-1-armbru@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-03-22*: Add missing includes of qemu/error-report.hRichard Henderson8-0/+14
This had been pulled in via qemu/plugin.h from hw/core/cpu.h, but that will be removed. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230310195252.210956-5-richard.henderson@linaro.org> [AJB: add various additional cases shown by CI] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230315174331.2959-15-alex.bennee@linaro.org> Reviewed-by: Emilio Cota <cota@braap.org>
2023-03-09Merge tag 'pull-aspeed-20230307' of https://github.com/legoater/qemu into ↵Peter Maydell2-5/+14
staging aspeed queue: * Small adjustments for the newest Meta machines * blk_pread_nonzeroes() fix required for pflash and m25p80 devices * Improve error reporting on file size for m25p80 devices # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmQHXi8ACgkQUaNDx8/7 # 7KHB7w//SQzcTNAUgMc6zbe3bULS9YU7csg0zX896DwQ9Ub4wtbnIps0/JwOsx6E # ss52YbbRVlHKcbahX6WW8JHtc6Wepcmnp4vC5dXdqgRryLTK5GgBu/GKcBb6qnHZ # uXwJpf7IwygOXQFg9Wy4zl3ipmrjgzMy6ZEbc3oqQUto+8E7HVMJiMXnrT5Y0yLt # Y76PywBxkYWcd522lWAXziXFxHaEJGMGrDCI/op4TuNAk0QLSRHp+x851JBF0Uyx # Lkp1cEjgADoH1FUfvo7aCNtAWGP4IFDprEupI3idPqjZ8KnnwPk2cnBMGeKJ5lWQ # XfSTwG5B3hYwGM0uYwHzHXUsq5/JGa0iDhSvjZVD8rf/w9BTek/GjypbJpL2XW6b # 4QaGGKGFWWMHbAaNVP6oEGqmkoC3QRKoQuaP6epaFyuSjNRWXkOhf5S5V10akjSc # xis0Z8gIpyLrtFT2TFc5BN9+z+PLgyaYyh7wZ2pFy1i6SOgh4FIFBOzQJDb05mmf # aFMD+6FOGx0wo8OXfy5EQyElWhVSYio+Hx9DaDP3d3cd/twHJx8nZ8QlXh2ThRd8 # jNLdFReJBImCJHSmYzbc/tGDOjg6+TWkZOzdjqTra08UwisK4XyOKj8E+sodWr0y # e/hI9nmIoarLCytMN1zElQFvj8xjpZ2lZOxr2EiX5ugYg0iuJhU= # =Xs26 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Mar 2023 15:54:23 GMT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-aspeed-20230307' of https://github.com/legoater/qemu: hw/arm/aspeed: Modified BMC FRU byte data in yosemitev2 hw/arm/aspeed: Added TMP421 type sensor's support in tiogapass hw/arm/aspeed: Added TMP421 type sensor's support in yosemitev2 pflash: Fix blk_pread_nonzeroes() m25p80: Improve error when the backend file size does not match the device Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-03-07hw/arm/aspeed: Modified BMC FRU byte data in yosemitev2Karthikeyan Pasupathi1-5/+5
Modified BMC FRU data in yosemite v2 platform. Tested: Tested and Verified in yosemitev2 platform. Fixes: 34f73a81e6 ("hw/arm/aspeed: Adding new machine Yosemitev2 in QEMU") Signed-off-by: Karthikeyan Pasupathi <pkarthikeyan1509@gmail.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20230307104833.3587947-1-pkarthikeyan1509@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2023-03-07hw/arm/aspeed: Added TMP421 type sensor's support in tiogapassKarthikeyan Pasupathi1-0/+4
Added TMP421 type sensor support in tiogapass platform. Tested: Tested and verified in tiogapass platform. Signed-off-by: Karthikeyan Pasupathi <pkarthikeyan1509@gmail.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20230307103334.3586755-1-pkarthikeyan1509@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2023-03-07hw/arm/aspeed: Added TMP421 type sensor's support in yosemitev2Karthikeyan Pasupathi1-0/+5
Added TMP421 type support in yosemite v2 platform. Tested: Tested and verified in yosemite V2 platform. Signed-off-by: Karthikeyan Pasupathi <pkarthikeyan1509@gmail.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20230307095239.3583613-1-pkarthikeyan1509@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2023-03-06hw: arm: allwinner-h3: Fix and complete H3 i2c devicesqianfan Zhao1-4/+25
Allwinner h3 has 4 twi(i2c) devices named twi0, twi1, twi2 and r_twi. The registers are compatible with TYPE_AW_I2C_SUN6I, write 1 to clear control register's INT_FLAG bit. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-03-06hw: arm: Support direct boot for Linux/arm64 EFI zboot imagesArd Biesheuvel1-0/+6
Fedora 39 will ship its arm64 kernels in the new generic EFI zboot format, using gzip compression for the payload. For doing EFI boot in QEMU, this is completely transparent, as the firmware or bootloader will take care of this. However, for direct kernel boot without firmware, we will lose the ability to boot such distro kernels unless we deal with the new format directly. EFI zboot images contain metadata in the header regarding the placement of the compressed payload inside the image, and the type of compression used. This means we can wire up the existing gzip support without too much hassle, by parsing the header and grabbing the payload from inside the loaded zboot image. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Alex Bennée <alex.bennee@linaro.org> Cc: Richard Henderson <richard.henderson@linaro.org> Cc: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Message-id: 20230303160109.3626966-1-ardb@kernel.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: tweaked comment formatting, fixed checkpatch nits] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-03-03Merge tag 'pull-aspeed-20230302' of https://github.com/legoater/qemu into ↵Peter Maydell6-55/+190
staging aspeed queue: * fix for the Aspeed I2C slave mode * a new I2C echo device from Klaus and its associated test in avocado. * initial SoC cleanups to allow the use of block devices instead of drives on the command line. * new facebook machines and eeprom fixes for the Fuji * readline fix # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmQAnrQACgkQUaNDx8/7 # 7KGIvQ//Te2eSxlZNxAXHb3HSVFRaBW+2EkJzNlalX75olFSzCLe8BnAHK5xPlYv # JjU0aPjWaPohPLdbNbAsJY2B8AwMGbUTjSv+ORRWF6s97LTVD9WcAYHgOTCz6d2X # ZrArJ5msEQAFEySOLmBqTcuyW3t4w8XeII+B09HZIS8Gn3F9kX5+4JCw9E4sX8fS # n9ayclMmrXCPbkGA4bfwJp3KI1Tc/WXNRyG0AmPEmepid7ECr5tVvQoXRMF1Sy/D # 10qbHEcmQXvZDy85M2ED1niOac4oU+EY8Wvjzkgc36uXcjqf0jIUfw56cwGSNVkW # MhPXSMiH4tEjgxmtzld3LeA6TGfrFcCvRXYiCuYWHjBS3gptlqY6Q0580vxoQVXL # lTYui57LB1YStNLcLG9toP0d4/fRfeqEx7ddCQKlopnW/K392eoJo0aYoVGVJhIC # 3QhN525EFUwMm4FDpdSW29Gfbk/ytpf0u4hQ6JPeBl8psirRKqCGuwr5NOnPYTaN # yErlsq2eL83t9kLo+2YIqgWic85wNP3kqAjIaE6lminqX7sWFH3V1g9HqUQZVG1g # msatZMiCCvwSFuz3DPkSfnuhqwaHuhvCATZloCtguCmnbUK9qUVVzvodKw62sZrd # GdS2XvRNyoOwezz0tDEvPipyZ7RpcaatryHNuzGwRsE5Lvr73dg= # =ExnJ # -----END PGP SIGNATURE----- # gpg: Signature made Thu 02 Mar 2023 13:03:48 GMT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-aspeed-20230302' of https://github.com/legoater/qemu: aspeed/smc: Replace SysBus IRQs with GPIO lines aspeed: Add a boot_rom overlap region in the SoC spi_boot container aspeed: Introduce a spi_boot region under the SoC aspeed/fuji : correct the eeprom size hw/at24c : modify at24c to support 1 byte address mode hw/arm/aspeed: Adding new machine Tiogapass in QEMU hw/arm/aspeed: Adding new machine Yosemitev2 in QEMU tests/avocado/machine_aspeed.py: Add an I2C slave test hw/misc: add a toy i2c echo device hw/i2c: only schedule pending master when bus is idle readline: fix hmp completion issue Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-03-02smmu: switch to use memory_region_unmap_iommu_notifier_range()Jason Wang1-15/+1
Signed-off-by: Jason Wang <jasowang@redhat.com> Message-Id: <20230223065924.42503-5-jasowang@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-03-02aspeed/smc: Replace SysBus IRQs with GPIO linesCédric Le Goater1-1/+1
It's cleaner and removes the curious '+ 1' required to skip the DMA IRQ line of the controller. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2023-03-02aspeed: Add a boot_rom overlap region in the SoC spi_boot containerCédric Le Goater1-20/+27
To avoid the SPI transactions fetching instructions from the FMC CE0 flash device and speed up boot, a ROM can be created if a drive is available. Reverse the logic to allow a machine to boot without a drive, using a block device instead : -blockdev node-name=fmc0,driver=file,filename=/path/to/flash.img \ -device mx66u51235f,bus=ssi.0,drive=fmc0 Signed-off-by: Cédric Le Goater <clg@kaod.org>
2023-03-02aspeed: Introduce a spi_boot region under the SoCCédric Le Goater4-19/+29
The default boot address of the Aspeed SoCs is 0x0. For this reason, the FMC flash device contents are remapped by HW on the first 256MB of the address space. In QEMU, this is currently done in the machine init with the setup of a region alias. Move this code to the SoC and introduce an extra container to prepare ground for the boot ROM region which will overlap the FMC flash remapping. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2023-03-02aspeed/fuji : correct the eeprom sizeSittisak Sinprem1-16/+20
Device 24C64 the size is 64 kilobits = 8kilobyte Device 24C02 the size is 2 kilobits = 256byte Signed-off-by: Sittisak Sinprem <ssinprem@celestica.com> Reviewed-by: Peter Delevoryas <peter@pjd.dev> [ clg: checkpatch issues ] Message-Id: <167660539263.10409.9736070122710923479-2@git.sr.ht> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2023-03-02hw/arm/aspeed: Adding new machine Tiogapass in QEMUKarthikeyan Pasupathi3-0/+57
This patch support Tiogapass in QEMU environment. and introduced EEPROM BMC FRU data support "add tiogapass_bmc_fruid data" along with the machine support. Signed-off-by: Karthikeyan Pasupathi <pkarthikeyan1509@gmail.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> [ clg: - commit log topic update - checkpatch issues - Documentation update ] Message-Id: <20230216184342.253868-1-pkarthikeyan1509@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2023-03-02hw/arm/aspeed: Adding new machine Yosemitev2 in QEMUKarthikeyan Pasupathi3-0/+57
This patch support Yosemitev2 in QEMU environment. and introduced EEPROM BMC FRU data support "add fbyv2_bmc_fruid data" along with the machine support. Signed-off-by: Karthikeyan Pasupathi <pkarthikeyan1509@gmail.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> [ clg: - commit log topic update - Documentation update ] Message-Id: <20230216133326.216017-1-pkarthikeyan1509@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2023-02-27hw/ide: Rename ide_create_drive() -> ide_bus_create_drive()Philippe Mathieu-Daudé1-1/+1
ide_create_drive() operates on a IDEBus; rename it as ide_bus_create_drive() to emphasize its first argument is a IDEBus. Mechanical change using: $ sed -i -e 's/ide_create_drive/ide_bus_create_drive/g' \ $(git grep -wl ide_create_drive) Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230215112712.23110-12-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-27hw: Replace qemu_or_irq typedef by OrIRQStatePhilippe Mathieu-Daudé2-3/+3
OBJECT_DECLARE_SIMPLE_TYPE() macro provides the OrIRQState declaration for free. Besides, the QOM code style is to use the structure name as typedef, and QEMU style is to use Camel Case, so rename qemu_or_irq as OrIRQState. Mechanical change using: $ sed -i -e 's/qemu_or_irq/OrIRQState/g' $(git grep -l qemu_or_irq) Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20230113200138.52869-5-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-27hw/arm/musicpal: Remove unused dummy MemoryRegionPhilippe Mathieu-Daudé1-4/+0
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-27hw/char/cmsdk-apb-uart: Open-code cmsdk_apb_uart_create()Philippe Mathieu-Daudé1-14/+27
cmsdk_apb_uart_create() is only used twice in the same file. Open-code it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20230220115114.25237-7-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-27hw/char/pl011: Open-code pl011_luminary_create()Philippe Mathieu-Daudé1-3/+8
pl011_luminary_create() is only used for the Stellaris board, open-code it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230220115114.25237-4-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-27target/arm: Wrap arm_rebuild_hflags calls with tcg_enabledFabiano Rosas1-1/+5
This is in preparation to moving the hflags code into its own file under the tcg/ directory. Signed-off-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-27include/hw/arm/allwinner-a10.h: Remove superfluous includes from the headerThomas Huth1-0/+1
pci_device.h is not needed at all in allwinner-a10.h, and serial.h is only needed by the corresponding .c file. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20230215152233.210024-1-thuth@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-16target/arm: Use "max" as default cpu for the virt machine with KVMFabiano Rosas1-0/+4
Now that the cortex-a15 is under CONFIG_TCG, use as default CPU for a KVM-only build the 'max' cpu. Note that we cannot use 'host' here because the qtests can run without any other accelerator (than qtest) and 'host' depends on KVM being enabled. Signed-off-by: Fabiano Rosas <farosas@suse.de> Acked-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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