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AgeCommit message (Expand)AuthorFilesLines
2016-09-13hw: replace most use of qemu_chr_fe_write with qemu_chr_fe_write_allDaniel P. Berrange3-5/+11
2016-09-06ARM: ACPI: fix the AML ID format for CPU devicesWei Huang1-1/+1
2016-09-06ast2400: add a memory controller device modelCédric Le Goater1-0/+15
2016-08-12trace-events: fix first line comment in trace-eventsLaurent Vivier1-1/+1
2016-07-19qapi: Change Netdev into a flat unionEric Blake1-1/+1
2016-07-14ast2400: externalize revision numbersCédric Le Goater1-2/+0
2016-07-14hw/arm/virt: tcg: adjust MPIDR like KVMAndrew Jones1-1/+24
2016-07-12Clean up ill-advised or unusual header guardsMarkus Armbruster1-2/+2
2016-07-07arm: virt: Parse cpu_model only onceIgor Mammedov1-21/+21
2016-07-07cpu: Use CPUClass->parse_features() as convertor to global propertiesIgor Mammedov1-3/+4
2016-07-07i.MX: split the GPT timer implementation into per SOC definitionsJean-Christophe Dubois3-3/+3
2016-07-04ast2400: create SPI flash slavesCédric Le Goater1-0/+31
2016-07-04ast2400: add SPI flash slavesCédric Le Goater1-0/+5
2016-07-04ast2400: add SMC controllers (FMC and SPI)Cédric Le Goater1-1/+34
2016-07-04m25p80: qdev-ify drive propertyPaolo Bonzini3-8/+27
2016-07-04ssi: change ssi_slave_init to be a realize opsCédric Le Goater3-15/+8
2016-07-04xilinx_zynq: Connect devcfg to the Zynq machine modelPeter Crosthwaite1-0/+6
2016-07-04hw/arm/virt: mark the PCIe host controller as DMA coherent in the DTArd Biesheuvel1-0/+1
2016-07-04imx: Use memory_region_init_rom() for ROMsPeter Maydell3-13/+12
2016-06-27palmetto-bmc: Configure the SCU's hardware strapping registerAndrew Jeffery1-0/+2
2016-06-27ast2400: Integrate the SCU model and set silicon revisionAndrew Jeffery1-0/+21
2016-06-20trace: split out trace events for hw/arm/ directoryDaniel P. Berrange1-0/+4
2016-06-17ACPI: ARM: Present GIC version in MADT tableShannon Zhao1-0/+1
2016-06-14arm: xlnx-zynqmp: Add xlnx-dp and xlnx-dpdmaKONRAD Frederic1-1/+31
2016-06-14hw/arm/virt: create the 2.7 machine typeAndrew Jones1-2/+18
2016-06-14hw/arm/virt: introduce DEFINE_VIRT_MACHINE_AS_LATESTAndrew Jones1-3/+10
2016-06-14hw/arm/virt: introduce DEFINE_VIRT_MACHINEAndrew Jones1-17/+24
2016-06-14hw/arm/virt: separate versioned type-init codeAndrew Jones1-6/+10
2016-06-14hw/arm/virt-acpi-build: Add PMU IRQ number in ACPI tableShannon Zhao1-0/+4
2016-06-14hw/arm/virt: Add PMU node for virt machineShannon Zhao1-0/+33
2016-06-13vl: Eliminate usb_enabled()Eduardo Habkost3-3/+3
2016-06-13pxa2xx: Unconditionally enable USB controllerEduardo Habkost1-8/+4
2016-06-08hw/arm: virt uart fixxiaoqiang zhao1-4/+4
2016-06-07acpi: make bios_linker_loader_add_checksum() API offset basedIgor Mammedov1-3/+2
2016-06-07acpi: make bios_linker_loader_add_pointer() API offset basedIgor Mammedov1-13/+13
2016-06-07acpi: simplify bios_linker API by removing redundant 'table' argumentIgor Mammedov1-5/+6
2016-06-07acpi: convert linker from GArray to BIOSLinker structureIgor Mammedov1-12/+12
2016-06-06zynqmp: Add the ZCU102 boardAlistair Francis1-0/+8
2016-06-06hw/char: QOM'ify stm32f2xx_usart modelxiaoqiang zhao1-0/+1
2016-06-06hw/char: QOM'ify digic-uart modelxiaoqiang zhao1-0/+2
2016-06-06hw/char: QOM'ify cadence_uart modelxiaoqiang zhao2-2/+4
2016-06-06hw/char: QOM'ify pl011 modelxiaoqiang zhao8-30/+28
2016-06-06xlnx-zynqmp: Use the in kernel GIC model for KVM runsEdgar E. Iglesias1-1/+3
2016-06-06xlnx-zynqmp: Delay realization of GIC until post CPU realizationEdgar E. Iglesias1-25/+31
2016-06-06xlnx-zynqmp: Make the RPU subsystem optionalEdgar E. Iglesias1-24/+38
2016-06-06xlnx-zynqmp: Add a secure prop to en/disable ARM Security ExtensionsEdgar E. Iglesias1-0/+3
2016-06-06hw/arm/virt: Reject gic-version=host for non-KVMCole Robinson1-1/+5
2016-06-06i2c: add aspeed i2c controllerCédric Le Goater1-0/+16
2016-06-06hw/arm/virt: fix limit of 64-bit ACPI/ECAM PCI MMIO rangeArd Biesheuvel1-1/+2
2016-06-02Add ENET device to i.MX6 SOC.Jean-Christophe Dubois1-0/+17
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