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2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster1-0/+1
No header includes qemu-common.h after this commit, as prescribed by qemu-common.h's file comment. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-5-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for include/hw/arm/xlnx-zynqmp.h hw/arm/nrf51_soc.c hw/arm/msf2-soc.c block/qcow2-refcount.c block/qcow2-cluster.c block/qcow2-cache.c target/arm/cpu.h target/lm32/cpu.h target/m68k/cpu.h target/mips/cpu.h target/moxie/cpu.h target/nios2/cpu.h target/openrisc/cpu.h target/riscv/cpu.h target/tilegx/cpu.h target/tricore/cpu.h target/unicore32/cpu.h target/xtensa/cpu.h; bsd-user/main.c and net/tap-bsd.c fixed up]
2019-05-23arm: Rename hw/arm/arm.h to hw/arm/boot.hPeter Maydell1-1/+1
The header file hw/arm/arm.h now includes only declarations relating to hw/arm/boot.c functionality. Rename it accordingly, and adjust its header comment. The bulk of this commit was created via perl -pi -e 's|hw/arm/arm.h|hw/arm/boot.h|' hw/arm/*.c include/hw/arm/*.h In a few cases we can just delete the #include: hw/arm/msf2-soc.c, include/hw/arm/aspeed_soc.h and include/hw/arm/bcm2836.h did not require it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190516163857.6430-4-peter.maydell@linaro.org
2019-03-07hw: Remove unused 'hw/devices.h' includePhilippe Mathieu-Daudé1-1/+0
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2018-08-24hw/arm/highbank: Connect VIRQ and VFIQPeter Maydell1-0/+6
Connect the VIRQ and VFIQ lines from the GIC to the CPU; these exist always for both CPU and GIC whether the virtualization extensions are enabled or not, so we can just unconditionally connect them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20180821132811.17675-5-peter.maydell@linaro.org
2018-04-26Change references to serial_hds[] to serial_hd()Peter Maydell1-1/+1
Change all the uses of serial_hds[] to go via the new serial_hd() function. Code change produced with: find hw -name '*.[ch]' | xargs sed -i -e 's/serial_hds\[\([^]]*\)\]/serial_hd(\1)/g' Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20180420145249.32435-8-peter.maydell@linaro.org
2018-04-26hw/arm/highbank: don't make sysram 'nomigrate'Peter Maydell1-1/+1
Currently we use memory_region_init_ram_nomigrate() to create the "highbank.sysram" memory region, and we don't manually register it with vmstate_register_ram(). This currently means that its contents are migrated but as a ram block whose name is the empty string; in future it may mean they are not migrated at all. Use memory_region_init_ram() instead. Note that this is a cross-version migration compatibility break for the "highbank" and "midway" machines. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180420124835.7268-2-peter.maydell@linaro.org
2018-03-12hw: Do not include "sysemu/block-backend.h" if it is not necessaryThomas Huth1-1/+0
After reviewing a patch from Philippe that removes block-backend.h from hw/lm32/milkymist.c, I noticed that this header is included unnecessarily in a lot of other files, too. Remove those unneeded includes to speed up the compilation process a little bit. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <1518684912-31637-1-git-send-email-thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-11-13highbank: validate register offset before accessPrasad J Pandit1-2/+15
An 'offset' parameter sent to highbank register r/w functions could be greater than number(NUM_REGS=0x200) of hb registers, leading to an OOB access issue. Add check to avoid it. Reported-by: Moguofang (Dennis mo) <moguofang@huawei.com> Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> Message-id: 20171113062658.9697-1-ppandit@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-19arm: drop intermediate cpu_model -> cpu type parsing and use cpu type directlyIgor Mammedov1-5/+5
there are 2 use cases to deal with: 1: fixed CPU models per board/soc 2: boards with user configurable cpu_model and fallback to default cpu_model if user hasn't specified one explicitly For the 1st drop intermediate cpu_model parsing and use const cpu type directly, which replaces: typename = object_class_get_name( cpu_class_by_name(TYPE_ARM_CPU, cpu_model)) object_new(typename) with object_new(FOO_CPU_TYPE_NAME) or cpu_generic_init(BASE_CPU_TYPE, "my cpu model") with cpu_create(FOO_CPU_TYPE_NAME) as result 1st use case doesn't have to invoke not necessary translation and not needed code is removed. For the 2nd 1: set default cpu type with MachineClass::default_cpu_type and 2: use generic cpu_model parsing that done before machine_init() is run and: 2.1: drop custom cpu_model parsing where pattern is: typename = object_class_get_name( cpu_class_by_name(TYPE_ARM_CPU, cpu_model)) [parse_features(typename, cpu_model, &err) ] 2.2: or replace cpu_generic_init() which does what 2.1 does + create_cpu(typename) with just create_cpu(machine->cpu_type) as result cpu_name -> cpu_type translation is done using generic machine code one including parsing optional features if supported/present (removes a bunch of duplicated cpu_model parsing code) and default cpu type is defined in an uniform way within machine_class_init callbacks instead of adhoc places in boadr's machine_init code. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <1505318697-77161-6-git-send-email-imammedo@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-07hw/arm: Set ignore_memory_transaction_failures for most ARM boardsPeter Maydell1-0/+2
Set the MachineClass flag ignore_memory_transaction_failures for almost all ARM boards. This means they retain the legacy behaviour that accesses to unimplemented addresses will RAZ/WI rather than aborting, when a subsequent commit adds support for external aborts. The exceptions are: * virt -- we know that guests won't try to prod devices that we don't describe in the device tree or ACPI tables * mps2 -- this board was written to use unimplemented-device for all the ranges with devices we don't yet handle New boards should not set the flag, but instead be written like the mps2. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1504626814-23124-3-git-send-email-peter.maydell@linaro.org For the Xilinx boards: Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2017-09-04hw/arm: use defined type name instead of hard-coded stringPhilippe Mathieu-Daudé1-4/+7
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-14memory: Rename memory_region_init_ram() to memory_region_init_ram_nomigrate()Peter Maydell1-1/+1
Rename memory_region_init_ram() to memory_region_init_ram_nomigrate(). This leaves the way clear for us to provide a memory_region_init_ram() which does handle migration. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1499438577-7674-4-git-send-email-peter.maydell@linaro.org
2017-07-13Convert error_report() to warn_report()Alistair Francis1-3/+3
Convert all uses of error_report("warning:"... to use warn_report() instead. This helps standardise on a single method of printing warnings to the user. All of the warnings were changed using these two commands: find ./* -type f -exec sed -i \ 's|error_report(".*warning[,:] |warn_report("|Ig' {} + Indentation fixed up manually afterwards. The test-qdev-global-props test case was manually updated to ensure that this patch passes make check (as the test cases are case sensitive). Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Suggested-by: Thomas Huth <thuth@redhat.com> Cc: Jeff Cody <jcody@redhat.com> Cc: Kevin Wolf <kwolf@redhat.com> Cc: Max Reitz <mreitz@redhat.com> Cc: Ronnie Sahlberg <ronniesahlberg@gmail.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Peter Lieven <pl@kamp.de> Cc: Josh Durgin <jdurgin@redhat.com> Cc: "Richard W.M. Jones" <rjones@redhat.com> Cc: Markus Armbruster <armbru@redhat.com> Cc: Peter Crosthwaite <crosthwaite.peter@gmail.com> Cc: Richard Henderson <rth@twiddle.net> Cc: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> Cc: Greg Kurz <groug@kaod.org> Cc: Rob Herring <robh@kernel.org> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Peter Chubb <peter.chubb@nicta.com.au> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Cc: David Gibson <david@gibson.dropbear.id.au> Cc: Alexander Graf <agraf@suse.de> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jason Wang <jasowang@redhat.com> Cc: Marcelo Tosatti <mtosatti@redhat.com> Cc: Christian Borntraeger <borntraeger@de.ibm.com> Cc: Cornelia Huck <cohuck@redhat.com> Cc: Stefan Hajnoczi <stefanha@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Greg Kurz <groug@kaod.org> Acked-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed by: Peter Chubb <peter.chubb@data61.csiro.au> Acked-by: Max Reitz <mreitz@redhat.com> Acked-by: Marcel Apfelbaum <marcel@redhat.com> Message-Id: <e1cfa2cd47087c248dd24caca9c33d9af0c499b0.1499866456.git.alistair.francis@xilinx.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2017-05-23shutdown: Add source information to SHUTDOWN and RESETEric Blake1-2/+2
Time to wire up all the call sites that request a shutdown or reset to use the enum added in the previous patch. It would have been less churn to keep the common case with no arguments as meaning guest-triggered, and only modified the host-triggered code paths, via a wrapper function, but then we'd still have to audit that I didn't miss any host-triggered spots; changing the signature forces us to double-check that I correctly categorized all callers. Since command line options can change whether a guest reset request causes an actual reset vs. a shutdown, it's easy to also add the information to reset requests. Signed-off-by: Eric Blake <eblake@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> [ppc parts] Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> [SPARC part] Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x parts] Message-Id: <20170515214114.15442-5-eblake@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2017-02-21hw/arm/highbank: Default -drive to if=ide instead of if=scsiMarkus Armbruster1-2/+6
These machines have no onboard SCSI HBA, and no way to plug one. -drive if=scsi therefore cannot work. They do have an onboard IDE controller (sysbus-ahci), but fail to honor if=ide. Change their default to if=ide, and add a TODO comment on what needs to be done to actually honor -drive if=ide. Cc: Rob Herring <robh@kernel.org> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-arm@nongnu.org Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <1487153147-11530-6-git-send-email-armbru@redhat.com>
2016-06-06hw/char: QOM'ify pl011 modelxiaoqiang zhao1-1/+2
* drop qemu_char_get_next_serial and use chardev prop * add pl011_create wrapper function to create pl011 uart device * change affected board code to use the new way Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465028065-5855-2-git-send-email-zxq_yx_007@163.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/arm: QOM'ify highbank.cxiaoqiang.zhao1-7/+5
Drop the use of old SysBus init function and use instance_init Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-22include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster1-0/+1
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the Error typedef. Since then, we've moved to include qemu/osdep.h everywhere. Its file comment explains: "To avoid getting into possible circular include dependencies, this file should not include any other QEMU headers, with the exceptions of config-host.h, compiler.h, os-posix.h and os-win32.h, all of which are doing a similar job to this file and are under similar constraints." qapi/error.h doesn't do a similar job, and it doesn't adhere to similar constraints: it includes qapi-types.h. That's in excess of 100KiB of crap most .c files don't actually need. Add the typedef to qemu/typedefs.h, and include that instead of qapi/error.h. Include qapi/error.h in .c files that need it and don't get it now. Include qapi-types.h in qom/object.h for uint16List. Update scripts/clean-includes accordingly. Update it further to match reality: replace config.h by config-target.h, add sysemu/os-posix.h, sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h comment quoted above similarly. This reduces the number of objects depending on qapi/error.h from "all of them" to less than a third. Unfortunately, the number depending on qapi-types.h shrinks only a little. More work is needed for that one. Signed-off-by: Markus Armbruster <armbru@redhat.com> [Fix compilation without the spice devel packages. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-16machine: Use type_init() to register machine classesEduardo Habkost1-1/+1
Change all machine_init() users that simply call type_register*() to use type_init(). Cc: Evgeny Voevodin <e.voevodin@samsung.com> Cc: Maksim Kozlov <m.kozlov@samsung.com> Cc: Igor Mitsyanko <i.mitsyanko@gmail.com> Cc: Dmitry Solodkiy <d.solodkiy@samsung.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Rob Herring <robh@kernel.org> Cc: Andrzej Zaborowski <balrogg@gmail.com> Cc: Michael Walle <michael@walle.cc> Cc: "Hervé Poussineau" <hpoussin@reactos.org> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Alexander Graf <agraf@suse.de> Cc: David Gibson <david@gibson.dropbear.id.au> Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Acked-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2016-02-03arm/boot: move highbank secure board setup code to common routineAndrew Baumann1-35/+2
The new version is slightly different, to support Rasbperry Pi (in particular, Pi1's arm11 core which doesn't support v7 instructions such as MOVW). Tested-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-18hw/arm: Clean up includesPeter Maydell1-0/+1
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1449505425-32022-4-git-send-email-peter.maydell@linaro.org
2016-01-13hw: Don't use hw_error() for machine initialization errorsMarkus Armbruster1-2/+4
Printing CPU registers is not helpful during machine initialization. Moreover, these are straightforward configuration or "can get resources" errors, so dumping core isn't appropriate either. Replace hw_error() by error_report(); exit(1). Matches how we report these errors in other machine initializations. Cc: Richard Henderson <rth@twiddle.net> Cc: qemu-arm@nongnu.org Cc: qemu-ppc@nongnu.org Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Markus Armbruster <armbru@pond.sub.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <1450370121-5768-2-git-send-email-armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-01-13Use error_fatal to simplify obvious fatal errorsMarkus Armbruster1-6/+1
Done with this Coccinelle semantic patch: @@ type T; identifier FUN, RET; expression list ARGS; expression ERR, EC; @@ ( - T RET = FUN(ARGS, &ERR); + T RET = FUN(ARGS, &error_fatal); | - RET = FUN(ARGS, &ERR); + RET = FUN(ARGS, &error_fatal); | - FUN(ARGS, &ERR); + FUN(ARGS, &error_fatal); ) - if (ERR != NULL) { - error_report_err(ERR); - exit(EC); - } This is actually a more elegant version of my initial semantic patch by courtesy of Eduardo. It leaves dead Error * variables behind, cleaned up manually. Cc: qemu-arm@nongnu.org Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
2015-11-10arm: highbank: Implement PSCI and dummy monitorPeter Crosthwaite1-10/+60
Firstly, enable monitor mode and PSCI, both of which are features of this board. In addition to PSCI, this board also uses SMC for cache maintenance ops. This means we need a secure monitor to catch these and nop them. Use the ARM boot board-setup feature to implement this. The SMC trap implements the needed nop while all other traps will pen the CPU. As a KVM CPU cannot run in secure mode, do not do the board-setup if not running TCG. Report a warning explaining the limitation in this case. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 0fd0d12f0fa666c86616c89447861a70dbe27312.1447007690.git.crosthwaite.peter@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-10arm: highbank: Defeature CPU overridePeter Crosthwaite1-14/+7
This board should not support CPU model override. This allows for easier patching of the board with being able to rely on the CPU type being correct. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 471a61e049c7ca6e82f5ef6668889a1d518c7e00.1447007690.git.crosthwaite.peter@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-19Revert use of DEFINE_MACHINE() for registrations of multiple machinesAndreas Färber1-4/+24
The script used for converting from QEMUMachine had used one DEFINE_MACHINE() per machine registered. In cases where multiple machines are registered from one source file, avoid the excessive generation of module init functions by reverting this unrolling. Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-09-19Use DEFINE_MACHINE() to register all machinesEduardo Habkost1-18/+14
Convert all machines to use DEFINE_MACHINE() instead of QEMUMachine automatically using a script. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> [AF: Style cleanups, convert imx25_pdk machine] Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-09-18Fix bad error handling after memory_region_init_ram()Markus Armbruster1-1/+1
Symptom: $ qemu-system-x86_64 -m 10000000 Unexpected error in ram_block_add() at /work/armbru/qemu/exec.c:1456: upstream-qemu: cannot set up guest memory 'pc.ram': Cannot allocate memory Aborted (core dumped) Root cause: commit ef701d7 screwed up handling of out-of-memory conditions. Before the commit, we report the error and exit(1), in one place, ram_block_add(). The commit lifts the error handling up the call chain some, to three places. Fine. Except it uses &error_abort in these places, changing the behavior from exit(1) to abort(), and thus undoing the work of commit 3922825 "exec: Don't abort when we can't allocate guest memory". The three places are: * memory_region_init_ram() Commit 4994653 (right after commit ef701d7) lifted the error handling further, through memory_region_init_ram(), multiplying the incorrect use of &error_abort. Later on, imitation of existing (bad) code may have created more. * memory_region_init_ram_ptr() The &error_abort is still there. * memory_region_init_rom_device() Doesn't need fixing, because commit 33e0eb5 (soon after commit ef701d7) lifted the error handling further, and in the process changed it from &error_abort to passing it up the call chain. Correct, because the callers are realize() methods. Fix the error handling after memory_region_init_ram() with a Coccinelle semantic patch: @r@ expression mr, owner, name, size, err; position p; @@ memory_region_init_ram(mr, owner, name, size, ( - &error_abort + &error_fatal | err@p ) ); @script:python@ p << r.p; @@ print "%s:%s:%s" % (p[0].file, p[0].line, p[0].column) When the last argument is &error_abort, it gets replaced by &error_fatal. This is the fix. If the last argument is anything else, its position is reported. This lets us check the fix is complete. Four positions get reported: * ram_backend_memory_alloc() Error is passed up the call chain, ultimately through user_creatable_complete(). As far as I can tell, it's callers all handle the error sanely. * fsl_imx25_realize(), fsl_imx31_realize(), dp8393x_realize() DeviceClass.realize() methods, errors handled sanely further up the call chain. We're good. Test case again behaves: $ qemu-system-x86_64 -m 10000000 qemu-system-x86_64: cannot set up guest memory 'pc.ram': Cannot allocate memory [Exit 1 ] The next commits will repair the rest of commit ef701d7's damage. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1441983105-26376-3-git-send-email-armbru@redhat.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
2015-05-12hw/arm/highbank.c: Wire FIQ between CPU <> GICPeter Maydell1-0/+3
Connect FIQ output of the GIC CPU interfaces to the CPUs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1430502643-25909-18-git-send-email-peter.maydell@linaro.org
2015-04-26Switch non-CPU callers from ld/st*_phys to address_space_ld/st*Peter Maydell1-3/+9
Switch all the uses of ld/st*_phys to address_space_ld/st*, except for those cases where the address space is the CPU's (ie cs->as). This was done with the following script which generates a Coccinelle patch. A few over-80-columns lines in the result were rewrapped by hand where Coccinelle failed to do the wrapping automatically, as well as one location where it didn't put a line-continuation '\' when wrapping lines on a change made to a match inside a macro definition. ===begin=== #!/bin/sh -e # Usage: # ./ldst-phys.spatch.sh > ldst-phys.spatch # spatch -sp_file ldst-phys.spatch -dir . | sed -e '/^+/s/\t/ /g' > out.patch # patch -p1 < out.patch for FN in ub uw_le uw_be l_le l_be q_le q_be uw l q; do cat <<EOF @ cpu_matches_ld_${FN} @ expression E1,E2; identifier as; @@ ld${FN}_phys(E1->as,E2) @ other_matches_ld_${FN} depends on !cpu_matches_ld_${FN} @ expression E1,E2; @@ -ld${FN}_phys(E1,E2) +address_space_ld${FN}(E1,E2, MEMTXATTRS_UNSPECIFIED, NULL) EOF done for FN in b w_le w_be l_le l_be q_le q_be w l q; do cat <<EOF @ cpu_matches_st_${FN} @ expression E1,E2,E3; identifier as; @@ st${FN}_phys(E1->as,E2,E3) @ other_matches_st_${FN} depends on !cpu_matches_st_${FN} @ expression E1,E2,E3; @@ -st${FN}_phys(E1,E2,E3) +address_space_st${FN}(E1,E2,E3, MEMTXATTRS_UNSPECIFIED, NULL) EOF done ===endit=== Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2015-04-08arm: memory: Replace memory_region_init_ram with ↵Dirk Müller1-1/+1
memory_region_allocate_system_memory Commit 0b183fc871:"memory: move mem_path handling to memory_region_allocate_system_memory" split memory_region_init_ram and memory_region_init_ram_from_file. Also it moved mem-path handling a step up from memory_region_init_ram to memory_region_allocate_system_memory. Therefore for any board that uses memory_region_init_ram directly, -mem-path is not supported. Fix this by replacing memory_region_init_ram with memory_region_allocate_system_memory. Signed-off-by: Dirk Mueller <dmueller@suse.com> Message-id: CAL5wTH4UHYKpJF=dLJfFzxpufjY189chnCow47-ySuLf8GLbug@mail.gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-04-01hw/arm/highbank: Fix resource leak and wrong image loadingStefan Weil1-2/+1
Coverity reports a resource leak for sysboot_filename which is allocated by qemu_find_file. In addition, that name is used to get the size of the image, but a different image name was used to load it. In addition, instead of passing the maximum allowed image size the actual image size was passed to load_image_targphys. Fix all three issues. Signed-off-by: Stefan Weil <sw@weilnetz.de> Message-id: 1426326781-2488-1-git-send-email-sw@weilnetz.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-19arm: fix memory leakGonglei1-0/+1
Cc: Michael Tokarev <mjt@tls.msk.ru> Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Gonglei <arei.gonglei@huawei.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-02-18error: Use error_report_err() where appropriateMarkus Armbruster1-2/+2
Coccinelle semantic patch: @@ expression E; @@ - error_report("%s", error_get_pretty(E)); - error_free(E); + error_report_err(E); @@ expression E, S; @@ - error_report("%s", error_get_pretty(E)); + error_report_err(E); ( exit(S); | abort(); ) Trivial manual touch-ups in block/sheepdog.c. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2014-12-22target-arm: Disable EL3 on unsupported machinesGreg Bellows1-0/+12
Disables the CPU ARM_FEATURE_EL3 featuere on machine models that can be configured to use Cortex-A9, Cortex-A15, and ARM1176 but don't officially support EL3. This preserves backwards compatibility. Signed-off-by: Greg Bellows <greg.bellows@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1418684992-8996-15-git-send-email-greg.bellows@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-10-20hw: Convert from BlockDriverState to BlockBackend, mostlyMarkus Armbruster1-1/+1
Device models should access their block backends only through the block-backend.h API. Convert them, and drop direct includes of inappropriate headers. Just four uses of BlockDriverState are left: * The Xen paravirtual block device backend (xen_disk.c) opens images itself when set up via xenbus, bypassing blockdev.c. I figure it should go through qmp_blockdev_add() instead. * Device model "usb-storage" prompts for keys. No other device model does, and this one probably shouldn't do it, either. * ide_issue_trim_cb() uses bdrv_aio_discard() instead of blk_aio_discard() because it fishes its backend out of a BlockAIOCB, which has only the BlockDriverState. * PC87312State has an unused BlockDriverState[] member. The next two commits take care of the latter two. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2014-09-09memory: add parameter errp to memory_region_init_ramHu Tao1-2/+3
Add parameter errp to memory_region_init_ram and update all call sites to pass in &error_abort. Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-05-28machine: Conversion of QEMUMachineInitArgs to MachineStateMarcel Apfelbaum1-12/+12
Total removal of QEMUMachineInitArgs struct. QEMUMachineInitArgs's fields are copied into MachineState. Removed duplicated fields from MachineState. All the other changes are only mechanical refactoring, no semantic changes. Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> (s390) Reviewed-by: Michael S. Tsirkin <mst@redhat.com> (PC) [AF: Renamed ms -> machine, use MACHINE_GET_CLASS()] Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-05-13savevm: Remove all the unneeded version_minimum_id_old (arm)Juan Quintela1-1/+0
After commit 767adce2d, they are redundant. This way we don't assign them except when needed. Once there, there were lots of cases where the ".fields" indentation was wrong: .fields = (VMStateField []) { and .fields = (VMStateField []) { Change all the combinations to: .fields = (VMStateField[]){ The biggest problem (apart from aesthetics) was that checkpatch complained when we copy&pasted the code from one place to another. Signed-off-by: Juan Quintela <quintela@redhat.com> [PMM: fixed minor conflict, corrected commit message typos] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-04-04hw/arm/vexpress, hw/arm/highbank: Don't insist that CPU has reset-cbar propertyPeter Maydell1-7/+7
For the machine models which can have a Cortex-A15 CPU (vexpress-a15 and midway), silently continue if the CPU object has no reset-cbar property rather than failing. This allows these boards to be used under KVM with the "-cpu host" option, since the 'host' CPU object has no reset-cbar property. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Rob Herring <rob.herring@linaro.org>
2014-04-04hw/arm/highbank: Don't segfault on unknown CPU namesPeter Maydell1-0/+5
If the user passes an unknown CPU name via the '-cpu' option, exit with an error message rather than segfaulting. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Rob Herring <rob.herring@linaro.org>
2014-02-11exec: Make stl_phys_notdirty input an AddressSpaceEdgar E. Iglesias1-3/+3
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2013-12-23hw/arm/highbank: Simplify code (memory region in device state)Stefan Weil1-4/+3
The memory region can be included by value instead of by reference in the device state. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-12-17arm/highbank.c: Fix MPCore periphbase namePeter Crosthwaite1-7/+8
GIC_BASE_ADDR is not the base address of the GIC. Its clear from the code that this is the base address of the MPCore. Rename to MPCORE_PERIPHBASE accordingly. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 90798bd3507205c16238b8b19a1a58c5437cf7ca.1387160489.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17arm/highbank: Fix CBAR initialisationPeter Crosthwaite1-3/+5
Fix the CBAR initialisation by using the newly defined static property. CBAR is now set before realization, so the intended value is now actually used. So I have kind of tested this. I booted an ARM kernel on Highbank with the stock Highbank DTB. It doesn't boot (and I will be doing something wrong), but before this patch I got this: ------------[ cut here ]------------ WARNING: CPU: 0 PID: 0 at /workspaces/pcrost/public/linux2.git/arch/arm/mm/ioremap.c:301 __arm_ioremap_pfn_caller+0x180/0x198() CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 3.13.0-rc1-next-20131126-dirty #2 [<c0015164>] (unwind_backtrace) from [<c00118c0>] (show_stack+0x10/0x14) [<c00118c0>] (show_stack) from [<c02bd5fc>] (dump_stack+0x78/0x90) [<c02bd5fc>] (dump_stack) from [<c001f110>] (warn_slowpath_common+0x68/0x84) [<c001f110>] (warn_slowpath_common) from [<c001f1f4>] (warn_slowpath_null+0x1c/0x24) [<c001f1f4>] (warn_slowpath_null) from [<c0017c6c>] (__arm_ioremap_pfn_caller+0x180/0x198) [<c0017c6c>] (__arm_ioremap_pfn_caller) from [<c0017cd8>] (__arm_ioremap_caller+0x54/0x5c) [<c0017cd8>] (__arm_ioremap_caller) from [<c0017d10>] (__arm_ioremap+0x18/0x1c) [<c0017d10>] (__arm_ioremap) from [<c03913c0>] (highbank_init_irq+0x34/0x8c) [<c03913c0>] (highbank_init_irq) from [<c038c228>] (init_IRQ+0x28/0x2c) [<c038c228>] (init_IRQ) from [<c03899ec>] (start_kernel+0x234/0x398) [<c03899ec>] (start_kernel) from [<00008074>] (0x8074) ---[ end trace 3406ff24bd97382f ]--- Which disappears with this patch. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: fedec366aaa512d75093635f523d1dbcb3358361.1387160489.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17arm/highbank: Use object_new() rather than cpu_arm_init()Peter Crosthwaite1-3/+9
To allow the machine model to set device properties before CPU realization. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 8c671e500390c8be0cc363e887e32867d1d1b0d2.1387160489.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-08-28hw: Clean up bogus default boot orderMarkus Armbruster1-2/+0
We set default boot order "cad" in every single machine definition except "pseries" and "moxiesim", even though very few boards actually care for boot order, and "cad" makes sense for even fewer. Machines that care: * pc and its variants Accept up to three letters 'a', 'b' (undocumented alias for 'a'), 'c', 'd' and 'n'. Reject all others (fatal with -boot). * nseries (n800, n810) Check whether order starts with 'n'. Silently ignored otherwise. * prep, g3beige, mac99 Extract the first character the machine understands (subset of 'a'..'f'). Silently ignored otherwise. * spapr Accept an arbitrary string (vl.c restricts it to contain only 'a'..'p', no duplicates). * sun4[mdc] Use the first character. Silently ignored otherwise. Strip characters these machines ignore from their default boot order. For all other machines, remove the unused default boot order alltogether. Note that my rename of QEMUMachine member boot_order to default_boot_order and QEMUMachineInitArgs member boot_device to boot_order has a welcome side effect: it makes every use of boot orders visible in this patch, for easy review. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-08-20hw/arm/highbank: Don't use arm_pic_init_cpu()Peter Maydell1-3/+1
Drop the now-deprecated arm_pic_init_cpu() in favour of directly getting the IRQ line from the ARMCPU object. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1375977856-25046-5-git-send-email-peter.maydell@linaro.org
2013-07-29highbank: QOM cast cleanup for HighbankRegsStateAndreas Färber1-5/+11
Add type constant and use QOM casts. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-15ARM/highbank: add support for Calxeda ECX-2000 / MidwayAndre Przywara1-5/+27
The Calxeda ECX-2000 chip (aka. Midway) is model-wise quite similar to the Highbank. The most prominent difference is the Cortex-A15 CPU core in it, together with the associated core peripherals. Add a new ARM machine type called "midway". Move the L2 cache controller device into the Highbank specific part, since Midway does not have (and need) it. Signed-off-by: Andre Przywara <andre.przywara@calxeda.com> Message-id: 1373026897-12085-3-git-send-email-andre.przywara@calxeda.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.1 at 2024-08-24 20:02:16 +0000