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2012-10-31cpus: Pass CPUState to qemu_cpu_is_self()Andreas Färber1-2/+4
Change return type to bool, move to include/qemu/cpu.h and add documentation. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com> [AF: Updated new caller qemu_in_vcpu_thread()]
2012-10-30target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi()Andreas Färber1-1/+1
Simplifies the call in apic_sipi() again and needed for moving halted field to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-10-30apic: Store X86CPU in APICCommonStateAndreas Färber1-17/+21
Prepares for using a link<> property to connect APIC with CPU and for changing the CPU APIs to CPUState. Resolve Coding Style warnings by moving the closing parenthesis of foreach_apic() macro to next line. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity1-7/+7
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-07-10apic: Defer interrupt updates to VCPU threadJan Kiszka1-1/+4
KVM performs TPR raising asynchronously to QEMU, specifically outside QEMU's global lock. When an interrupt is injected into the APIC and TPR is checked to decide if this can be delivered, a stale TPR value may be used, causing spurious interrupts in the end. Fix this by deferring apic_update_irq to the context of the target VCPU. We introduce a new interrupt flag for this, CPU_INTERRUPT_POLL. When it is set, the VCPU calls apic_poll_irq before checking for further pending interrupts. To avoid special-casing KVM, we also implement this logic for TCG mode. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-07-10apic: Reevaluate pending interrupts on LVT_LINT0 changesJan Kiszka1-4/+14
When the guest modifies the LVT_LINT0 register, we need to check if some pending PIC interrupt can now be delivered. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-07-10apic: Resolve potential endless loop around apic_update_irqJan Kiszka1-3/+7
Commit d96e173769 refactored the reinjection of pending PIC interrupts. However, it missed the potential loop of apic_update_irq -> apic_deliver_pic_intr -> apic_local_deliver -> apic_set_irq -> apic_update_irq that /could/ occur if LINT0 is injected as APIC_DM_FIXED and that vector is currently blocked via TPR. Resolve this by reinjecting only where it matters: inside apic_get_interrupt. This function may clear a vector while a PIC-originated reason still exists. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-06-21Introduce apic-msidef.hAnthony PERARD1-10/+1
This patch move the msi definition from apic.c to apic-msidef.h. So it can be used also by other .c files. Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Michael S. Tsirkin <mst@redhat.com>
2012-05-16pc: Enable MSI support at APIC levelJan Kiszka1-0/+3
Push msi_supported enabling to the APIC implementations where we can encapsulate the decision more cleanly, hiding the details from the generic code. Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-02-18kvmvapic: Introduce TPR access optimization for Windows guestsJan Kiszka1-11/+115
This enables acceleration for MMIO-based TPR registers accesses of 32-bit Windows guest systems. It is mostly useful with KVM enabled, either on older Intel CPUs (without flexpriority feature, can also be manually disabled for testing) or any current AMD processor. The approach introduced here is derived from the original version of qemu-kvm. It was refactored, documented, and extended by support for user space APIC emulation, both with and without KVM acceleration. The VMState format was kept compatible, so was the ABI to the option ROM that implements the guest-side para-virtualized driver service. This enables seamless migration from qemu-kvm to upstream or, one day, between KVM and TCG mode. The basic concept goes like this: - VAPIC PV interface consisting of I/O port 0x7e and (for KVM in-kernel irqchip) a vmcall hypercall is registered - VAPIC option ROM is loaded into guest - option ROM activates TPR MMIO access reporting via port 0x7e - TPR accesses are trapped and patched in the guest to call into option ROM instead, VAPIC support is enabled - option ROM TPR helpers track state in memory and invoke hypercall to poll for pending IRQs if required Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-02-15qom: Unify type registrationAndreas Färber1-2/+2
Replace device_init() with generalized type_init(). While at it, unify naming convention: type_init([$prefix_]register_types) Also, type_init() is a function, so add preceding blank line where necessary and don't put a semicolon after the closing brace. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Cc: malc <av1474@comtv.ru> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03qdev: register all types natively through QEMU Object ModelAnthony Liguori1-4/+6
This was done in a mostly automated fashion. I did it in three steps and then rebased it into a single step which avoids repeatedly touching every file in the tree. The first step was a sed-based addition of the parent type to the subclass registration functions. The second step was another sed-based removal of subclass registration functions while also adding virtual functions from the base class into a class_init function as appropriate. Finally, a python script was used to convert the DeviceInfo structures and qdev_register_subclass functions to TypeInfo structures, class_init functions, and type_register_static calls. We are almost fully converted to QOM after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27sysbus: apic: ioapic: convert to QEMU Object ModelAnthony Liguori1-7/+14
This converts three devices because apic and ioapic are subclasses of sysbus. Converting subclasses independently of their base class is prohibitively hard. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-19apic: Open-code timer save/restoreJan Kiszka1-18/+12
To enable migration between accelerated and non-accelerated APIC models, we will need to handle the timer saving and restoring specially and can no longer rely on the automatics of VMSTATE_TIMER. Specifically, accelerated model will not start any QEMUTimer. This patch therefore factors out the generic bits into apic_next_timer and use a post-load callback to implemented model-specific logic. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19apic: Factor out base class for KVM reuseJan Kiszka1-297/+41
The KVM in-kernel APIC model will reuse parts of the user space model while providing the same frontend view to guest and most management interfaces. Factor out an APIC base class to encapsulate those parts that will be shared by user space and KVM model. This class offers callback hooks for init, base/tpr setting, and the external NMI delivery that will be set via APICCommonInfo structure and implemented specifically in the subclasses. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19apic: Introduce apic_report_irq_deliveredJan Kiszka1-3/+8
The in-kernel i8259 and IOAPIC backends for KVM will need this, so encapsulate the shared bits. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19apic: Inject external NMI events via LINT1Jan Kiszka1-0/+7
On real hardware, NMI button events are injected via the LINT1 line of the APICs. E.g. kdump expect this wiring and gets upset if the per-APIC LINT1 mask is not respected, i.e. if NMIs are injected to VCPUs that should not receive them. Change the APIC emulation code to reflect this. Based on qemu-kvm patch by Lai Jiangshan. CC: Lai Jiangshan <laijs@cn.fujitsu.com> Reported-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19apic: Stop timer on resetJan Kiszka1-0/+2
All LVTs are masked on reset, so the timer becomes ineffective. Letting it tick nevertheless is harmless, but will at least create a spurious trace event. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2011-11-28sysbus: rename sysbus_init_mmio_region() to sysbus_init_mmio()Avi Kivity1-1/+1
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-10-16pc: Fix and clean up PIC-to-APIC IRQ pathJan Kiszka1-0/+4
The master PIC is connected to the LINTIN0 of the APICs. As the APIC currently does not track the state of that line, we have to ask the PIC to reinject its IRQ after the CPU picked up an event from the APIC. This introduces pic_get_output to read the master PIC IRQ line state without changing it. The APIC uses this function to decide if a PIC IRQ should be reinjected on apic_update_irq. This reflects better how the real hardware works. The patch fixes some failures of the kvm unit tests apic and eventinj by allowing to enable the proper CPU IRQ deassertion when the guest masks some pending IRQs at PIC level. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-22target-i386: Remove unused polarity arguments from APIC APIJan Kiszka1-13/+9
Polarity of external interrupts needs to be handled in the IOAPIC. Passing it to the APIC is pointless. So remove all these arguments. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-22apic: convert to memory APIAvi Kivity1-15/+10
Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-03-21change all other clock references to use nanosecond resolution accessorsPaolo Bonzini1-4/+4
This was done with: sed -i 's/qemu_get_clock\>/qemu_get_clock_ns/' \ $(git grep -l 'qemu_get_clock\>' ) sed -i 's/qemu_new_timer\>/qemu_new_timer_ns/' \ $(git grep -l 'qemu_new_timer\>' ) after checking that get_clock and new_timer never occur twice on the same line. There were no missed occurrences; however, even if there had been, they would have been caught by the compiler. There was exactly one false positive in qemu_run_timers: - current_time = qemu_get_clock (clock); + current_time = qemu_get_clock_ns (clock); which is of course not in this patch. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2011-02-14correctly check ppr priority during interrupt injection]Gleb Natapov1-12/+30
TPR blocks all interrupts in a priority class, so simple "less or equal" check is not enough. Signed-off-by: Gleb Natapov <gleb@redhat.com> Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-02-04ioapic: Implement EOI handling for level-triggered IRQsJan Kiszka1-3/+6
Add the missing EOI broadcast from local APIC to the IOAPICs on completion of level-triggered IRQs. This ensures that a still asserted IRQ source properly re-triggers an APIC IRQ. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-12-20apic: Fix accidental use of SoftFloat uint32 typeAndreas Färber1-1/+1
softfloat.h's uint32 type has least-width semantics. Surrounding code uses uint32_t, so use uint32_t here, too. v4: * Summary change. v3: * Split off. Signed-off-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-11Add endianness as io mem parameterAlexander Graf1-1/+2
As stated before, devices can be little, big or native endian. The target endianness is not of their concern, so we need to push things down a level. This patch adds a parameter to cpu_register_io_memory that allows a device to choose its endianness. For now, all devices simply choose native endian, because that's the same behavior as before. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-11-16apic: Don't iterate past last used apicAlex Williamson1-0/+4
local_apics are allocated sequentially and never removed, so we can stop any iterations that go to MAX_APICS as soon as we hit the first NULL. Looking at a small guest running a virtio-net workload with oprofile, this drops apic_get_delivery_bitmask() from #3 in the profile to down in the noise. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-10-20apic: convert debug printf statements to tracepointsBlue Swirl1-30/+18
Replace debug printf statements with tracepoints. Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19apic: qdev conversion cleanupBlue Swirl1-48/+38
Make APICState completely private to apic.c by using DeviceState in external APIs. Move apic_init() to pc.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19apic: convert to qdevBlue Swirl1-28/+60
Convert to qdev. Use an opaque CPUState pointer because of missing VMState implementation for CPUState. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19apic: avoid using CPUState internalsBlue Swirl1-25/+14
Move the actual CPUState contents handling to cpu.h and cpuid.c. Handle CPU reset and set env->halted in pc.c. Add a function to get the local APIC state of the current CPU for the MMIO. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19apic: avoid passing CPUState from CPU codeBlue Swirl1-23/+16
Pass only APICState when accessing APIC from CPU code. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19apic: avoid passing CPUState from devicesBlue Swirl1-18/+14
Pass only APICState from pc.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29apic: improve debuggingBlue Swirl1-13/+30
Add a DPRINTF macro. Use TARGET_FMT_plx for printing target_phys_addr_t items. Add a separate flag for debugging coalescing interrupts. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-21Move x86 specific PC declarations to a separate fileBlue Swirl1-0/+1
x86 definitions (especially CPUState uses) prevent many files from being compiled within libhw. Move x86 specific declarations (APIC stuff) to a separate file. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-04KVM: Rework VCPU state writeback APIJan Kiszka1-2/+0
This grand cleanup drops all reset and vmsave/load related synchronization points in favor of four(!) generic hooks: - cpu_synchronize_all_states in qemu_savevm_state_complete (initial sync from kernel before vmsave) - cpu_synchronize_all_post_init in qemu_loadvm_state (writeback after vmload) - cpu_synchronize_all_post_init in main after machine init - cpu_synchronize_all_post_reset in qemu_system_reset (writeback after system reset) These writeback points + the existing one of VCPU exec after cpu_synchronize_state map on three levels of writeback: - KVM_PUT_RUNTIME_STATE (during runtime, other VCPUs continue to run) - KVM_PUT_RESET_STATE (on synchronous system reset, all VCPUs stopped) - KVM_PUT_FULL_STATE (on init or vmload, all VCPUs stopped as well) This level is passed to the arch-specific VCPU state writing function that will decide which concrete substates need to be written. That way, no writer of load, save or reset functions that interact with in-kernel KVM states will ever have to worry about synchronization again. That also means that a lot of reasons for races, segfaults and deadlocks are eliminated. cpu_synchronize_state remains untouched, just as Anthony suggested. We continue to need it before reading or writing of VCPU states that are also tracked by in-kernel KVM subsystems. Consequently, this patch removes many cpu_synchronize_state calls that are now redundant, just like remaining explicit register syncs. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2009-11-07v3: don't call reset functions on cpu initializationGlauber Costa1-1/+0
There is absolutely no need to call reset functions when initializing devices. Since we are already registering them, calling qemu_system_reset() should suffice. Actually, it is what happens when we reboot the machine, and using the same process instead of a special case semantics will even allow us to find bugs easier. Furthermore, the fact that we initialize things like the cpu quite early, leads to the need to introduce synchronization stuff like qemu_system_cond. This patch removes it entirely. All we need to do is call qemu_system_reset() only when we're already sure the system is up and running I tested it with qemu (with and without io-thread) and qemu-kvm, and it seems to be doing okay - although qemu-kvm uses a slightly different patch. [ v2: user mode still needs cpu_reset, so put it in ifdef. ] [ v3: leave qemu_system_cond for now. ] Signed-off-by: Glauber Costa <glommer@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-05set correct CS seg limit and flags on sipiGleb Natapov1-1/+1
TCG works with incorrect values somehow. Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori1-7/+7
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Get rid of _t suffixmalc1-7/+7
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
2009-09-11Revert "don't call cpu_sychronize_state from reset handlers"Anthony Liguori1-0/+2
This reverts commit 733318ea9c6d846a6a047b87619e7d9d6e9707d1. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-09-09don't call cpu_sychronize_state from reset handlersGlauber Costa1-2/+0
Doing this will make the vcpu ioctl be issued from the I/O thread, instead of cpu thread. The correct behaviour is to call it from within the cpu thread, as soon as we are ready to go. Signed-off-by: Glauber Costa <glommer@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-27kvm: Simplify cpu_synchronize_state()Avi Kivity1-3/+4
cpu_synchronize_state() is a little unreadable since the 'modified' argument isn't self-explanatory. Simplify it by making it always synchronize the kernel state into qemu, and automatically flush the registers back to the kernel if they've been synchronized on this exit. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-27Port apic to new VMState designJuan Quintela1-34/+33
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-25Make CPURead/WriteFunc structure 'const'Blue Swirl1-2/+2
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl1-2/+1
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-06-29Revert "Introduce reset notifier order"Jan Kiszka1-1/+1
This reverts commit 8217606e6edb49591b4a6fd5a0d1229cebe470a9 (and updates later added users of qemu_register_reset), we solved the problem it originally addressed less invasively. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-06-29kvm: Rework VCPU synchronizationJan Kiszka1-0/+3
During startup and after reset we have to synchronize user space to the in-kernel KVM state. Namely, we need to transfer the VCPU registers when they change due to VCPU as well as APIC reset. This patch refactors the required hooks so that kvm_init_vcpu registers its own per-VCPU reset handler and adds a cpu_synchronize_state to the APIC reset. That way we no longer depend on the new reset order (and can drop this disliked interface again) and we can even drop a KVM hook in main(). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-06-24qemu/apic: minimal MSI/MSI-X implementation for PCMichael S. Tsirkin1-4/+39
Implement MSI support in APIC. Note that MSI and MMIO APIC registers are at the same memory location, but actually not on the global bus: MSI is on PCI bus, APIC is connected directly to the CPU. We map them on the global bus at the same address which happens to work because MSI registers are reserved in APIC MMIO and vice versa. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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