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path: root/hw/apb_pci.c
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2013-04-08hw: move PCI bridges to hw/pci-* or hw/ARCHPaolo Bonzini1-542/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move headers to include/Paolo Bonzini1-1/+1
Many of these should be cleaned up with proper qdev-/QOM-ification. Right now there are many catch-all headers in include/hw/ARCH depending on cpu.h, and this makes it necessary to compile these files per-target. However, fixing this does not belong in these patches. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-26pci: Allow PCI bus creation interfaces to specify the type of busAlex Williamson1-2/+2
No change to any types. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-03-01hw: include hw header files with full pathsPaolo Bonzini1-6/+6
Done with this script: cd hw for i in `find . -name '*.h' | sed 's/^..//'`; do echo '\,^#.*include.*["<]'$i'[">], s,'$i',hw/&,' done | sed -i -f - `find . -type f` This is so that paths remain valid as files are moved. Instead, files in hw/dataplane are referenced with the relative path. We know they are not going to move to include/, and they are the only include files that are in subdirectories _and_ move. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-01-21sysbus: Drop sysbus_from_qdev() cast macroAndreas Färber1-1/+1
Replace by SYS_BUS_DEVICE() QOM cast macro using a scripted conversion. Avoids the old macro creeping into new code. Resolve a Coding Style warning in openpic code. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-01-10Make all static TypeInfos constAndreas Färber1-3/+3
Since 39bffca2030950ef6efe57c2fac8327a45ae1015 (qdev: register all types natively through QEMU Object Model), TypeInfo as used in the common, non-iterative pattern is no longer amended with information and should therefore be const. Fix the documented QOM examples: sed -i 's/static TypeInfo/static const TypeInfo/g' include/qom/object.h Since frequently the wrong examples are being copied by contributors of new devices, fix all types in the tree: sed -i 's/^static TypeInfo/static const TypeInfo/g' */*.c sed -i 's/^static TypeInfo/static const TypeInfo/g' */*/*.c This also avoids to piggy-back these changes onto real functional changes or other refactorings. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-12-19softmmu: move include files to include/sysemu/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19exec: move include files to include/exec/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-17pci: rename pci_internals.h pci_bus.hMichael S. Tsirkin1-1/+1
There are lots of external users of pci_internals.h, apparently making it an internal interface only didn't work out. Let's stop pretending it's an internal header. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-12-17pci: update all users to look in pci/Michael S. Tsirkin1-4/+4
update all users so we can remove the makefile hack. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity1-12/+12
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-05-12sun4u: implement interrupt clearing registersArtyom Tarasenko1-0/+12
Implement registers for clearing OBIO and PCI interrupts Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-05-12sun4u: initialize OBIO interrupt mappingsArtyom Tarasenko1-0/+6
Similarly to PCI interrupt mappings, the OBIO ones have to be initialized. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17sparc64: implement PCI and ISA irqsBlue Swirl1-13/+35
Generate correct trap for external interrupts. Map PCI and ISA IRQs to RIC/UltraSPARC-IIi interrupt vectors. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17apb: use normal PCI device header for PBM deviceBlue Swirl1-1/+0
PBM has a normal PCI device header, fix. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-02-15qom: Unify type registrationAndreas Färber1-2/+2
Replace device_init() with generalized type_init(). While at it, unify naming convention: type_init([$prefix_]register_types) Also, type_init() is a function, so add preceding blank line where necessary and don't put a semicolon after the closing brace. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Cc: malc <av1474@comtv.ru> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03qdev: register all types natively through QEMU Object ModelAnthony Liguori1-18/+23
This was done in a mostly automated fashion. I did it in three steps and then rebased it into a single step which avoids repeatedly touching every file in the tree. The first step was a sed-based addition of the parent type to the subclass registration functions. The second step was another sed-based removal of subclass registration functions while also adding virtual functions from the base class into a class_init function as appropriate. Finally, a python script was used to convert the DeviceInfo structures and qdev_register_subclass functions to TypeInfo structures, class_init functions, and type_register_static calls. We are almost fully converted to QOM after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27qdev: change ambiguous qdev namesAnthony Liguori1-2/+2
Reported-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27sysbus: apic: ioapic: convert to QEMU Object ModelAnthony Liguori1-5/+12
This converts three devices because apic and ioapic are subclasses of sysbus. Converting subclasses independently of their base class is prohibitively hard. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27pci: convert to QEMU Object ModelAnthony Liguori1-20/+34
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-11-28sysbus: rename sysbus_init_mmio_region() to sysbus_init_mmio()Avi Kivity1-3/+3
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-09-04apb_pci: convert PCI space to memory APIBlue Swirl1-5/+8
Add a new memory space for PCI instead of using system memory. This also fixes a bug where VGA region vga.chain4 is accidentally mapped to 0xa0000 instead of 0x1ff000a0000. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-22apb_pci: convert to memory APIAvi Kivity1-47/+37
Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-08pci: pass I/O address space to new PCI busAvi Kivity1-0/+1
This lets us register BARs in the I/O address space. Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-07-29pci: pass address space to pci bus when createdAvi Kivity1-0/+2
This is now done sloppily, via get_system_memory(). Eventually callers will be converted to stop using that. Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-06-12apb_pci: convert to PCIDeviceInfo to initialize idsIsaku Yamahata1-7/+6
Use PCIDeviceInfo to initialize ids. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2010-12-11Make simple io mem handler endian awareAlexander Graf1-1/+2
As an alternative to the 3 individual handlers, there is also a simplified io mem hook function. To be consistent, let's add an endianness parameter there too. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-11Add endianness as io mem parameterAlexander Graf1-2/+4
As stated before, devices can be little, big or native endian. The target endianness is not of their concern, so we need to push things down a level. This patch adds a parameter to cpu_register_io_memory that allows a device to choose its endianness. For now, all devices simply choose native endian, because that's the same behavior as before. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-09-07pci_bridge: introduce pci bridge library.Isaku Yamahata1-13/+42
introduce pci bridge library. convert apb bridge and dec p2p bridge to use new pci bridge library. save/restore is supported as a side effect. This is also preparation for pci express root/upstream/downstream port. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2010-07-22pci/bridge: split out pci bridge code into pci_bridge.c from pci.cIsaku Yamahata1-0/+1
Move pci bridge related code into pci_bridge.c from pci.c for further enhancement. pci.c is big enough now, so split it out. No code change but exporting some accesser functions. In fact, few pci bridge functions stays in pci.c. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2010-07-11pci: set PCI multi-function bit appropriately.Isaku Yamahata1-3/+0
Set PCI multi-function bit according to multifunction property. PCI address, devfn ,is exported to users as addr property, so users can populate pci function(PCIDevice in qemu) at arbitrary devfn. It means each function(PCIDevice) don't know whether pci device (PCIDevice[8]) is multi function or not. So this patch allows user to set multifunction bit via property and checks whether multifunction bit is set correctly. Cc: Juan Quintela <quintela@redhat.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-11pci_bridge: make pci bridge aware of pci multi function bit.Isaku Yamahata1-2/+2
make pci bridge aware of pci multi function property and let pci generic code to set the bit. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-11pci: remove PCIDeviceInfo::header_typeIsaku Yamahata1-1/+1
replace PCIDeviceInfo::header_type with is_bridge as suggested by Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-11pci: don't overwrite multi functio bit in pci header type.Isaku Yamahata1-2/+0
Don't overwrite pci header type. Otherwise, multi function bit which pci_init_header_type() sets appropriately is lost. Anyway PCI_HEADER_TYPE_NORMAL is zero, so it is unnecessary to zero which is already zero cleared. how to test: run qemu and issue info pci to see whether a device in question is normal device, not pci-to-pci bridge. This is handy because guest os isn't required. tested changes: The following files are covered by using following commands. sparc64-softmmu apb_pci.c, vga-pci.c, cmd646.c, ne2k_pci.c, sun4u.c ppc-softmmu grackle_pci.c, cmd646.c, ne2k_pci.c, vga-pci.c, macio.c ppc-softmmu -M mac99 unin_pci.c(uni-north, uni-north-agp) ppc64-softmmu pci-ohci, ne2k_pci, vga-pci, unin_pci.c(u3-agp) x86_64-softmmu acpi_piix4.c, ide/piix.c, piix_pci.c -vga vmware vmware_vga.c -watchdog i6300esb wdt_i6300esb.c -usb usb-uhci.c -sound ac97 ac97.c -nic model=rtl8139 rtl8139.c -nic model=pcnet pcnet.c -balloon virtio virtio-pci.c: untested changes: The following changes aren't tested. prep_pci.c: ppc-softmmu -M prep should cover, but core dumped. unin_pci.c(uni-north-pci): the caller is commented out. openpic.c: the caller is commented out in ppc_prep.c Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-04blockdev: Collect block device code in new blockdev.cMarkus Armbruster1-0/+1
Anything that moves hundreds of lines out of vl.c can't be all bad. Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2010-05-26sparc64: clean up pci bridge mapIgor V. Kovalenko1-23/+26
- remove unused host state and store pci bus pointer only - do not map host state access into unused 1fe.10000000 range - reorder pci region registration - assign pci i/o region to isa_mem_base Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-12apb: don't use any static stateBlue Swirl1-4/+3
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-21Fix Sparc64 buildBlue Swirl1-1/+1
952760bb7bce7fbfe0afcf04fee268745f297b87 missed one change. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-22apc_pci: simplify using rwhandlerMichael S. Tsirkin1-61/+13
Use rwhandler to simplify apb_pci. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-22apb_pci: minor cleanupMichael S. Tsirkin1-4/+2
pci_data_write ignores high 8 bit in address, so there seems to be no need to set them in apb_pci. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-14sparc64: use PCI accessors for APB/PBMBlue Swirl1-11/+15
Remove useless set to zero lines. Latency programming should be done by BIOS, reset value is zero. Add revision to APB, don't enable PCI_COMMAND_MASTER and set status according to APB specification. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-30sparc64: implement basic IOMMU/interrupt handlingBlue Swirl1-22/+142
Also add reset control. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-29Sparc64: byte swap IO port accessBlue Swirl1-4/+4
This requires an updated OpenBIOS image. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-26PCI: fix bridge configurationBlue Swirl1-0/+1
PCI bridges' qdev info structures must indicate bridge header type, otherwise critical bridge registers (esp. PCI_PRIMARY_BUS, PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS) will not be writable. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-22Sparc64: fix PCI probe problemsBlue Swirl1-12/+7
Byte swap PCI config values. Remove old bogus PCI config mechanism so that device 0:0.0 can be probed. This requires OpenBIOS r667. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-12Sparc64: Fix PCI config accessor orderBlue Swirl1-4/+4
Fix by Igor Kovalenko. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-11Sparc64: enable real access to PCI configuration spaceBlue Swirl1-3/+85
Leave the bogus access method used by OpenBIOS in place for now. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-10Sparc64: increase APB register rangeBlue Swirl1-2/+2
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-12-27Sparc64: move APB PCI memory base to correct locationBlue Swirl1-0/+2
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-12-02pci: move apb specific stuff to apb_pci.cMichael S. Tsirkin1-0/+22
pci code had a TODO to move apb specific pci bridge initialization to apb_pci. Implement this and remove the TODO. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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