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path: root/fpu/softfloat-specialize.h
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2011-10-19softfloat: Implement fused multiply-addPeter Maydell1-0/+178
Implement fused multiply-add as a softfloat primitive. This implements "a+b*c" as a single step without any intermediate rounding; it is specified in IEEE 754-2008 and implemented in a number of CPUs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-07-29softfloat: change default nan definitions to variablesPaolo Bonzini1-0/+72
Most definitions in softfloat.h are really target-independent, but the file is not because it includes definitions of the default NaN values. Change those to variables to allow including softfloat.h from files that are not compiled per-target. By making them const, the compiler is allowed to optimize them into softfloat functions that use them. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-06-03softfloat: always enable floatx80 and float128 supportAurelien Jarno1-7/+0
Now that softfloat-native is gone, there is no real point on not always enabling floatx80 and float128 support. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25softfloat: fix floatx80 handling of NaNAurelien Jarno1-7/+16
The floatx80 format uses an explicit bit that should be taken into account when converting to and from commonNaN format. When converting to commonNaN, the explicit bit should be removed if it is a 1, and a default NaN should be used if it is 0. When converting from commonNan, the explicit bit should be added. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12unicore32: necessary modifications for other files to support unicore32Guan Xuetao1-5/+5
Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-03-21softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_tAndreas Färber1-31/+31
They are defined with the same semantics as the POSIX types, so prefer those for consistency. Suggested by Peter Maydell. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-21softfloat: Prepend QEMU-style header with derivation noticeAndreas Färber1-0/+5
The SoftFloat license requires "prominent notice that the work is derivative". Having added features like improved 16-bit support for arm already, add such a notice to the sources. softfloat-native.[ch] are not under the SoftFloat license and thus are not changed. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-24softfloat: move all default NaN definitions to softfloat.h.Christophe Lyon1-68/+0
These special values are needed to implement some helper functions, which return/use these values in some cases. Signed-off-by: Christophe Lyon <christophe.lyon@st.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10softfloat: Correctly handle NaNs in float16_to_float32()Peter Maydell1-0/+17
Correctly handle NaNs in float16_to_float32(), by defining and using a float16ToCommonNaN() function, as we do with the other formats. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10softfloat: Fix single-to-half precision float conversionsPeter Maydell1-0/+21
Fix various bugs in the single-to-half-precision conversion code: * input NaNs not correctly converted in IEEE mode (fixed by defining and using a commonNaNToFloat16()) * wrong values returned when converting NaN/Inf into non-IEEE half precision value * wrong values returned for conversion of values which are on the boundary between denormal and zero for the half precision format * zeroes not correctly identified * excessively large results in non-IEEE mode should generate InvalidOp, not Overflow Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10softfloat: Honour default_nan_mode for float-to-float conversionsChristophe Lyon1-4/+25
Honour the default_nan_mode flag when doing conversions between different floating point formats, as well as when returning a NaN from a two-operand floating point function. This corrects the behaviour of float<->double conversions on both ARM and SH4. Signed-off-by: Christophe Lyon <christophe.lyon@st.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10softfloat: Add float16 type and float16 NaN handling functionsPeter Maydell1-0/+63
Add a float16 type to softfloat, rather than using bits16 directly. Also add the missing functions float16_is_quiet_nan(), float16_is_signaling_nan() and float16_maybe_silence_nan(), which are needed for the float16 conversion routines. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-20softfloat: fix floatx80_is_{quiet,signaling}_nan()Aurelien Jarno1-4/+8
floatx80_is_{quiet,signaling}_nan() functions are incorrectly detecting the type of NaN, depending on SNAN_BIT_IS_ONE, one of the two is returning the correct value, and the other true for any kind of NaN. This patch fixes that by applying the same kind of comparison as for other float formats, but taking into account the explicit bit. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14softfloat: fix default-NaN modeAurelien Jarno1-18/+18
When the default-NaN mode is enabled, it should return the default NaN value, but it should anyway raise the invalid operation flag if one of the operand is an sNaN. I have checked that this behavior matches the ARM and SH4 manuals, as well as real SH4 hardware. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14softfloat: SH4 has the sNaN bit setAurelien Jarno1-5/+5
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06target-ppc: Implement correct NaN propagation rulesAurelien Jarno1-2/+17
Implement the correct NaN propagation rules for PowerPC targets by providing an appropriate pickNaN function. Also fix the #ifdef tests for default NaN definition, the correct name is TARGET_PPC instead of TARGET_POWERPC. Reviewed-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06target-mips: Implement correct NaN propagation rulesAurelien Jarno1-0/+27
Implement the correct NaN propagation rules for MIPS targets by providing an appropriate pickNaN function. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06softfloat: use float{32,64,x80,128}_maybe_silence_nan()Aurelien Jarno1-43/+16
Use float{32,64,x80,128}_maybe_silence_nan() instead of toggling the sNaN bit manually. This allow per target implementation of sNaN to qNaN conversion. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2011-01-06softfloat: add float{x80,128}_maybe_silence_nan()Aurelien Jarno1-0/+46
Add float{x80,128}_maybe_silence_nan() functions, they will be need by propagateFloat{x80,128}NaN(). Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06softfloat: fix float{32,64}_maybe_silence_nan() for MIPSAurelien Jarno1-6/+14
On targets that define sNaN with the sNaN bit as one, simply clearing this bit may correspond to an infinite value. Convert it to a default NaN if SNAN_BIT_IS_ONE, as it corresponds to the MIPS implementation, the only emulated CPU with SNAN_BIT_IS_ONE. When other CPU of this type are added, this might be updated to include more cases. Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06softfloat: rename *IsNaN variables to *IsQuietNaNAurelien Jarno1-16/+20
Similarly to what has been done in commit 185698715dfb18c82ad2a5dbc169908602d43e81 rename the misnamed *IsNaN variables into *IsQuietNaN. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06softfloat: remove HPPA specific codeAurelien Jarno1-5/+1
We don't have any HPPA target, so let's remove HPPA specific code. It can be re-added when someone adds an HPPA target. This has been blessed by Stuart Brady <sdb@zubnet.me.uk>, author of the target-hppa fork. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-02target-arm: Implement correct NaN propagation rulesPeter Maydell1-0/+23
Implement the correct NaN propagation rules for ARM targets by providing an appropriate pickNaN function. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-02softfloat: abstract out target-specific NaN propagation rulesPeter Maydell1-60/+100
IEEE754 doesn't specify precisely what NaN should be returned as the result of an operation on two input NaNs. This is therefore target-specific. Abstract out the code in propagateFloat*NaN() which was implementing the x87 propagation rules, so that it can be easily replaced on a per-target basis. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-02softfloat: Rename float*_is_nan() functions to float*_is_quiet_nan()Peter Maydell1-12/+12
The softfloat functions float*_is_nan() were badly misnamed, because they return true only for quiet NaNs, not for all NaNs. Rename them to float*_is_quiet_nan() to more accurately reflect what they do. This change was produced by: perl -p -i -e 's/_is_nan/_is_quiet_nan/g' $(git grep -l is_nan) (with the results manually checked.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Nathan Froyd <froydnj@codesourcery.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-07softfloat: Add float*_maybe_silence_nan() functionsPeter Maydell1-0/+38
Add functions float*_maybe_silence_nan() which ensure that a value is not a signaling NaN by turning it into a quiet NaN. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
2009-12-13target-alpha: Enable softfloat.Richard Henderson1-2/+2
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-03-07Sparse fixes: dubious mixing of bitwise and logical operationsblueswir11-4/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6741 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-19Implement default-NaN mode.pbrook1-0/+18
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6106 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-04Fix ARM default NaN.pbrook1-2/+2
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5618 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-26Fix undeclared symbol warnings from sparseblueswir11-6/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-25Assortment of soft-float fixes, by Aurelien Jarno.ths1-11/+35
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3860 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-18Add strict checking mode for softfp code.pbrook1-35/+60
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3688 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-16Fix NaN handling for MIPS and HPPA.ths1-40/+68
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3655 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11Fix softfloat NaN handling.ths1-10/+38
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2805 c046a42c-6fe2-441c-8c8c-71466251a162
2006-10-28avoid using char when it is not necessarybellard1-8/+8
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2204 c046a42c-6fe2-441c-8c8c-71466251a162
2005-03-13soft float supportbellard1-0/+464
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1332 c046a42c-6fe2-441c-8c8c-71466251a162
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