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2012-01-04Direct dispatch through MemoryRegionAvi Kivity1-3/+1
Now that all mmio goes through MemoryRegions, we can convert io_mem_opaque to be a MemoryRegion pointer, and remove the thunks that convert from old-style CPU{Read,Write}MemoryFunc to MemoryRegionOps. Signed-off-by: Avi Kivity <avi@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2012-01-04Uninline get_page_addr_code()Avi Kivity1-25/+1
Its use of IO_MEM_ROM and friends will later cause #include loops; and it is too large to merit inlining. Signed-off-by: Avi Kivity <avi@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2012-01-04Avoid range comparisons on io index typesAvi Kivity1-1/+1
The code sometimes uses range comparisons on io indexes (e.g. index =< IO_MEM_ROM). Avoid these as they make moving to objects harder. Signed-off-by: Avi Kivity <avi@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2012-01-04memory: move mmio access to functionsAvi Kivity1-2/+5
Currently mmio access goes directly to the io_mem_{read,write} arrays. In preparation for eliminating them, add indirection via a function. Signed-off-by: Avi Kivity <avi@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2011-10-31tcg: Add bytecode generator for tcg interpreterStefan Weil1-2/+20
Unlike other tcg target code generators, this one does not generate machine code for some cpu. It generates machine independent bytecode which is interpreted later. This allows running QEMU on any host. Interpreted bytecode is slower than direct execution of generated machine code. Signed-off-by: Stefan Weil <sw@weilnetz.de>
2011-10-30exec-all: Fix void pointer arithmeticStefan Weil1-2/+1
Adding an offset to a void pointer works with gcc but is not allowed by the current C standards. With -pedantic, gcc complains: exec-all.h:344: error: pointer of type ‘void *’ used in arithmetic Fix this, and also replace (unsigned long) by (uintptr_t) in the same statement. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-21qemu-timer: move icount to cpus.cPaolo Bonzini1-0/+14
None of this is needed by tools, and most of it can even be made static inside cpus.c. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2011-10-01Move GETPC from dyngen-exec.h to exec-all.hBlue Swirl1-0/+12
GETPC() can be used even from outside of helper code. Move the macro to a more accessible location. Avoid a compile warning from redefining it in exec.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-01softmmu_header: pass CPUState to tlb_fillBlue Swirl1-1/+1
Pass CPUState pointer to tlb_fill() instead of architecture local cpu_single_env hacks. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-20Fix unassigned memory access handlingBlue Swirl1-1/+1
cea5f9a28faa528b6b1b117c9ab2d8828f473fef exposed bugs in unassigned memory access handling. Fix them by always passing CPUState to the handlers. Reported-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-12exec-all.h: Make MAX_OP_PER_INSTR large enough for target-arm's usesPeter Maydell1-5/+1
The target-arm frontend's worst-case TCG ops per instr is 194 (and in general many of the "load multiple registers" ARM instructions generate more than 100 TCG ops). Raise MAX_OP_PER_INSTR accordingly to avoid possible buffer overruns. Since it doesn't make any sense for the "64 bit guest on 32 bit host" case to have a smaller limit than the normal case, we collapse the two cases back into each other again. (This increase costs us about 14K in extra static buffer space and 21K of extra margin at the end of a 32MB codegen buffer.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26Move cpu_has_work and cpu_pc_from_tb to cpu.hBlue Swirl1-0/+1
Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This is needed by later patches. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26cpu_loop_exit: avoid using AREG0Blue Swirl1-1/+1
Make cpu_loop_exit() take a parameter for CPUState instead of relying on global env. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-31target-alpha: Trap for unassigned and unaligned addresses.Richard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-23Merge branch 's390-next' of git://repo.or.cz/qemu/agrafAurelien Jarno1-0/+4
* 's390-next' of git://repo.or.cz/qemu/agraf: s390x: complain when allocating ram fails s390x: fix memory detection for guests > 64GB s390x: change mapping base to allow guests > 2GB s390x: Fix debugging for unknown sigp order codes s390x: build s390x by default s390x: remove compatibility cc field s390x: Adjust GDB stub s390x: translate engine for s390x CPU s390x: Adjust internal kvm code s390x: Implement opcode helpers s390x: helper functions for system emulation s390x: Shift variables in CPUState for memset(0) s390x: keep hint on virtio managing size s390x: make kvm exported functions conditional on kvm s390x: s390x-linux-user support tcg: extend max tcg opcodes when using 64-on-32bit s390x: fix smp support for kvm
2011-05-22Delete unused tb_invalidate_page_rangeBlue Swirl1-1/+0
tb_invalidate_page_range() was intended to be used to invalidate an area of a TB which the guest explicitly flushes from i-cache. However, QEMU detects writes to code areas where TBs have been generated, so his has never been useful. Delete the function, adjust callers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-20tcg: extend max tcg opcodes when using 64-on-32bitAlexander Graf1-0/+4
When running a 64 bit guest on a 32 bit host, we tend to use more TCG ops than on a 64 bit host. Reflect that in the reserved opcode amount constant. Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-20Remove unused function parameter from cpu_restore_stateStefan Weil1-2/+1
The previous patch removed the need for parameter puc. Is is now unused, so remove it. Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-20Remove unused function parameters from gen_pc_load and rename the functionStefan Weil1-2/+2
Function gen_pc_load was introduced in commit d2856f1ad4c259e5766847c49acbb4e390731bd4. The only reason for parameter searched_pc was a debug statement in target-i386/translate.c. Parameter puc was needed by target-sparc until commit d7da2a10402f1644128b66414ca8f86bdea9ae7c. Remove searched_pc from the debug statement and remove both parameters from the parameter list of gen_pc_load. As the function name gen_pc_load was also misleading, it is now called restore_state_to_opc. This new name was suggested by Peter Maydell, thanks. v2: Remove last parameter, too, and rename the function. v3: Fix [] typo in target-arm/translate.c. Fix wrong SHA1 object name in commit message (copy+paste error). Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-02-10Make tb_alloc staticTristan Gingold1-1/+0
This function is only used within exec.c, so no need to make it public. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-23Delete useless 'extern' qualifiers for functionsBlue Swirl1-1/+1
'extern' qualifier is useless for function declarations. Delete them. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-31TCG: Improve tb_phys_hash_func()Aurelien Jarno1-1/+1
Most of emulated CPU have instructions aligned on 16 or 32 bits, while on others GCC tries to align the target jump location. This means that 1/2 or 3/4 of tb_phys_hash entries are never used. Update the hash function tb_phys_hash_func() to ignore the two lowest bits of the address. This brings a 6% speed-up when booting a MIPS image. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-21tcg-arm: fix __clear_cache() warningAurelien Jarno1-4/+2
Use __builtin___clear_cache() instead of __clear_cache() to avoid having to define the function as extern. Fix the following warning: | In file included from qemu/cpus.c:34: | qemu/exec-all.h: In function 'tb_set_jmp_target1': | qemu/exec-all.h:208: error: nested extern declaration of '__clear_cache' | make[1]: *** [cpus.o] Error 1 | make: *** [subdir-i386-softmmu] Error 2 Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-10-20Export qemu_ram_addr_from_hostMarcelo Tosatti1-1/+1
To be used by next patches. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2010-07-24remove dead codeJun Koi1-3/+0
this patch removes unused function cpu_restore_state_copy(). Signed-off-by: Jun Koi <junkoi2004@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-07-22Declare code_gen_ptr, code_gen_max_blocks 'static'Stefan Weil1-2/+0
Both values are only used in exec.c, so there is no need to make them globally available. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-09tcg: get rid of copy_size in TCGOpDefAurelien Jarno1-1/+0
copy_size is a left-over from the dyngen era, remove it. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-11make SIG_IPI to tcg vcpu thread reliableMarcelo Tosatti1-0/+3
Store tcg loop exit request on a global variable, and transfer it to per-CPUState exit_request after assignment of cpu_single_env. This makes exit request signal from robust. Drop the timedlock hack. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2010-05-01Clean up definition of MAX_OPC_PARAMStuart Brady1-2/+14
MAX_OPC_PARAM is intended to refer to the maximum number of entries used in gen_opparam_buf[] for any single helper call. It is currently defined as 10, but for 32-bit archs, the correct value (with a maximum for four helper arguments) is 14, and for 64-bit archs, only 9 entries are needed. tcg_gen_callN() fills four entries with the function address, flags, number of args, etc. and on 32-bit archs uses a further two entries per argument (with a maximum of four helper arguments), plus two more for the return value. On 64-bit archs, only half as many entries are used for the args and the return value. In reality, TBs tend not to consist purely of helper calls exceeding the stated 10 gen_opparam_buf[] entries, so this would never actually be a problem on 32-bit archs, but the definition is still rather confusing. Signed-off-by: Stuart Brady <sdb@zubnet.me.uk> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-08remove TARGET_* defines from translate-all.cPaolo Bonzini1-4/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08Shrink tb_jmp_offset to two entries, the other two are never used.Filip Navara1-4/+1
Signed-Off-By: Riku Voipio <riku.voipio@nokia.com> Signed-off-by: Filip Navara <filip.navara@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-29Compile qemu-timer only onceBlue Swirl1-14/+0
Arrange various declarations so that also non-CPU code can access them, adjust users. Move CPU specific code to cpus.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-17Large page TLB flushPaul Brook1-11/+3
QEMU uses a fixed page size for the CPU TLB. If the guest uses large pages then we effectively split these into multiple smaller pages, and populate the corresponding TLB entries on demand. When the guest invalidates the TLB by virtual address we must invalidate all entries covered by the large page. However the address used to invalidate the entry may not be present in the QEMU TLB, so we do not know which regions to clear. Implementing a full vaiable size TLB is hard and slow, so just keep a simple address/mask pair to record which addresses may have been mapped by large pages. If the guest invalidates this region then flush the whole TLB. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Fix usermode virtual address typePaul Brook1-1/+1
Usermode virtual addresses are abi_ulong, not target_ulong. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Disable phsyical memory handling in userspace emulation.Paul Brook1-4/+4
Code to handle physical memory access is not meaningful in usrmode emulation, so disable it. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Add tb_page_addr_tPaul Brook1-8/+17
The page tracking code in exec.c is used by both userspace and system emulation. Userspace emulation uses it to track virtual pages, and system emulation to track ram pages. Introduce a new type to hold this kind of address. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-01Avoid tlb_set_page in userspace emulationPaul Brook1-0/+2
tlb_set_page isn't meaningful for userspace emulation, so remove it. Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-12-01tcg: increase TCG_MAX_OP_SIZE to 192Aurelien Jarno1-3/+3
This is needed on a MIPS host and a 64-bit cross-endian target. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori1-4/+4
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Get rid of _t suffixmalc1-4/+4
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
2009-09-25ARM host: fix generated blocks linkingLaurent Desnogues1-1/+3
This patch fixes the linking of generated blocks on an ARM host. No need to say this brings a very nice speedup :-) Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-23exec-all.h: increase OPC_BUF_SIZEAurelien Jarno1-1/+1
Increase OPC_BUF_SIZE to compensate the MAX_OP_PER_INSTR's increase. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-23exec-all.h: increase MAX_OP_PER_INSTR to 96 from 64Aurelien Jarno1-1/+1
The x86_64 ror instruction on a 32-bit host can generate up to 77 TCG ops. Some more space should be left for opc that are added at the end of the translation. Thanks to Laurent Desnogues for the debugging help. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-08-24Unbreak large mem support by removing kqemuAnthony Liguori1-35/+0
kqemu introduces a number of restrictions on the i386 target. The worst is that it prevents large memory from working in the default build. Furthermore, kqemu is fundamentally flawed in a number of ways. It relies on the TSC as a time source which will not be reliable on a multiple processor system in userspace. Since most modern processors are multicore, this severely limits the utility of kqemu. kvm is a viable alternative for people looking to accelerate qemu and has the benefit of being supported by the upstream Linux kernel. If someone can implement work arounds to remove the restrictions introduced by kqemu, I'm happy to avoid and/or revert this patch. N.B. kqemu will still function in the 0.11 series but this patch removes it from the 0.12 series. Paul, please Ack or Nack this patch. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-27Enable USE_DIRECT_JUMP on Win32.Filip Navara1-4/+1
Signed-off-by: Filip Navara <filip.navara@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl1-2/+1
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-04-19kqemu: merge CONFIG_KQEMU and USE_KQEMUblueswir11-1/+1
Basically a recursive ":%s/USE_KQEMU/CONFIG_KQEMU/g". Signed-off-by: Paul Bolle <pebolle@tiscali.nl> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7189 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-11Implement dynamic guest ram allocation.pbrook1-0/+3
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7088 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-11Remove code phys_ram_base uses.pbrook1-1/+4
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7085 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-05Add new command line option -singlestep for tcg single stepping.aurel321-0/+4
This replaces a compile time option for some targets and adds this feature to targets which did not have a compile time option. Add monitor command to enable or disable single step mode. Modify monitor command "info status" to display single step mode. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7004 c046a42c-6fe2-441c-8c8c-71466251a162
generated by cgit v1.1 at 2024-12-26 13:56:54 +0000