aboutsummaryrefslogtreecommitdiff
path: root/docs
AgeCommit message (Collapse)AuthorFilesLines
2025-02-25hw/arm/fsl-imx8mp: Implement general purpose timersBernhard Beschow1-0/+1
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-id: 20250223114708.1780-14-shentey@gmail.com [PMM: drop static const from gpt_attrs for GCC 7.5] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-02-25hw/arm/fsl-imx8mp: Add watchdog supportBernhard Beschow1-0/+1
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-id: 20250223114708.1780-13-shentey@gmail.com [PMM: drop static const from wdog_table for GCC 7.5] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-02-25hw/arm/fsl-imx8mp: Add SPI controllersBernhard Beschow1-0/+1
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-id: 20250223114708.1780-12-shentey@gmail.com [PMM: drop static const from spi_table for GCC 7.5] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-02-25hw/arm/fsl-imx8mp: Add I2C controllersBernhard Beschow1-0/+1
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-id: 20250223114708.1780-11-shentey@gmail.com [PMM: drop static const from i2c_table for GCC 7.5] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-02-25hw/arm/fsl-imx8mp: Add GPIO controllersBernhard Beschow1-0/+1
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-id: 20250223114708.1780-10-shentey@gmail.com [PMM: drop static const from gpio_table for GCC 7.5] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-02-25hw/arm/fsl-imx8mp: Add PCIe supportBernhard Beschow1-0/+1
Linux checks for the PLLs in the PHY to be locked, so implement a model emulating that. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-id: 20250223114708.1780-9-shentey@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-02-25hw/arm/fsl-imx8mp: Add USDHC storage controllersBernhard Beschow1-6/+12
The USDHC emulation allows for running real-world images such as those generated by Buildroot. Convert the board documentation accordingly instead of running a Linux kernel with ephemeral storage. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-id: 20250223114708.1780-8-shentey@gmail.com [PMM: drop 'static const' from usdhc_table[] for GCC 7.5] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-02-25hw/arm/fsl-imx8mp: Add SNVSBernhard Beschow1-0/+1
SNVS contains an RTC which allows Linux to deal correctly with time. This is particularly useful when handling persistent storage which will be done in the next patch. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-id: 20250223114708.1780-7-shentey@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-02-25hw/arm/fsl-imx8mp: Implement clock treeBernhard Beschow1-0/+1
Fixes quite a few stack traces during the Linux boot process. Also provides the clocks for devices added later, e.g. enet1. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-id: 20250223114708.1780-6-shentey@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-02-25hw/arm: Add i.MX 8M Plus EVK boardBernhard Beschow2-0/+55
As a first step, implement the bare minimum: CPUs, RAM, interrupt controller, serial. All other devices of the A53 memory map are represented as TYPE_UNIMPLEMENTED_DEVICE, i.e. the whole memory map is provided. This allows for running Linux without it crashing due to invalid memory accesses. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-id: 20250223114708.1780-5-shentey@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: drop 'static const' from serial_table[] definition to avoid compile failure on GCC 7.5] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-02-25docs: rust: update description of cratesPaolo Bonzini1-4/+10
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-02-25docs: rust: fix typosPaolo Bonzini1-2/+2
Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-02-25rust: add module to convert between success/-errno and io::ResultPaolo Bonzini1-0/+1
It is a common convention in QEMU to return a positive value in case of success, and a negated errno value in case of error. Unfortunately, using errno portably in Rust is a bit complicated; on Unix the errno values are supported natively by io::Error, but on Windows they are not; so, use the libc crate. This is a set of utility functions that are used by both chardev and block layer bindings. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-02-25hw/nvme: Add OCP SMART / Health Information Extended Log PageStephen Bates1-0/+7
The Open Compute Project [1] includes a Datacenter NVMe SSD Specification [2]. The most recent version of this specification (as of November 2024) is 2.6.1. This specification layers on top of the NVM Express specifications [3] to provide additional functionality. A key part of of this is the 512 Byte OCP SMART / Health Information Extended log page that is defined in Section 4.8.6 of the specification. We add a controller argument (ocp) that toggles on/off the SMART log extended structure. To accommodate different vendor specific specifications like OCP, we add a multiplexing function (nvme_vendor_specific_log) which will route to the different log functions based on arguments and log ids. We only return the OCP extended SMART log when the command is 0xC0 and ocp has been turned on in the nvme argumants. Though we add the whole nvme SMART log extended structure, we only populate the physical_media_units_{read,written}, log_page_version and log_page_uuid. This patch is based on work done by Joel but has been modified enough that he requested a co-developed-by tag rather than a signed-off-by. [1]: https://www.opencompute.org/ [2]: https://www.opencompute.org/documents/datacenter-nvme-ssd-specification-v2-6-1-pdf [3]: https://nvmexpress.org/specifications/ Signed-off-by: Stephen Bates <sbates@raithlin.com> Co-developed-by: Joel Granados <j.granados@samsung.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2025-02-24hw/arm/virt: Support larger highmem MMIO regionsMatthew R. Ochs1-0/+4
The MMIO region size required to support virtualized environments with large PCI BAR regions can exceed the hardcoded limit configured in QEMU. For example, a VM with multiple NVIDIA Grace-Hopper GPUs passed through requires more MMIO memory than the amount provided by VIRT_HIGH_PCIE_MMIO (currently 512GB). Instead of updating VIRT_HIGH_PCIE_MMIO, introduce a new parameter, highmem-mmio-size, that specifies the MMIO size required to support the VM configuration. Example usage with 1TB MMIO region size: -machine virt,gic-version=3,highmem-mmio-size=1T Signed-off-by: Matthew R. Ochs <mochs@nvidia.com> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com> Message-id: 20250221145419.1281890-1-mochs@nvidia.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-02-22Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu ↵Stefan Hajnoczi4-16/+15
into staging virtio,pc,pci: features, fixes, cleanups Features: SR-IOV emulation for pci virtio-mem-pci support for s390 interleave support for cxl big endian support for vdpa svq new QAPI events for vhost-user Also vIOMMU reset order fixups are in. Fixes, cleanups all over the place. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAme4b8sPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpHKcIAKPJsVqPdda2dJ7b7FdyRT0Q+uwezXqaGHd4 # 7Lzih1wsxYNkwIAyPtEb76/21qiS7BluqlUCfCB66R9xWjP5/KfvAFj4/r4AEduE # fxAgYzotNpv55zcRbcflMyvQ42WGiZZHC+o5Lp7vDXUP3pIyHrl0Ydh5WmcD+hwS # BjXvda58TirQpPJ7rUL+sSfLih17zQkkDcfv5/AgorDy1wK09RBKwMx/gq7wG8yJ # twy8eBY2CmfmFD7eTM+EKqBD2T0kwLEeLfS/F/tl5Fyg6lAiYgYtCbGLpAmWErsg # XZvfZmwqL7CNzWexGvPFnnLyqwC33WUP0k0kT88Y5wh3/h98blw= # =tej8 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 21 Feb 2025 20:21:31 HKT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (41 commits) docs/devel/reset: Document reset expectations for DMA and IOMMU hw/vfio/common: Add a trace point in vfio_reset_handler hw/arm/smmuv3: Move reset to exit phase hw/i386/intel-iommu: Migrate to 3-phase reset hw/virtio/virtio-iommu: Migrate to 3-phase reset vhost-user-snd: correct the calculation of config_size net: vhost-user: add QAPI events to report connection state hw/virtio/virtio-nsm: Respond with correct length vdpa: Fix endian bugs in shadow virtqueue MAINTAINERS: add more files to `vhost` cryptodev/vhost: allocate CryptoDevBackendVhost using g_mem0() vhost-iova-tree: Update documentation vhost-iova-tree, svq: Implement GPA->IOVA & partial IOVA->HVA trees vhost-iova-tree: Implement an IOVA-only tree amd_iommu: Use correct bitmask to set capability BAR amd_iommu: Use correct DTE field for interrupt passthrough hw/virtio: reset virtio balloon stats on machine reset mem/cxl_type3: support 3, 6, 12 and 16 interleave ways hw/mem/cxl_type3: Ensure errp is set on realization failure hw/mem/cxl_type3: Fix special_ops memory leak on msix_init_exclusive_bar() failure ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-02-21docs/devel/reset: Document reset expectations for DMA and IOMMUEric Auger1-0/+5
To avoid any translation faults, the IOMMUs are expected to be reset after the devices they protect. Document that we expect DMA requests to be stopped during the 'enter' or 'hold' phase while IOMMUs should be reset during the 'exit' phase. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Message-Id: <20250218182737.76722-6-eric.auger@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-02-20pcie_sriov: Ensure VF addr does not overflowAkihiko Odaki1-3/+5
pci_new() aborts when creating a VF with addr >= PCI_DEVFN_MAX. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20250116-reuse-v20-7-7cb370606368@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-02-20docs/about: Change notes on x86 machine type deprecation into a general oneThomas Huth2-13/+5
We now have a general note about versioned machine types getting deprecated and removed at the beginning of the deprecated.rst file, so we should also have a general note about this in removed-features.rst (which will also apply to versioned non-x86 machine types) instead of listing individual old machine types in the document. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20250116064644.65670-1-thuth@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-02-20docs/system/arm: Add Description for NPCM8XX SoCHao Wu1-7/+20
NPCM8XX SoC is the successor of the NPCM7XX. It features quad-core Cortex-A35 (Armv8, 64-bit) CPUs and some additional peripherals. This document describes the NPCM8XX SoC and an evaluation board (NPCM 845 EVB). Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20250219184609.1839281-18-wuhaotsh@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-02-18tcg: Introduce the 'z' constraint for a hardware zero registerRichard Henderson1-1/+3
For loongarch, mips, riscv and sparc, a zero register is available all the time. For aarch64, register index 31 depends on context: sometimes it is the stack pointer, and sometimes it is the zero register. Introduce a new general-purpose constraint which maps 0 to TCG_REG_ZERO, if defined. This differs from existing constant constraints in that const_arg[*] is recorded as false, indicating that the value is in a register. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-02-18tcg: Remove TCG_OVERSIZED_GUESTRichard Henderson1-1/+0
This is now prohibited in configuration. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-02-13rust: add bindings for timerZhao Liu1-0/+1
Add timer bindings to help handle idiomatic Rust callbacks. Additionally, wrap QEMUClockType in ClockType binding to avoid unsafe calls in device code. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/20250210030051.2562726-7-zhao1.liu@intel.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-02-13rust: bindings for MemoryRegionOpsPaolo Bonzini1-0/+1
Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-02-13rust: docs: document naming conventionPaolo Bonzini1-0/+44
As agreed in the "vtables and procedural macros" thread on the mailing list. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-02-12Merge tag 'pull-nbd-2025-02-11' of https://repo.or.cz/qemu/ericb into stagingStefan Hajnoczi1-0/+5
NBD patches for 2025-02-11 - Add --handshake-limit option to qemu-nbd # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEEccLMIrHEYCkn0vOqp6FrSiUnQ2oFAmersd8ACgkQp6FrSiUn # Q2pDUAf/c7inV7W+9vQv15lZoadIJkXAhqu+j1YuITC52gMgmU1QcwXMXRPEak4V # qEIodiInzOtktMRXr6tbMroQgqo9eNd+VivxVa+J5LBILuZwdpZnLxsVNjblhbfI # R3swWs2qluh9/1czntRu0J+YVOj3YZnF86Z5+iwEdLQ+i15dtjXDirBRvGCd6miV # HLiEXwHdyPYb4g50a5oZCf3HhqPOgXOd+NWr4ifGut3bDulQk+FMDeBwV6/fmRPw # g7dFPHMrAEYMw8tScYTMCoZGSZl0lg1JNuSh/WwgXx7BgXtDDxyP4HaAXlIyOHIA # FbPU6aNrGZ9EDN4NA688IwUDh+lkmQ== # =WyjJ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 11 Feb 2025 15:23:59 EST # gpg: using RSA key 71C2CC22B1C4602927D2F3AAA7A16B4A2527436A # gpg: Good signature from "Eric Blake <eblake@redhat.com>" [full] # gpg: aka "Eric Blake (Free Software Programmer) <ebb9@byu.net>" [full] # gpg: aka "[jpeg image of size 6874]" [full] # Primary key fingerprint: 71C2 CC22 B1C4 6029 27D2 F3AA A7A1 6B4A 2527 436A * tag 'pull-nbd-2025-02-11' of https://repo.or.cz/qemu/ericb: nbd/server: Allow users to adjust handshake limit in QMP qemu-nbd: Allow users to adjust handshake limit Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-02-11qemu-nbd: Allow users to adjust handshake limitEric Blake1-0/+5
Although defaulting the handshake limit to 10 seconds was a nice QoI change to weed out intentionally slow clients, it can interfere with integration testing done with manual NBD_OPT commands over 'nbdsh --opt-mode'. Expose a command line option to allow the user to alter the timeout away from the default. This option is unlikely to be used in enough scenarios to warrant a short option letter. The option --handshake-limit intentionally differs from the name of the constant added in commit fb1c2aaa98 (limit instead of max_secs) and the QMP name to be added in the next commit; this is because typing a longer command-line name is undesirable and there is sufficient --help text to document the units. Signed-off-by: Eric Blake <eblake@redhat.com> Message-ID: <20250203222722.650694-5-eblake@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
2025-02-11target/arm: Enable FEAT_RPRES for -cpu maxPeter Maydell1-0/+1
Now the emulation is complete, we can enable FEAT_RPRES for the 'max' CPU type. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2025-02-11target/arm: Enable FEAT_AFP for '-cpu max'Peter Maydell1-0/+1
Now that we have completed the handling for FPCR.{AH,FIZ,NEP}, we can enable FEAT_AFP for '-cpu max', and document that we support it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2025-02-10Merge tag 'pull-10.0-testing-and-gdstub-updates-100225-1' of ↵Stefan Hajnoczi1-3/+13
https://gitlab.com/stsquad/qemu into staging testing and gdbstub updates: - add a check-rust test to docker builds - re-factor the qtest logic to be cleaner - fix tests to not clock_step when no timers enabled - roll-up log prefix into qtest_send - cleaner error reporting when qtest_clock_set fails - revert old deadlock fix now tests are updated - only run full set of migration tests under HW acceleration - support late attachment to user-mode gdbstubs # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmeqBSsACgkQ+9DbCVqe # KkQS/Af+K0hpdGc1msiuMsqmuESBvhoQniYZFLN1/pwe2KpG8i/+fq2fsCuxJhJ1 # 2TzPH7aj54p9MGCZf2k9JLhO22XldN+oezZMc1crhoWK0AtrWhnLs58I2oEPIsUo # NmGO6Zfm98ge89o2y8GCvd0QXAtUf+jduDKnW0mfnOnw+w/mky5KzWS7/1091VGW # 42LSY4KnqgdLSqLyuLBOrgADEjB1ChWS4/bSC+kEYSGrmNQB+n1KeIzzlJBGpOr0 # Z9yzmhMCm7TWdkFNPmnVfYH/7ZUNcpv6PtQSpkku4f6b/gybyvJBknHpM4i+Gpb5 # 87wSjljrCpdNm/9KFRjiJuUWdS/jCg== # =UF0n # -----END PGP SIGNATURE----- # gpg: Signature made Mon 10 Feb 2025 08:54:51 EST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * tag 'pull-10.0-testing-and-gdstub-updates-100225-1' of https://gitlab.com/stsquad/qemu: tests/tcg: Add late gdbstub attach test docs/user: Document the %d placeholder and suspend=n QEMU_GDB features gdbstub: Allow late attachment osdep: Introduce qemu_kill_thread() user: Introduce host_interrupt_signal user: Introduce user/signal.h gdbstub: Try unlinking the unix socket before binding gdbstub: Allow the %d placeholder in the socket path tests/qtest/migration: Pick smoke tests tests/qtest/migration: Add --full option Revert "util/timer: avoid deadlock when shutting down" tests/qtest: tighten up the checks on clock_step tests/qtest: rename qtest_send_prefix and roll-up into qtest_send tests/qtest: simplify qtest_process_inbuf tests/qtest: don't step clock at start of npcm7xx periodic IRQ test tests/qtest: don't attempt to clock_step while waiting for virtio ISR tests/docker: replicate the check-rust-tools-nightly CI job Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-02-10Merge tag 'pull-target-arm-20250210' of ↵Stefan Hajnoczi1-0/+34
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * Deprecate pxa2xx CPUs, iwMMXt emulation, -old-param option * Drop unused AArch64DecodeTable typedefs * Minor code cleanups * hw/net/cadence_gem: Fix the mask/compare/disable-mask logic * linux-user: Do not define struct sched_attr if libc headers do # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmeqH/sZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3lW6D/4r4SyxAzrjIQRLh3xydADN # A9EsQ44Or/M7jJ7uzR5nkLldlHdKTccVZFj17BlK6DnklsTUVSUoxpHtzYTHE2Ar # Q8iqV4dqoyDrYpqHWNQQvwQCBLbcj0CFQ1VjieG656m4uhImoeVMiH3xbFvMwqj0 # KpIWL/+jaRs5jgpnN7Ig4Zq3gVHVZWyOOjzIKF/l4hFchK4eao0oAWdWo/TtGPHB # WyqkO1YZoZGBlT/7WXyKE5YXoXbd8m079NXcHmH6sy1/fSNXQ7qIlHGV/36kiJo1 # WnDgZ0KUOEl4thaeq731xtgGcwt9C9Qx8g9bJP42os7EzQZBtvXxJXWgQKpvpNVH # Hmpsj0ed7oI1LH5DEPkqvYOEnnvEFt3skMbblhIZufnrAnojk9Q64v/Z1LNEIuuC # j5sZrFZsKPsA2uNzsmqXyJxWwnU6IT5YNBZAzALFTwE8dNL/VMXfRYhhUEy0Ay3C # jVXHk+sfOKo83YNswffagBeb/tRFDApgvRySxxL9TCONGl0HNkXqSuE+hssF8jyr # AnZ3zxSrmWKZizuotvFwaP0bxP0Sa/yeR1lR6E1xu+iEEJKJ4dE5xpX4E3uf6tHk # cfQQXFrhOzEwGn4qLDuqcgvhxRecZL7kNiFYidynKafIBw///J1cpaDYxxwh9v6O # TZuJliw0uCo6z0sXxVIn1w== # =MS2g # -----END PGP SIGNATURE----- # gpg: Signature made Mon 10 Feb 2025 10:49:15 EST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20250210' of https://git.linaro.org/people/pmaydell/qemu-arm: linux-user: Do not define struct sched_attr if libc headers do qemu-options: Deprecate -old-param command line option hw/net/cadence_gem: Fix the mask/compare/disable-mask logic hw/cpu/arm: Declare CPU QOM types using DEFINE_TYPES() macro hw/cpu/arm: Alias 'num-cpu' property on TYPE_REALVIEW_MPCORE hw/arm/fsl-imx7: Add local 'mpcore/gic' variables hw/arm/fsl-imx6ul: Add local 'mpcore/gic' variables hw/arm/fsl-imx6: Add local 'mpcore/gic' variables hw/arm/boot: Propagate vCPU to arm_load_dtb() target/arm: Drop unused AArch64DecodeTable typedefs tests/tcg/arm: Remove test-arm-iwmmxt test target/arm: deprecate the pxa2xx CPUs and iwMMXt emulation Conflicts: - The iwMMXt deprecation notice conflicted with the 32-bit host operating system deprecation notice. Add both notices. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-02-10Merge tag 'pull-qapi-2025-02-10-v2' of https://repo.or.cz/qemu/armbru into ↵Stefan Hajnoczi1-2/+2
staging QAPI patches patches for 2025-02-10 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmeqEXESHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZTaOEP/2VYKkb2VzPdWzyQcEx66MJ+1RjcEy1A # JtD6mTdpEuti5NgrUUOSHjrd6P3DVNZL8SMPD21F4/I1t0u+ztfCtx65YKrKo8hV # jCnYS5w2i/YT3Cpz052yEhUoPgxj4kQiR3gqbLkpBKV7lh6wZ3+gVTNW8DJzPW/R # MmE9vkOCLhjmkodxRiVa7df73qMEm4nfbmQjM9SWBU55AC2xElptjJo0Sc7sMT3n # HdoLjXKfjUCIpmI3LfbRvS3Tyxd9gQn/la2yf3gaXJ0qrbP4xyu5VCzAOla5myuC # XyakLUu9DOsfNuHXvKX+M8jE7pf6wibLMfVhPigACob2LAa4Zo7LvCKqjhclTNhK # +/PvTGrirnGweNWXz5/2tG97F7oSzX2m182LyuloQbaehXAtpAuHehSCQUet6HOu # CEUOeV7D13nxcgxXT1GvQIqsTYRtIJvY8DM3tRoCAzDv/KNdXF4M/ybtUHmyHUkg # kspwCRfQJ1sNRdmj7oBtmWvvbYBk/zKvt84yOQZFYocmofp18KVLDN+hzEAHvHQE # 4t8yCktjrGGC0bCgIaQkBaeU7nxMWXBOOlYcejnXTR4VPTDTRKMAosmAotcd9d5H # QgGjcMhbDPJHavi36JdJQgxuwl4LskwLCdenBfXhmH8ePIWhjIqqzcdDJy0UcH0x # pX8L/Jsd42qD # =jFK8 # -----END PGP SIGNATURE----- # gpg: Signature made Mon 10 Feb 2025 09:47:13 EST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-qapi-2025-02-10-v2' of https://repo.or.cz/qemu/armbru: qapi: expose all schema features to code qapi: rename 'special_features' to 'features' qapi: change 'unsigned special_features' to 'uint64_t features' qapi: cope with feature names containing a '-' qapi/ui: Fix documentation of upper bound value in InputMoveEvent qapi: fix colon in Since tag section qapi: Move and rename qapi/qmp/dispatch.h to qapi/qmp-registry.h qapi: Move include/qapi/qmp/ to include/qobject/ Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-02-10Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingStefan Hajnoczi2-0/+431
* tcg/optimize: optimize TSTNE using smask and zmask * target/i386: fix exceptions for 0 * Inf + QNaN * rust: cleanups to the configuration and the warnings * rust: add developer docs # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmep0nsUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroN0aggAo8mKY4c7LGLF+5xGM1W/ZLxaBrMN # 4/LGMV3UJJq+OIEb+e7ThtfyHzcAsYXdO2SIMJ6ffW58ukmwM1SycA8WUjG3JMya # m05dVnI//D/G7iqYgyNlsiTbqazdr3P/Ha0ty10l9K9dL3SjB3Nm3xLD4XnD3tzM # U+0yXrn1ngMZ3Y1knTuWwjoH7JT5QftwGCVZ5aeq0KlSAvWb8M8jupYFunLBcZ0z # LkFSWXbxhw9HRkI+Lp6c2IjIBDEd7267tEfnXf+d29ykVnrdyIWgyYw08/Un72i+ # C5hNEUMiwcD7preTYX5YqDcxSASG1zWNFzEWGhTphMWf1O60f2PIXMWX5g== # =0KKa # -----END PGP SIGNATURE----- # gpg: Signature made Mon 10 Feb 2025 05:18:35 EST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: rust: restrict missing_const_for_fn to qemu_api crate rust: pl011: use default set of lints tcg/optimize: optimize TSTNE using smask and zmask tests/tcg/x86_64/fma: Test some x86 fused-multiply-add cases target/i386: Do not raise Invalid for 0 * Inf + QNaN rust: add clippy configuration file rust: add docs rust: include rust_version in Cargo.toml rust: remove unnecessary Cargo.toml metadata Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-02-10qapi: Move and rename qapi/qmp/dispatch.h to qapi/qmp-registry.hDaniel P. Berrangé1-1/+1
The general expectation is that header files should follow the same file/path naming scheme as the corresponding source file. There are various historical exceptions to this practice in QEMU, with one of the most notable being the include/qapi/qmp/ directory. include/qapi/qmp/dispatch.h corresponds mostly to qapi/qmp-registry.c. Move and rename it to include/qapi/qmp-registry.h. Now just qerror.h is left in include/qapi/qmp/. Since it's deprecated & (slowly) getting eliminated anyway, it isn't worth moving. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20241118151235.2665921-3-armbru@redhat.com>
2025-02-10qapi: Move include/qapi/qmp/ to include/qobject/Daniel P. Berrangé1-1/+1
The general expectation is that header files should follow the same file/path naming scheme as the corresponding source file. There are various historical exceptions to this practice in QEMU, with one of the most notable being the include/qapi/qmp/ directory. Most of the headers there correspond to source files in qobject/. This patch corrects most of that inconsistency by creating include/qobject/ and moving the headers for qobject/ there. This also fixes MAINTAINERS for include/qapi/qmp/dispatch.h: scripts/get_maintainer.pl now reports "QAPI" instead of "No maintainers found". Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Acked-by: Halil Pasic <pasic@linux.ibm.com> #s390x Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20241118151235.2665921-2-armbru@redhat.com> [Rebased]
2025-02-10docs/user: Document the %d placeholder and suspend=n QEMU_GDB featuresIlya Leoshkevich1-3/+13
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20250117001542.8290-8-iii@linux.ibm.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250207153112.3939799-17-alex.bennee@linaro.org>
2025-02-08meson: Deprecate 32-bit host supportRichard Henderson1-0/+7
We deprecated i686 system mode support for qemu 8.0. However, to make real cleanups to TCG we need to deprecate all 32-bit hosts. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-02-07qemu-options: Deprecate -old-param command line optionPeter Maydell1-0/+13
The '-old-param' command line option is specific to Arm targets; it is very briefly documented as "old param mode". What this option actually does is change the behaviour when directly booting a guest kernel, so that command line arguments are passed to the kernel using the extremely old "param_struct" ABI, rather than the newer ATAGS or even newer DTB mechanisms. This support was added back in 2007 to support an old vendor kernel on the akita/terrier board types: https://mail.gnu.org/archive/html/qemu-devel/2007-07/msg00344.html Even then, it was an out-of-date mechanism from the kernel's point of view -- the kernel has had a comment since 2001 marking it as deprecated. As of mid-2024, the kernel only retained param_struct support for the RiscPC and Footbridge platforms: https://lore.kernel.org/linux-arm-kernel/2831c5a6-cfbf-4fe0-b51c-0396e5b0aeb7@app.fastmail.com/ None of the board types QEMU supports need param_struct support; mark this option as deprecated. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20250127123113.2947620-1-peter.maydell@linaro.org
2025-02-07target/arm: deprecate the pxa2xx CPUs and iwMMXt emulationPeter Maydell1-0/+21
The pxa2xx CPUs are now only useful with user-mode emulation, because we dropped all the machine types that used them in 9.2. (Technically you could alse use "-cpu pxa270" with a board model like versatilepb which doesn't sanity-check the CPU type, but that has never been a supported config.) To use them (or iwMMXt emulation) with QEMU user-mode you would need to explicitly select them with the -cpu option or the QEMU_CPU environment variable. A google search finds no examples of anybody doing this in the last decade; I don't believe the GCC folks are using QEMU to test their iwMMXt codegen either. In fact, GCC is in the process of dropping support for iwMMXT entirely. The iwMMXt emulation is thousands of lines of code in QEMU, and is now the only bit of Arm insn decode which doesn't use decodetree. We have no way to test or validate changes to it. This code is just dead weight that is almost certainly not being used by anybody. Mark it as deprecated. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250127112715.2936555-2-peter.maydell@linaro.org
2025-02-07rust: add docsPaolo Bonzini2-0/+431
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-01-30Merge tag 'pull-request-2025-01-30' of https://gitlab.com/thuth/qemu into ↵Stefan Hajnoczi1-0/+8
staging * Convert more avocado tests to the functional framework * Fix the broken aarch64_tcg_plugins test * Add test for 64-bit mac99 machine * Add a Linux-based test for the 40p machine * Fix issues with record/replay of some s390x instructions * Fix node.js crashes on emulated s390x due to a bug in the MVC instruction * Enable virtio-balloon-pci and virtio-mem-pci on s390x * Fix a libslirp v4.9.0 compilation problem # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmebewIRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbUfZQ//WHrZNVQNe0d+wOtAa5Zj4X9RpadHeGO9 # WCKtBWZ1tDADHiVkZzU6L6q/LYM5FcAOE+Kah/xr8rtf6he+LCYQ0RDHbgY6/oUE # t9TkIeph59+MMvBXWJ8flngaoVtxe8l2aYem8wk3ATPZtHyMQAZ5PAjY3+WYQAGc # gm13k1AMD4mA6mBUOs67QSitTqBQsunKpb1IvpyBjtv9NBl61L8h5hWn0bsxa8yC # 3KKZhw6Nclc8RVe33e6ZDrHrBi9klORd6Z+7fJ4w8Yj+C48ogfbQx+Zvb82jXhRe # 2qGdVb6cF7LVQ5D3pECBK7yo4Lkd7MYnNvn+EmbTXhj1y5MSPdokP6k0ZWkhhkCP # 2kIY0o5tFipdxkdDpCptU3gYJLdQFbNX2MqDFY0KeurLDGe4o6jIoRNmdZ67TJei # zleLlcEatoyRqpCKqTNMDVeWgza3ngykhiQIrG9PMPCRQET0N4qY6db35hzDujLI # NVuI1traCLawfCDYiMnU59dOxWSHy1bwSfnUxhZ92+Fl3AOb6c6PzhpkIGl/grwT # 8T8EcjFyA4hpaHHKjCeNgSrKt9N0Ka2G3l9oF8eWwJm4KAlwtYBDvfVb+juGBP9+ # 8gW0lXA8tYy/P5XgPQ0N5Z8coc1xUrYBhC7v70ud3ponMmmTdhRnosey2cOFUGsN # /U7avgXIm0Q= # =rEzl # -----END PGP SIGNATURE----- # gpg: Signature made Thu 30 Jan 2025 08:13:38 EST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2025-01-30' of https://gitlab.com/thuth/qemu: net/slirp: libslirp 4.9.0 compatibility tests/functional/test_mips_malta: Convert the mips big endian replay tests tests/functional/test_mips64el_malta: Convert the mips64el replay tests tests/functional/test_mipsel_malta: Convert the mipsel replay tests tests/functional: Add the ReplayKernelBase class tests/functional: Add a decorator for skipping long running tests tests/functional: Extend PPC 40p test with Linux boot s390x/s390-virtio-ccw: Support plugging PCI-based virtio memory devices virtio-mem-pci: Allow setting nvectors, so we can use MSI-X virtio-balloon-pci: Allow setting nvectors, so we can use MSI-X hw/s390x/s390-virtio-ccw: Fix a record/replay deadlock tests/tcg/s390x: Test modifying code using the MVC instruction target/s390x: Fix MVC not always invalidating translation blocks target/s390x: Fix PPNO execution with icount tests/functional/test_mips_malta: Fix comment about endianness of the test tests/functional: Add a ppc64 mac99 test tests/functional: Fix the aarch64_tcg_plugins test tests/functional: Convert the migration avocado test tests/functional: Fix broken decorators with lamda functions tests/functional/qemu_test/decorators: Fix bad check for imports Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-01-30Merge tag 'migration-20250129-pull-request' of ↵Stefan Hajnoczi1-2/+182
https://gitlab.com/farosas/qemu into staging Migration pull request - Purge of ram_save_target_page_legacy - Cleanups to postcopy, json writer, migration states - New migration mode cpr-transfer - Fix for a -Werror=maybe-uninitialized instance in savevm # -----BEGIN PGP SIGNATURE----- # # iQJEBAABCAAuFiEEqhtIsKIjJqWkw2TPx5jcdBvsMZ0FAmeaT8EQHGZhcm9zYXNA # c3VzZS5kZQAKCRDHmNx0G+wxndXrEACTT+rdoEvOsNs4nM2a67GjxUoQZVTAWn+8 # lYhhNZLA4E+qHwpHTDCwyfyvCe615r72+bF7QO1KTrYeXGJg4SPk5kbEhCDqqjEu # SGqrlPwkC1x3WkTvb228iDddDQ8dccko3Sy6wAyz0o8dtp5p4iK+57qzB/84u94L # y3zQ+owOo9OLnXgdfMpN99HGQSvPR7CbP/2L293IrMCuPDUo9XhI7ARNS/phbT3Z # aDl10WGHKz1SJWOkPj137E6+xMKuCmOZDTufTcTaHfyliD04JRWgEZVnKJxKJDxd # 9e+lzHvXuYfO7YO11fr7DttPRnLEfjipELVTxrudM92eZ95XwdL4+ggfBTGHt76P # yFUrp7G8qsUjWd+DHPmoo6Gx71zPbE6v9J2NMn2/1k4WdPOYy7HTmDgCkRirRTvV # irYkHtdSFFsj3c0g4P4mhOzXnvUkGXzgrjteM5hlLy3bjSeZz9VMZADjiGqFGVPb # 6euPcLLa9oynkoP5UXmFd/9PjWcgnfIbQu2MVlIyWhjvTGZKSGecVZmH5pWTJuBV # xCbab1jYprRFpUIAMo94rgvRQRosomS1+GjGndFkX5++dTTlFSqpDLSGcEnPSGRx # o9n+IldNiqh2vjN1bj60pLfmrHN/F+hsGTsDJlW+kfeyBXBkGArg1rDjN5ae7GvD # UZK0N+OG0g== # =jwOI # -----END PGP SIGNATURE----- # gpg: Signature made Wed 29 Jan 2025 10:56:49 EST # gpg: using RSA key AA1B48B0A22326A5A4C364CFC798DC741BEC319D # gpg: issuer "farosas@suse.de" # gpg: Good signature from "Fabiano Rosas <farosas@suse.de>" [unknown] # gpg: aka "Fabiano Almeida Rosas <fabiano.rosas@suse.com>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: AA1B 48B0 A223 26A5 A4C3 64CF C798 DC74 1BEC 319D * tag 'migration-20250129-pull-request' of https://gitlab.com/farosas/qemu: (42 commits) migration: refactor ram_save_target_page functions migration: Trivial cleanup on JSON writer of vmstate_save() migration: Merge precopy/postcopy on switchover start migration: Always set DEVICE state migration: Cleanup qemu_savevm_state_complete_precopy() migration: Unwrap qemu_savevm_state_complete_precopy() in postcopy migration: Notify COMPLETE once for postcopy migration: Take BQL slightly longer in postcopy_start() migration: Drop cached migration state in migration_maybe_pause() migration: Adjust locking in migration_maybe_pause() migration: Adjust postcopy bandwidth during switchover migration: Synchronize all CPU states only for non-iterable dump migration: Drop inactivate_disk param in qemu_savevm_state_complete* migration: Avoid two src-downtime-end tracepoints for postcopy migration: Optimize postcopy on downtime by avoiding JSON writer migration: Do not construct JSON description if suppressed migration: Remove postcopy implications in should_send_vmdesc() migration: cpr-transfer documentation migration-test: cpr-transfer tests/qtest: assert qmp connected ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-01-30tests/functional: Add a decorator for skipping long running testsThomas Huth1-0/+8
Some tests have a very long runtime and might run into timeout issues e.g. when QEMU has been compiled with --enable-debug. Add a decorator for marking them more easily. Rename the corresponding environment variable to be more in sync with the other QEMU_TEST_ALLOW_* switches that we already have, and add a paragraph about it in the documentation. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250128152839.184599-2-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-01-29migration: cpr-transfer documentationSteve Sistare1-2/+182
Add documentation for the cpr-transfer migration mode. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Peter Xu <peterx@redhat.com> Link: https://lore.kernel.org/r/1736967650-129648-25-git-send-email-steven.sistare@oracle.com [add -machine memory-backend=ram0] Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-01-29Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingStefan Hajnoczi1-4/+46
* target/i386: optimize string instructions * target/i386: new Sierra Forest and Clearwater Forest models * rust: type-safe vmstate implementation * rust: use interior mutability for PL011 * rust: clean ups * memtxattrs: remove usage of bitfields from MEMTXATTRS_UNSPECIFIED * gitlab-ci: enable Rust backtraces # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmeZ6VYUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroMjbQgApuooMOp0z/8Ky4/ux8M8/vrlcNCH # V1Pm6WzrjEzd9TIMLGr6npOyLOkWI31Aa4o/TuW09SeKE3dpCf/7LYA5VDEtkH79 # F57MgnSj56sMNgu+QZ/SiGvkKJXl+3091jIianrrI0dtX8hPonm6bt55woDvQt3z # p94+4zzv5G0nc+ncITCDho8sn5itdZWVOjf9n6VCOumMjF4nRSoMkJKYIvjNht6n # GtjMhYA70tzjkIi4bPyYkhFpMNlAqEDIp2TvPzp6klG5QoUErHIzdzoRTAtE4Dpb # 7240r6jarQX41TBXGOFq0NrxES1cm5zO/6159D24qZGHGm2hG4nDx+t2jw== # =ZKFy # -----END PGP SIGNATURE----- # gpg: Signature made Wed 29 Jan 2025 03:39:50 EST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (49 commits) gitlab-ci: include full Rust backtraces in test runs rust: qemu-api: add sub-subclass to the integration tests rust/zeroable: Implement Zeroable with const_zero macro rust: qdev: make reset take a shared reference rust: pl011: drop use of ControlFlow rust: pl011: pull device-specific code out of MemoryRegionOps callbacks rust: pl011: remove duplicate definitions rust: pl011: wrap registers with BqlRefCell rust: pl011: extract PL011Registers rust: pl011: pull interrupt updates out of read/write ops rust: pl011: extract CharBackend receive logic into a separate function rust: pl011: extract conversion to RegisterOffset rust: pl011: hide unnecessarily "pub" items from outside pl011::device rust: pl011: remove unnecessary "extern crate" rust: prefer NonNull::new to assertions rust: vmstate: make order of parameters consistent in vmstate_clock rust: vmstate: remove translation of C vmstate macros rust: pl011: switch vmstate to new-style macros rust: qemu_api: add vmstate_struct rust: vmstate: add public utility macros to implement VMState ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-01-27docs/system/arm/aspeed: Remove tacoma-bmc from the documentationThomas Huth1-2/+2
The tacoma-bmc machine has recently been removed, so let's remove it from the documentation now, too. Fixes: 2b1b66e01f ("arm: Remove tacoma-bmc machine") Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250124174507.27348-1-thuth@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-01-23docs: Add GNR, SRF and CWF CPU modelsTao Su1-4/+46
Update GraniteRapids, SierraForest and ClearwaterForest CPU models in section "Preferred CPU models for Intel x86 hosts". Also introduce bhi-no, gds-no and rfds-no in doc. Suggested-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Tao Su <tao1.su@linux.intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/20250121020650.1899618-5-tao1.su@linux.intel.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-01-21Merge tag 'pull-tcg-20250117' of https://gitlab.com/rth7680/qemu into stagingStefan Hajnoczi1-8/+7
tcg: - Add TCGOP_TYPE, TCGOP_FLAGS. - Pass type and flags to tcg_op_supported, tcg_target_op_def. - Split out tcg-target-has.h and unexport from tcg.h. - Reorg constraint processing; constify TCGOpDef. - Make extract, sextract, deposit opcodes mandatory. - Merge ext{8,16,32}{s,u} opcodes into {s}extract. tcg/mips: Expand bswap unconditionally tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64 tcg/riscv: Use BEXTI for single-bit extractions tcg/sparc64: Use SRA, SRL for {s}extract_i64 disas/riscv: Guard dec->cfg dereference for host disassemble util/cpuinfo-riscv: Detect Zbs accel/tcg: Call tcg_tb_insert() for one-insn TBs linux-user: Add missing /proc/cpuinfo fields for sparc # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmeKnzUdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+Kvgf+LG9UjXlWF9GK923E # TllBL2rLf1OOdtTXWO15VcvGMoWDwB3tVBdhihdvXmnWju+WbfMk6mct5NhzsKn9 # LmuugMIZs+hMROj+bgMK8x47jRIh5N2rDYxcEgmyfIpYb2o9qvyqKecGVRlSJTCE # bmt5UFbvPThBb8upoMfq3F6evuMx0szBP7wrOwSR/VGpmzIr20UTEWo6I1ALp4uj # paFaysYol4em3dIhkiuV9cL7E0EIObaNa7l9RUci/BmTq+JaVxUnW1Y2i0PEwKwG # FJSfYTJk3wBgAVxC2zC2g3ZM7uKuecSXMpiFopTiuyQLp7Q61i9kCNvEq0qY5tdb # DaqR/g== # =cv4O # -----END PGP SIGNATURE----- # gpg: Signature made Fri 17 Jan 2025 13:19:33 EST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20250117' of https://gitlab.com/rth7680/qemu: (68 commits) softfloat: Constify helpers returning float_status field accel/tcg: Call tcg_tb_insert() for one-insn TBs tcg: Document tb_lookup() and tcg_tb_lookup() linux-user: Add missing /proc/cpuinfo fields for sparc tcg/riscv: Use BEXTI for single-bit extractions util/cpuinfo-riscv: Detect Zbs tcg: Remove TCG_TARGET_HAS_deposit_{i32,i64} tcg: Remove TCG_TARGET_HAS_{s}extract_{i32,i64} tcg/tci: Remove assertions for deposit and extract tcg/tci: Provide TCG_TARGET_{s}extract_valid tcg/sparc64: Use SRA, SRL for {s}extract_i64 tcg/s390x: Fold the ext{8,16,32}[us] cases into {s}extract tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64 tcg/riscv64: Fold the ext{8,16,32}[us] cases into {s}extract tcg/ppc: Fold the ext{8,16,32}[us] cases into {s}extract tcg/mips: Fold the ext{8,16,32}[us] cases into {s}extract tcg/loongarch64: Fold the ext{8,16,32}[us] cases into {s}extract tcg/arm: Add full [US]XT[BH] into {s}extract tcg/aarch64: Expand extract with offset 0 with andi tcg/aarch64: Provide TCG_TARGET_{s}extract_valid ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-01-17docs: add a glossaryPierrick Bouvier7-0/+291
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20241209183104.365796-7-pierrick.bouvier@linaro.org> [AJB: update MAINTAINERS] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250116160306.1709518-37-alex.bennee@linaro.org>
2025-01-17docs/devel: add a codebase sectionPierrick Bouvier15-1/+256
Present the various parts of QEMU and organization of codebase. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20241209183104.365796-6-pierrick.bouvier@linaro.org> [AJB: tweak commit summary, update MAINTAINERS] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250116160306.1709518-36-alex.bennee@linaro.org>
generated by cgit v1.1 at 2025-09-19 11:43:55 +0000