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2015-09-25monitor: make monitor_fprintf and mon_get_cpu externally visiblePavel Butsykin1-10/+0
monitor_fprintf and mon_get_cpu will be used in the target-specific monitor, so it is advisable to make it external. Signed-off-by: Pavel Butsykin <pbutsykin@virtuozzo.com> Signed-off-by: Denis V. Lunev <den@openvz.org> CC: Paolo Bonzini <pbonzini@redhat.com> CC: Andreas Färber <afaerber@suse.de> Message-Id: <1442927901-1084-6-git-send-email-den@openvz.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-08-14disas: Defeature print_target_addressPeter Crosthwaite1-10/+2
It does not work in multi-arch as it requires the CPU specific TARGET_VIRT_ADDR_SPACE_BITS global define. Just use the generic version that does no masking. Targets should be responsible for passing in a sane virtual address. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-Id: <1436129432-16617-1-git-send-email-crosthwaite.peter@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-09disas: cris: QOMify target specific disas setupPeter Crosthwaite1-8/+0
Move the target_disas() cris specifics to the QOM disas_set_info() hook and delete the cris specific code in disas.c. This also now adds support for monitor_disas() to cris. E.g. (qemu) xp 0x40004000 0000000040004000: 0x1e6f25f0 And before this patch: (qemu) xp/i 0x40004000 0x40004000: Asm output not supported on this arch After: (qemu) xp/i 0x40004000 0x40004000: di (qemu) xp/i 0x40004002 0x40004002: move.d 0xb003c004,$r1 Note: second example is 6-byte misaligned instruction! Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-07-09disas: microblaze: QOMify target specific disas setupPeter Crosthwaite1-3/+0
Move the target_disas() MB specifics to the QOM disas_set_info hook and delete the MB specific code in disas.c. This also now adds support for monitor_disas() to Microblaze. E.g. (qemu) xp 0x90000000 0000000090000000: 0x94208001 And before this patch: (qemu) xp/i 0x90000000 0x90000000: Asm output not supported on this arch After: (qemu) xp/i 0x90000000 0x90000000: mfs r1, rmsr Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-07-09disas: arm: QOMify target specific disas setupPeter Crosthwaite1-32/+0
Move the target_disas() ARM specifics to the QOM disas_set_info hook and delete the ARM specific code in disas.c. This has the extra advantage of the more fully featured target_disas() implementation now applying to monitor_disas(). Currently, target_disas() has multi-endian, thumb and AArch64 support whereas the existing monitor_disas() support only has vanilla AA32 support. E.G. Running an AA64 linux kernel the following -d in_asm disas happens (taget_disas()): IN: 0x0000000040000000: 580000c0 ldr x0, pc+24 (addr 0x40000018) 0x0000000040000004: aa1f03e1 mov x1, xzr However before this patch, disasing the same from the monitor: (qemu) xp/i 0x40000000 0x0000000040000000: 580000c0 stmdapl r0, {r6, r7} After this patch: (qemu) xp/i 0x40000000 0x0000000040000000: 580000c0 ldr x0, pc+24 (addr 0x40000018) Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-07-09disas: QOMify target specific setupPeter Crosthwaite1-4/+18
Add a QOM function hook for target-specific disassembly setup. This allows removal of the #ifdeffery currently implementing target specific disas setup from disas.c. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-07-09disas: Add print_insn to disassemble infoPeter Crosthwaite1-35/+33
Add the print_insn pointer to the disassemble info structure. This is to prepare for QOMification support, where a QOM CPU hook function will be responsible for setting the print_insn() function. Add this function to the existing struct to consolidate such that only the one struct needs to be passed to the new QOM API. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-06-22disas: Remove uses of CPU envPeter Crosthwaite1-7/+7
disas does not need to access the CPU env for any reason. Change the APIs to accept CPU pointers instead. Small change pattern needs to be applied to all target translate.c. This brings us closer to making disas.o a common-obj and less architecture specific in general. Cc: Richard Henderson <rth@twiddle.net> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Michael Walle <michael@walle.cc> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Jia Liu <proljc@gmail.com> Cc: Alexander Graf <agraf@suse.de> Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Acked-by: Luiz Capitulino <lcapitulino@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2014-06-16monitor: QEMU Monitor Instruction Disassembly Incorrect for PowerPC LE ModeTom Musta1-2/+12
The monitor support for disassembling instructions does not honor the MSR[LE] bit for PowerPC processors. This change enhances the monitor_disas() routine by supporting a flag bit for Little Endian mode. Bit 16 is used since that bit was used in the analagous guest disassembly routine target_disas(). Also, to be consistent with target_disas(), the disassembler bfd_mach field can be passed in the flags argument. Reported-by: Anton Blanchard <anton@samba.org> Signed-off-by: Tom Musta <tommusta@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-16target-ppc: Fix target_disasTom Musta1-3/+4
Inspect only bit 16 for the Little Endian test. Correct comment preceding the target_disas() function. Correct grammar in comment for flags processing. Signed-off-by: Tom Musta <tommusta@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-02-08disas: Implement disassembly output for A64Claudio Fontana1-2/+12
Use libvixl to implement disassembly output in debug logs for A64, for use with both AArch64 hosts and targets. Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org> [PMM: * added support for target disassembly * switched to custom QEMUDisassembler so the output format matches what QEMU expects * make sure we correctly fall back to "just print hex" if we didn't build the AArch64 disassembler because of lack of a C++ compiler * rename from 'aarch64' to 'arm-a64' because this is a disassembler for the A64 instruction set * merge aarch64.c and aarch64-cxx.cc into one C++ file * simplify the aarch64.c<->aarch64-cxx.cc interface] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-08-24disas: Implement fallback to dump object code as hexRichard Henderson1-10/+37
The OBJD-[HT] tags will be used by a script to run the hex blob through objdump --disassemble. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-07-23exec: Change cpu_memory_rw_debug() argument to CPUStateAndreas Färber1-2/+2
Propagate X86CPU in kvmvapic for simplicity. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-04-26disas: Disassemble all ppc insns for the guestAurelien Jarno1-0/+1
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-04-15disas: Disassemble all ppc insns for the hostRichard Henderson1-0/+1
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-03-23Add moxie disassemblerAnthony Green1-0/+6
Signed-off-by: Anthony Green <green@moxielogic.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-19monitor: move include files to include/monitor/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19build: kill libdis, move disassemblers to disas/Paolo Bonzini1-2/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-11-10disas: avoid using cpu_single_envBlue Swirl1-68/+81
Pass around CPUArchState instead of using global cpu_single_env. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Richard Henderson <rth@twiddle.net> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
2012-09-21tcg-sparc: Assume v9 cpu always, i.e. force v8plus in 32-bit mode.Richard Henderson1-2/+0
Current code doesn't actually work in 32-bit mode at all. Since no one really noticed, drop the complication of v7 and v8 cpus. Eliminate the --sparc_cpu configure option and standardize macro testing on TCG_TARGET_REG_BITS / HOST_LONG_BITS Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-07-14disas: Fix printing of addresses in disassemblyPeter Maydell1-0/+19
In our disassembly code, the bfd_vma type is always 64 bits, even if the target's virtual address width is only 32 bits. This means that when we print out addresses we need to truncate them to 32 bits, to avoid odd output which has incorrectly sign-extended a value to 64 bits, for instance this ARM example: 0x80479a60: e59f4088 ldr r4, [pc, #136] ; 0xffffffff80479a4f (It would also be possible to truncate before passing the address to info->print_address_func(), but truncating in the final print function is the same approach that binutils takes to this problem.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-05-14fix some common typosJim Meyering1-1/+1
These were identified using: http://github.com/lyda/misspell-check and run like this to create a bourne shell script using GNU sed's -i option: git ls-files|grep -vF .bin | misspellings -f - |grep -v '^ERROR:' |perl \ -pe 's/^(.*?)\[(\d+)\]: (\w+) -> "(.*?)"$/sed -i '\''${2}s!$3!$4!'\'' $1/' Manually eliding the FP, "rela->real" and resolving "addres" to address (not "adders") we get this: sed -i '450s!thru!through!' Changelog sed -i '260s!neccessary!necessary!' coroutine-sigaltstack.c sed -i '54s!miniscule!minuscule!' disas.c sed -i '1094s!thru!through!' hw/usb/hcd-ehci.c sed -i '1095s!thru!through!' hw/usb/hcd-ehci.c sed -i '21s!unecessary!unnecessary!' qapi-schema-guest.json sed -i '307s!explictly!explicitly!' qemu-ga.c sed -i '490s!preceeding!preceding!' qga/commands-posix.c sed -i '792s!addres!address!' qga/commands-posix.c sed -i '6s!beeing!being!' tests/tcg/test-mmap.c Also, manually fix "arithmentic", spotted by Peter Maydell: sed -i 's!arithmentic!arithmetic!' coroutine-sigaltstack.c Signed-off-by: Jim Meyering <meyering@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-15disas: Replace 'unsigned long' by 'uintptr_t'Stefan Weil1-4/+4
This is needed for w64. It changes nothing for other hosts. Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-04-06Userspace ARM BE8 supportPaul Brook1-5/+13
Add support for ARM BE8 userspace binaries. i.e. big-endian data and little-endian code. In principle LE8 mode is also possible, but AFAIK has never actually been implemented/used. System emulation doesn't have any useable big-endian board models, but should in principle work once you fix that. Dynamic endianness switching requires messing with data accesses, preferably with TCG cooperation, and is orthogonal to BE8 support. Signed-off-by: Paul Brook <paul@codesourcery.com> [PMM: various changes, mostly as per my suggestions in code review: * rebase * use EF_ defines rather than hardcoded constants * make bswap_code a bool for future VMSTATE macro compatibility * update comment in cpu.h about TB flags bit field usage * factor out load-code-and-swap into arm_ld*_code functions and get_user_code* macros * fix stray trailing space at end of line * added braces in disas.c to satisfy checkpatch ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-04-01target-lm32: add simple disassemblerMichael Walle1-0/+6
Because binutils disassembler is based on libopcode, this is a rewrite from scratch. Signed-off-by: Michael Walle <michael@walle.cc>
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber1-2/+2
Scripted conversion: for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done All occurrences of CPUArchState are expected to be replaced by QOM CPUState, once all targets are QOM'ified and common fields have been extracted. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-31tcg: Add tci disassemblerStefan Weil1-1/+3
Signed-off-by: Stefan Weil <sw@weilnetz.de>
2011-08-25disasm: update commentFrediano Ziglio1-1/+1
Signed-off-by: Frediano Ziglio <freddy77@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-06-26Remove exec-all.h include directivesBlue Swirl1-1/+0
Most exec-all.h include directives are now useless, remove them. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-31target-alpha: Disassemble EV6 PALcode instructions.Richard Henderson1-1/+1
The QEMU emulation PALcode will use EV6 PALcode insns regardless of the "real" cpu instruction set being emulated. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-04-12Replace cpu_physical_memory_rw were possibleStefan Weil1-1/+1
Using cpu_physical_memory_read, cpu_physical_memory_write and ldub_phys improves readability and allows removing some type casts. lduw_phys and ldl_phys were not used because both require aligned addresses. Therefore it is not possible to simply replace existing calls by one of these functions. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-04s390x: Enable disassembler for s390xUlrich Hecht1-0/+6
This patch enables the instruction disassembler when using an S390x target. Signed-off-by: Ulrich Hecht <uli@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-12disas: remove opcode printing on ARM hostsAurelien Jarno1-5/+0
Following commit 5d48e9174e3bfa8655e1dc8f80887acd9040b427, it's possible to remove the hack that used to display the opcodes on ARM hosts only. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-10cris: Support disassembly of crisv10Edgar E. Iglesias1-2/+7
Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
2010-10-03Use GCC_FMT_ATTR (format checking)Stefan Weil1-1/+2
Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-01ia64 disas supportAurelien Jarno1-0/+17
Taken from binutils SVN, using last GPLv2 version. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-11-14sh4 disasm fixesMagnus Damm1-0/+3
Add the sh4 target to the monitor disassembly function, and remove a duplicate "0x" printout from the sh4 dis- assembly code. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-07-27rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela1-1/+1
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-05-26microblaze: Add disassembler.Edgar E. Iglesias1-0/+3
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2009-05-07Fix disassembler memory accessesBlue Swirl1-4/+1
Sparc disassembler wants to check previous addresses for some stuff and this may actually cause faults to be generated to the guest if the address is close to page start, because of the function used for the memory access. Fix by changing ldub_code to cpu_memory_rw_debug, which doesn't trigger exceptions. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-04-21Safety net for the cases where disassembler/translator disagree over ↵malc1-0/+7
instruction decoding Noticed by Mark Karpeles. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7209 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-05monitor: Rework API (Jan Kiszka)aliguori1-9/+8
Refactor the monitor API and prepare it for decoupled terminals: term_print functions are renamed to monitor_* and all monitor services gain a new parameter (mon) that will once refer to the monitor instance the output is supposed to appear on. However, the argument remains unused for now. All monitor command callbacks are also extended by a mon parameter so that command handlers are able to pass an appropriate reference to monitor output services. For the case that monitor outputs so far happen without clearly identifiable context, the global variable cur_mon is introduced that shall once provide a pointer either to the current active monitor (while processing commands) or to the default one. On the mid or long term, those use case will be obsoleted so that this variable can be removed again. Due to the broad usage of the monitor interface, this patch mostly deals with converting users of the monitor API. A few of them are already extended to pass 'mon' from the command handler further down to internal functions that invoke monitor_printf. At this chance, monitor-related prototypes are moved from console.h to a new monitor.h. The same is done for the readline API. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6711 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-13Allow disassembling last addresses of the address spaceblueswir11-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6619 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-14Remove all traces of __powerpc__malc1-1/+1
According to $GCC/gcc/config/rs6000/rs6000-c.c _ARCH_PPC is the ubiquitous define which should be used to test whether gcc targets PowerPC, on 64bit platforms _ARCH_PPC64 will be also defined. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6301 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-22Update old fashioned function prototypes.pbrook1-15/+5
Signed-off-by: Stefan Weil <weil@mail.berlios.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5511 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-22* Use function pointers for symbol lookup (currently for elf32 and elf64,pbrook1-23/+7
could be expanded). This also fixes the bug with mips elf64 symbols in current Qemu trunk. * Use quicksort and binary search for symbol lookup. * Remove unneeded entries from symbol table. This reduced a typical table size (linux mips kernel) from 1764487 to 11656 entries. Signed-off-by: Stefan Weil <weil@mail.berlios.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5510 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17Fix warnings that would be generated by gcc -Wstrict-prototypesblueswir11-5/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5021 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-12HPPA (PA-RISC) host supportaurel321-0/+2
(Stuart Brady) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4199 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-25One more bit of alpha support.ths1-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3854 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08Wire up CRIS disassembler, by Edgar E. Iglesias.ths1-0/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3357 c046a42c-6fe2-441c-8c8c-71466251a162
generated by cgit v1.1 at 2024-11-01 02:41:43 +0000