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2013-04-26disas: Disassemble all ppc insns for the guestAurelien Jarno1-0/+1
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-04-15disas: Disassemble all ppc insns for the hostRichard Henderson1-0/+1
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-03-23Add moxie disassemblerAnthony Green1-0/+6
Signed-off-by: Anthony Green <green@moxielogic.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-19monitor: move include files to include/monitor/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19build: kill libdis, move disassemblers to disas/Paolo Bonzini1-2/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-11-10disas: avoid using cpu_single_envBlue Swirl1-68/+81
Pass around CPUArchState instead of using global cpu_single_env. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Richard Henderson <rth@twiddle.net> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
2012-09-21tcg-sparc: Assume v9 cpu always, i.e. force v8plus in 32-bit mode.Richard Henderson1-2/+0
Current code doesn't actually work in 32-bit mode at all. Since no one really noticed, drop the complication of v7 and v8 cpus. Eliminate the --sparc_cpu configure option and standardize macro testing on TCG_TARGET_REG_BITS / HOST_LONG_BITS Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-07-14disas: Fix printing of addresses in disassemblyPeter Maydell1-0/+19
In our disassembly code, the bfd_vma type is always 64 bits, even if the target's virtual address width is only 32 bits. This means that when we print out addresses we need to truncate them to 32 bits, to avoid odd output which has incorrectly sign-extended a value to 64 bits, for instance this ARM example: 0x80479a60: e59f4088 ldr r4, [pc, #136] ; 0xffffffff80479a4f (It would also be possible to truncate before passing the address to info->print_address_func(), but truncating in the final print function is the same approach that binutils takes to this problem.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-05-14fix some common typosJim Meyering1-1/+1
These were identified using: http://github.com/lyda/misspell-check and run like this to create a bourne shell script using GNU sed's -i option: git ls-files|grep -vF .bin | misspellings -f - |grep -v '^ERROR:' |perl \ -pe 's/^(.*?)\[(\d+)\]: (\w+) -> "(.*?)"$/sed -i '\''${2}s!$3!$4!'\'' $1/' Manually eliding the FP, "rela->real" and resolving "addres" to address (not "adders") we get this: sed -i '450s!thru!through!' Changelog sed -i '260s!neccessary!necessary!' coroutine-sigaltstack.c sed -i '54s!miniscule!minuscule!' disas.c sed -i '1094s!thru!through!' hw/usb/hcd-ehci.c sed -i '1095s!thru!through!' hw/usb/hcd-ehci.c sed -i '21s!unecessary!unnecessary!' qapi-schema-guest.json sed -i '307s!explictly!explicitly!' qemu-ga.c sed -i '490s!preceeding!preceding!' qga/commands-posix.c sed -i '792s!addres!address!' qga/commands-posix.c sed -i '6s!beeing!being!' tests/tcg/test-mmap.c Also, manually fix "arithmentic", spotted by Peter Maydell: sed -i 's!arithmentic!arithmetic!' coroutine-sigaltstack.c Signed-off-by: Jim Meyering <meyering@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-15disas: Replace 'unsigned long' by 'uintptr_t'Stefan Weil1-4/+4
This is needed for w64. It changes nothing for other hosts. Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-04-06Userspace ARM BE8 supportPaul Brook1-5/+13
Add support for ARM BE8 userspace binaries. i.e. big-endian data and little-endian code. In principle LE8 mode is also possible, but AFAIK has never actually been implemented/used. System emulation doesn't have any useable big-endian board models, but should in principle work once you fix that. Dynamic endianness switching requires messing with data accesses, preferably with TCG cooperation, and is orthogonal to BE8 support. Signed-off-by: Paul Brook <paul@codesourcery.com> [PMM: various changes, mostly as per my suggestions in code review: * rebase * use EF_ defines rather than hardcoded constants * make bswap_code a bool for future VMSTATE macro compatibility * update comment in cpu.h about TB flags bit field usage * factor out load-code-and-swap into arm_ld*_code functions and get_user_code* macros * fix stray trailing space at end of line * added braces in disas.c to satisfy checkpatch ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-04-01target-lm32: add simple disassemblerMichael Walle1-0/+6
Because binutils disassembler is based on libopcode, this is a rewrite from scratch. Signed-off-by: Michael Walle <michael@walle.cc>
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber1-2/+2
Scripted conversion: for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done All occurrences of CPUArchState are expected to be replaced by QOM CPUState, once all targets are QOM'ified and common fields have been extracted. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-31tcg: Add tci disassemblerStefan Weil1-1/+3
Signed-off-by: Stefan Weil <sw@weilnetz.de>
2011-08-25disasm: update commentFrediano Ziglio1-1/+1
Signed-off-by: Frediano Ziglio <freddy77@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-06-26Remove exec-all.h include directivesBlue Swirl1-1/+0
Most exec-all.h include directives are now useless, remove them. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-31target-alpha: Disassemble EV6 PALcode instructions.Richard Henderson1-1/+1
The QEMU emulation PALcode will use EV6 PALcode insns regardless of the "real" cpu instruction set being emulated. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-04-12Replace cpu_physical_memory_rw were possibleStefan Weil1-1/+1
Using cpu_physical_memory_read, cpu_physical_memory_write and ldub_phys improves readability and allows removing some type casts. lduw_phys and ldl_phys were not used because both require aligned addresses. Therefore it is not possible to simply replace existing calls by one of these functions. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-04s390x: Enable disassembler for s390xUlrich Hecht1-0/+6
This patch enables the instruction disassembler when using an S390x target. Signed-off-by: Ulrich Hecht <uli@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-12disas: remove opcode printing on ARM hostsAurelien Jarno1-5/+0
Following commit 5d48e9174e3bfa8655e1dc8f80887acd9040b427, it's possible to remove the hack that used to display the opcodes on ARM hosts only. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-10cris: Support disassembly of crisv10Edgar E. Iglesias1-2/+7
Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
2010-10-03Use GCC_FMT_ATTR (format checking)Stefan Weil1-1/+2
Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-01ia64 disas supportAurelien Jarno1-0/+17
Taken from binutils SVN, using last GPLv2 version. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-11-14sh4 disasm fixesMagnus Damm1-0/+3
Add the sh4 target to the monitor disassembly function, and remove a duplicate "0x" printout from the sh4 dis- assembly code. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-07-27rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela1-1/+1
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-05-26microblaze: Add disassembler.Edgar E. Iglesias1-0/+3
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2009-05-07Fix disassembler memory accessesBlue Swirl1-4/+1
Sparc disassembler wants to check previous addresses for some stuff and this may actually cause faults to be generated to the guest if the address is close to page start, because of the function used for the memory access. Fix by changing ldub_code to cpu_memory_rw_debug, which doesn't trigger exceptions. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-04-21Safety net for the cases where disassembler/translator disagree over ↵malc1-0/+7
instruction decoding Noticed by Mark Karpeles. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7209 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-05monitor: Rework API (Jan Kiszka)aliguori1-9/+8
Refactor the monitor API and prepare it for decoupled terminals: term_print functions are renamed to monitor_* and all monitor services gain a new parameter (mon) that will once refer to the monitor instance the output is supposed to appear on. However, the argument remains unused for now. All monitor command callbacks are also extended by a mon parameter so that command handlers are able to pass an appropriate reference to monitor output services. For the case that monitor outputs so far happen without clearly identifiable context, the global variable cur_mon is introduced that shall once provide a pointer either to the current active monitor (while processing commands) or to the default one. On the mid or long term, those use case will be obsoleted so that this variable can be removed again. Due to the broad usage of the monitor interface, this patch mostly deals with converting users of the monitor API. A few of them are already extended to pass 'mon' from the command handler further down to internal functions that invoke monitor_printf. At this chance, monitor-related prototypes are moved from console.h to a new monitor.h. The same is done for the readline API. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6711 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-13Allow disassembling last addresses of the address spaceblueswir11-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6619 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-14Remove all traces of __powerpc__malc1-1/+1
According to $GCC/gcc/config/rs6000/rs6000-c.c _ARCH_PPC is the ubiquitous define which should be used to test whether gcc targets PowerPC, on 64bit platforms _ARCH_PPC64 will be also defined. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6301 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-22Update old fashioned function prototypes.pbrook1-15/+5
Signed-off-by: Stefan Weil <weil@mail.berlios.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5511 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-22* Use function pointers for symbol lookup (currently for elf32 and elf64,pbrook1-23/+7
could be expanded). This also fixes the bug with mips elf64 symbols in current Qemu trunk. * Use quicksort and binary search for symbol lookup. * Remove unneeded entries from symbol table. This reduced a typical table size (linux mips kernel) from 1764487 to 11656 entries. Signed-off-by: Stefan Weil <weil@mail.berlios.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5510 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17Fix warnings that would be generated by gcc -Wstrict-prototypesblueswir11-5/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5021 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-12HPPA (PA-RISC) host supportaurel321-0/+2
(Stuart Brady) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4199 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-25One more bit of alpha support.ths1-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3854 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08Wire up CRIS disassembler, by Edgar E. Iglesias.ths1-0/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3357 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-29Define the proper bfd_mach to be used by the disassembler for eachj_mayer1-3/+8
PowerPC emulated CPU. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3257 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-17find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in ↵ths1-2/+2
the regex. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths1-6/+6
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-31s390 disassembler support, by Ulrich Hecht.ths1-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3104 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03One day we might support MIPS16...ths1-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2939 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03Spelling fixes, by Stefan Weil.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2927 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09Fix monitor disasm output for Sparc64 targetblueswir11-0/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2646 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-08Fix generated code disasm output on Sparc64 hostblueswir11-0/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2638 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05Integrate Alpha target in Qemu core.j_mayer1-0/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2601 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-01Remove duplicate TARGET_M68K case.pbrook1-4/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2280 c046a42c-6fe2-441c-8c8c-71466251a162
2006-10-22ColdFire target.pbrook1-0/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2196 c046a42c-6fe2-441c-8c8c-71466251a162
2006-07-30Rewrite Arm host support.pbrook1-4/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2071 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-25C99 64 bit printfbellard1-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2018 c046a42c-6fe2-441c-8c8c-71466251a162
generated by cgit v1.1 at 2024-12-27 20:08:20 +0000