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cpu-exec.c
Age
Commit message (
Expand
)
Author
Files
Lines
2004-04-25
added cpu_resume_from_signal() - irq fix
bellard
1
-20
/
+52
2004-04-12
PowerPC system emulation fixes (Jocelyn Mayer)
bellard
1
-1
/
+1
2004-03-31
win32 port (initial patch by kazu)
bellard
1
-0
/
+4
2004-03-21
do not depend on thunk.h - more log items
bellard
1
-3
/
+3
2004-03-17
initial x86-64 host support (Gwenole Beauchesne)
bellard
1
-0
/
+15
2004-02-25
native FPU support in code copy mode
bellard
1
-1
/
+17
2004-02-16
experimental code copy support - CPU_INTERRUPT_EXITTB support
bellard
1
-18
/
+134
2004-02-03
temporary interrupt locking fix (need rework)
bellard
1
-0
/
+1
2004-01-18
PowerPC merge (Jocelyn Mayer)
bellard
1
-1
/
+1
2004-01-18
simpler second page physical address test
bellard
1
-2
/
+3
2004-01-04
PowerPC System emulation (Jocelyn Mayer)
bellard
1
-5
/
+28
2004-01-04
support for new TLB handling
bellard
1
-2
/
+47
2004-01-04
sparc fixes
bellard
1
-8
/
+8
2003-11-23
PowerPC target support (Jocelyn Mayer) - added better support for uid16
bellard
1
-7
/
+52
2003-11-19
fixed TB linking in case of code invalidation (fixes random segfaults)
bellard
1
-1
/
+12
2003-10-30
unused functions in system mode
bellard
1
-1
/
+1
2003-10-27
fixed mmu fault priviledge logic
bellard
1
-2
/
+4
2003-09-30
sparc emulation target (thanx to Thomas M. Ogrisegg)
bellard
1
-8
/
+20
2003-09-17
removed x86 hacks
bellard
1
-17
/
+3
2003-08-21
faster and more accurate segment handling
bellard
1
-16
/
+4
2003-08-20
pop ss, mov ss, x and sti disable irqs for the next instruction - began dispa...
bellard
1
-13
/
+13
2003-08-20
no error code if hardware interrupt
bellard
1
-2
/
+2
2003-08-10
m68k host port (Richard Zidlicky)
bellard
1
-0
/
+17
2003-08-10
soft mmu support
bellard
1
-6
/
+23
2003-07-29
correct CPL support (should fix flat real mode support)
bellard
1
-7
/
+2
2003-07-26
real mode support
bellard
1
-9
/
+7
2003-07-26
gdb stub breakpoints support
bellard
1
-1
/
+1
2003-07-09
ARM fixes
bellard
1
-7
/
+4
2003-06-30
fixed invalid irq jump chaining
bellard
1
-0
/
+7
2003-06-30
reduced irq latency
bellard
1
-20
/
+23
2003-06-25
suppressed ring 0 hacks
bellard
1
-15
/
+8
2003-06-24
hardware interrupt support - support forfull ring 0 exception simulation
bellard
1
-131
/
+195
2003-06-21
new segment access
bellard
1
-10
/
+10
2003-06-15
main cpu loop is target independent
bellard
1
-0
/
+575
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