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2012-10-31cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber1-5/+3
For target-mips also change the return type to bool. Make include paths for cpu-qom.h consistent for alpha and unicore32. Signed-off-by: Andreas Färber <afaerber@suse.de> [AF: Updated new target-openrisc function accordingly] Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
2012-10-05cpu_dump_state: move DUMP_FPU and DUMP_CCOP flags from x86-only to genericPeter Maydell1-1/+1
Move the DUMP_FPU and DUMP_CCOP flags for cpu_dump_state() from being x86-specific flags to being generic ones. This allows us to drop some TARGET_I386 ifdefs in various places, and means that we can (potentially) be more consistent across architectures about which monitor commands or debug abort printouts include FPU register contents and info about QEMU's condition-code optimisations. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-08-27Revert "i8259: add -no-spurious-interrupt-hack option"malc1-9/+5
This reverts commit f278d4947fff814dcde2ef2acad36d172ff8be35. Signed-off-by: malc <av1474@comtv.ru>
2012-08-24i8259: add -no-spurious-interrupt-hack optionMatthew Ogilvie1-5/+9
This patch provides a way to optionally suppress spurious interrupts, as a workaround for systems described below: Some old operating systems do not handle spurious interrupts well, and qemu tends to generate them significantly more often than real hardware. Examples: - Microport UNIX System V/386 v 2.1 (ca 1987) (The main problem I'm fixing: Without this patch, it panics sporadically when accessing the hard disk.) - AT&T UNIX System V/386 Release 4.0 Version 2.1a (ca 1991) See screenshot in "QEMU Official OS Support List": http://www.claunia.com/qemu/objectManager.php?sClass=application&iId=9 (I don't have this system to test.) - A report about OS/2 boot lockup from 2004 by Hampa Hug: http://lists.nongnu.org/archive/html/qemu-devel/2004-09/msg00367.html (My patch was partially inspired by his.) Also: http://lists.nongnu.org/archive/html/qemu-devel/2005-06/msg00243.html (I don't have this system to test.) Signed-off-by: Matthew Ogilvie <mmogilvi_qemu@miniinfo.net> Signed-off-by: malc <av1474@comtv.ru>
2012-08-11unicore32-softmmu: Make UniCore32 cpuid & exceptions correct and runableGuan Xuetao1-0/+1
This patch initializes the cpuid to exactly correct value because linux kernel will check it. In addition, the exception types are specified in proper situations. Then it could make exceptions generated correctly and timely. Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-09Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemuBlue Swirl1-4/+1
* 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu: target-i386: move tcg initialization into x86_cpu_initfn() cleanup cpu_set_debug_excp_handler target-xtensa: drop usage of prev_debug_excp_handler target-i386: drop usage of prev_debug_excp_handler
2012-07-27target-or32: Add interrupt supportJia Liu1-0/+17
Add OpenRISC interrupt support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27target-or32: Add target stubs and QOM cpuJia Liu1-0/+2
Add OpenRISC target stubs, QOM cpu and basic machine. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-10apic: Defer interrupt updates to VCPU threadJan Kiszka1-0/+6
KVM performs TPR raising asynchronously to QEMU, specifically outside QEMU's global lock. When an interrupt is injected into the APIC and TPR is checked to decide if this can be delivered, a stale TPR value may be used, causing spurious interrupts in the end. Fix this by deferring apic_update_irq to the context of the target VCPU. We introduce a new interrupt flag for this, CPU_INTERRUPT_POLL. When it is set, the VCPU calls apic_poll_irq before checking for further pending interrupts. To avoid special-casing KVM, we also implement this logic for TCG mode. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-06-28x86: avoid AREG0 for exceptionsBlue Swirl1-4/+8
Add an explicit CPUX86State parameter instead of relying on AREG0. Merge raise_exception_env() to raise_exception(), likewise with raise_exception_err_env() and raise_exception_err(). Introduce cpu_svm_check_intercept_param() and cpu_vmexit() as wrappers. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-25cleanup cpu_set_debug_excp_handlerIgor Mammedov1-4/+1
There are no users left for previous exception handler returned from cpu_set_debug_excp_handler. It should simplify code a little. Signed-off-by: Igor Mammedov <imammedo@redhat.com>
2012-06-15cris: Fix NMI-flag handling on crisv10.Lars Persson1-5/+12
- The M-flag is encoded in different bits on cris v10 and cris v32. Signed-off-by: Lars Persson <larper@axis.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-06-04cpu-exec: Use cpu_reset() in cpu_exec() for TARGET_PPCAndreas Färber1-1/+4
CPUState will be needed for all targets in the future, so place it into the main variable declaration block. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Alexander Graf <agraf@suse.de>
2012-06-04target-i386: Pass X86CPU to do_cpu_{init,sipi}()Andreas Färber1-2/+2
Allows to use cpu_reset() in place of cpu_state_reset(). Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-04-15cpu-exec: Remove non-portable type cast and fix format stringStefan Weil1-2/+2
This change is needed for w64, but also changes the code for other hosts. Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-03-30qtest: add test frameworkAnthony Liguori1-0/+1
The idea behind qtest is pretty simple. Instead of executing a CPU via TCG or KVM, rely on an external process to send events to the device model that the CPU would normally generate. qtest presents itself as an accelerator. In addition, a new option is added to establish a qtest server (-qtest) that takes a character device. This is what allows the external process to send CPU events to the device model. qtest uses a simple line based protocol to send the events. Documentation of that protocol is in qtest.c. I considered reusing the monitor for this job. Adding interrupts would be a bit difficult. In addition, logging would also be difficult. qtest has extensive logging support. All protocol commands are logged with time stamps using a new command line option (-qtest-log). Logging is important since ultimately, this is a feature for debugging. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-17w64: Fix data type of next_tb and tcg_qemu_tb_execStefan Weil1-3/+3
next_tb is the numeric value of a tcg target (= QEMU host) address. Using tcg_target_ulong instead of unsigned long shows this and makes the code portable for hosts with an unusual size of long (w64). The type cast '(long)(next_tb & ~3)' was not needed (casting unsigned long to long does not change the bits, and nor does casting long to pointer for most (= all non w64) hosts. It is removed here. Macro or function tcg_qemu_tb_exec is used to set next_tb. The function also returns next_tb. Therefore tcg_qemu_tb_exec must return a tcg_target_ulong. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber1-8/+8
Scripted conversion: for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done All occurrences of CPUArchState are expected to be replaced by QOM CPUState, once all targets are QOM'ified and common fields have been extracted. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14Rename cpu_reset() to cpu_state_reset()Andreas Färber1-1/+1
Frees the identifier cpu_reset for QOM CPUs (manual rename). Don't hide the parameter type behind explicit casts, use static functions with strongly typed argument to indirect. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14PPC: 405: Use proper CPU resetAlexander Graf1-2/+0
On ppc405ep there is a register that allows for software to reset the core, but not the whole system. Implement this reset using a reset interrupt. This gets rid of a bunch of #if 0'ed code. Reported-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-02-10cpu-exec.c: Correct comment about this file and indentation cleanup陳韋任1-5/+5
Each target uses the #define macro (in target-xxx/cpu.h) to rename cpu_exec (cpu-exec.c) to cpu_xxx_exec, then defines its own cpu_loop which calls cpu_xxx_exec. So basically, cpu-exec.c is not only the i386 emulator main execution loop. This patch corrects the comment of this file and does indentation cleanup. Signed-off-by: Chen Wei-Ren (陳韋任) <chenwj@iis.sinica.edu.tw> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-10-06PPC: Fix sync instructions problem in SMPElie Richa1-0/+1
In the current emulation of the load-and-reserve (lwarx) and store-conditional (stwcx.) instructions, the internal reservation mechanism is taken into account, however each CPU has its own reservation information and this information is not synchronized between CPUs to perform proper synchronization. The following test case with 2 CPUs shows that the semantics of the "lwarx" and "stwcx." instructions are not preserved by the emulation. The test case does the following : - CPU0: reserve a memory location - CPU1: reserve the same memory location - CPU0: perform stwcx. on the location The last store-conditional operation succeeds while it is supposed to fail since the reservation was supposed to be lost at the second reserve operation. This (one line) patch fixes this problem in a very simple manner by removing the reservation of a CPU every time it is scheduled (in cpu_exec()). While this is a harsh workaround, it does not affect the guest code much because reservations are usually held for a very short time, that is an lwarx is almost always followed by an stwcx. a few instructions below. Therefore, in most cases, the reservation will be taken and consumed before a CPU switch occurs. However in the rare case where a CPU switch does occur between the lwarx and its corresponding stwcx. this patch solves a potential erroneous behavior of the synchronization instructions. Signed-off-by: Elie Richa <richa@adacore.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-09-10target-xtensa: implement exceptionsMax Filippov1-0/+6
- mark privileged opcodes with ring check; - make debug exception on exception handler entry. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-10target-xtensa: add target stubsMax Filippov1-0/+2
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-10cpu-exec: remove unnecessary assignmentBlue Swirl1-2/+3
Avoid this warning from clang analyzer: /src/qemu/cpu-exec.c:97:5: warning: Value stored to 'phys_page2' is never read phys_page2 = -1; Adjust the scope of the variable while at it. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-12tcg: Reload local variables after return from longjmpJan Kiszka1-0/+4
Recent compilers look deep into cpu_exec, find longjmp as a noreturn function and decide to smash some stack variables as they won't be used again. This may lead to env becoming invalid after return from setjmp, causing crashes. Fix it by reloading env from cpu_single_env in that case. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26cpu-exec.c: avoid AREG0 useBlue Swirl1-54/+20
Make functions take a parameter for CPUState instead of relying on global env. Pass CPUState pointer to TCG prologue, which moves it to AREG0. Thanks to Peter Maydell and Laurent Desnogues for the ARM prologue change. Revert the hacks to avoid AREG0 use on Sparc hosts. Move cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. Compile the file without HELPER_CFLAGS. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26exec.h: fix coding style and change cpu_has_work to return boolBlue Swirl1-1/+1
Before the next patch, fix coding style of the areas affected. Change the type of the return value from cpu_has_work() and qemu_cpu_has_work() to bool. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26cpu-exec: unify do_interrupt callBlue Swirl1-26/+0
Now that all targets use common function signature for do_interrupt(), there is no need for the #ifdeffery anymore. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26m68k: use caller supplied CPUState for interrupt related stuffBlue Swirl1-2/+2
Pass CPUState to do_interrupt(). This is needed by later patches. It would be cleaner to move the function to helper.c, but there are a few dependencies between do_interrupt() and other functions. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26x86: use caller supplied CPUState for interrupt related stuffBlue Swirl1-26/+15
Several x86 specific functions are called from cpu-exec.c with the assumption that global env register is valid. This will be changed later, so make the functions use caller supplied CPUState parameter. It would be cleaner to move the functions to helper.c, but there are quite a lot of dependencies between do_interrupt() and other functions. Add helpers for svm_check_intercept() and cpu_cc_compute_all() instead of calling the helper (which uses global env, AREG0) directly. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26cpu_loop_exit: avoid using AREG0Blue Swirl1-8/+8
Make cpu_loop_exit() take a parameter for CPUState instead of relying on global env. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-20Remove unneeded kvm.h from cpu-exec.cJan Kiszka1-1/+0
This was obsoleted by 6792a57bf1. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-05-31target-alpha: Disable interrupts properly.Richard Henderson1-3/+30
Interrupts are disabled in PALmode, and when the PS IL is high enough. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-28Move user emulator stuff from cpu-exec.c to user-exec.cBlue Swirl1-655/+0
Simplify cpu-exec.c by refactoring. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-28cpu-exec: prepare for user and softmmu splitBlue Swirl1-131/+172
There is little in common with user and softmmu versions of cpu_resume_signal(), split them. Fix coding style for the user emulator part. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-22Delete unused tb_invalidate_page_rangeBlue Swirl1-13/+0
tb_invalidate_page_range() was intended to be used to invalidate an area of a TB which the guest explicitly flushes from i-cache. However, QEMU detects writes to code areas where TBs have been generated, so his has never been useful. Delete the function, adjust callers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-12Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori1-2/+2
Conflicts: cpu-all.h
2011-05-08target-sparc: Do not check CPU_INTERRUPT_TIMER.Richard Henderson1-3/+0
This bit is never set, therefore we should not read it either. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-08irq: Introduce and use CPU_INTERRUPT_SSTEP_MASK.Richard Henderson1-4/+1
This mask contains all of the bits that should be ignored while single stepping in the debugger. The mask contains 2 bits that are not currently cleared, but are also never set. The bits are included in the mask for consistency in handling of the CPU_INTERRUPT_TGT_EXT_N bits. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-08Fix typos in comments and code (occured -> occurred and related)Stefan Weil1-1/+1
The code changed here is an unused data type name (evt_flush_occurred). Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-05-08Fix typos in comments (interupt -> interrupt)Stefan Weil1-1/+1
Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-04-20Remove unused function parameter from cpu_restore_stateStefan Weil1-1/+1
The previous patch removed the need for parameter puc. Is is now unused, so remove it. Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-18s390x: Enable s390x-softmmu targetAlexander Graf1-0/+8
This patch adds some code paths for running s390x guest OSs without the need for KVM. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12unicore32: necessary modifications for other files to support unicore32Guan Xuetao1-1/+11
Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-03-15x86: Unbreak TCG support for hardware breakpointsJan Kiszka1-0/+27
Commit 83f338f73e broke x86 hardware breakpoint emulation by moving the debug exception handling out of cpu_exec. Fix this by moving all TCG related bits back, only leaving the generic guest debugging parts in cpus.c. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: TeLeMan <geleman@gmail.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-13inline cpu_halted into sole callerPaolo Bonzini1-2/+7
All implementations are now the same, and there is only one caller, so inline the function there. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-03-07LatticeMico32 target supportMichael Walle1-1/+12
This patch adds support for the LatticeMico32 softcore processor by Lattice Semiconductor. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-02-14kvm: Separate TCG from KVM cpu executionJan Kiszka1-13/+6
Mixing up TCG bits with KVM already led to problems around eflags emulation on x86. Moreover, quite some code that TCG requires on cpu enty/exit is useless for KVM. So dispatch between tcg_cpu_exec and kvm_cpu_exec as early as possible. The core logic of cpu_halted from cpu_exec is added to kvm_arch_process_irqchip_events. Moving away from cpu_exec makes exception_index meaningless for KVM, we can simply pass the exit reason directly (only "EXCP_DEBUG vs. rest" is relevant). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-02-14Move debug exception handling out of cpu_execJan Kiszka1-24/+0
To prepare splitting up KVM and TCG CPU entry/exit, move the debug exception into cpus.c and invoke cpu_handle_debug_exception on return from qemu_cpu_exec. This also allows to clean up the debug request signaling: We can assign the job of informing main-loop to qemu_system_debug_request and stop the calling cpu directly in cpu_handle_debug_exception. That means a debug stop will now only be signaled via debug_requested and not additionally via vmstop_requested. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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