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AgeCommit message (Expand)AuthorFilesLines
2009-04-24qemu: introduce iothread (Marcelo Tosatti)aliguori1-0/+5
2009-04-21added -numa cmdline parameter parser (Andre Przywara)aliguori1-0/+1
2009-03-07The _exit syscall is used for both thread termination in NPTL applications,pbrook1-1/+1
2009-03-06Fix race condition on access to env->interrupt_requestaurel321-0/+2
2009-01-14Get rid of user_mode_onlyaurel321-2/+0
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel321-1/+1
2008-11-29Fix comment typo.pbrook1-1/+1
2008-11-25Use sys-queue.h for break/watchpoint managment (Jan Kiszka)aliguori1-4/+5
2008-11-18Refactor and enhance break/watchpoint API (Jan Kiszka)aliguori1-10/+16
2008-11-05Add KVM support to QEMUaliguori1-1/+7
2008-10-11Add GDB XML register description support.pbrook1-0/+2
2008-07-01Move interrupt_request and user_mode_only to common cpu state.pbrook1-1/+4
2008-06-29Add instruction counter.pbrook1-6/+28
2008-06-09Clean up MMIO TLB handling.pbrook1-5/+7
2008-06-07Multithreaded locking fixes.pbrook1-0/+1
2008-05-29Push common interrupt variables to cpu-defs.h (Glauber Costa)bellard1-0/+4
2008-05-28moved halted field to CPU_COMMONbellard1-0/+1
2008-04-27Use correct types to enable > 2G support, based on a patch fromaurel321-3/+0
2008-04-22Revert "Use correct types to enable > 2G support" (r4238), it isaurel321-0/+3
2008-04-22Use correct types to enable > 2G support, based on a patch fromaurel321-3/+0
2008-04-08Use a common constant for temp_buf sizeblueswir11-1/+3
2008-02-01use the TCG code generatorbellard1-0/+1
2008-01-31use simpler REGPARM convention - make CPUTLBEntry size a power of twobellard1-0/+16
2007-12-09Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.ths1-1/+3
2007-11-17Break up vl.h.pbrook1-0/+4
2007-10-28Implement missing MIPS supervisor mode bits.ths1-1/+1
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer1-9/+0
2007-09-19TARGET_FMT_lu may also be useful.j_mayer1-0/+2
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths1-7/+7
2007-06-26Fix writes to pages containing watchpoints for the RAM not at 0x0 cases.balrog1-1/+1
2007-04-14Add TARGET_FMT_plx to properly display target_phys_addr_t variables.j_mayer1-0/+2
2007-04-05Infrastructure to support more than 2 MMU modes.j_mayer1-1/+10
2007-04-04TARGET_FMT_ld may also be useful for debugging purposes.j_mayer1-0/+2
2007-03-16Watchpoint support (previous commit got eaten by Savannah server crash).pbrook1-0/+8
2006-11-12Speed up tlb_flush_page (Daniel Jacobowitz).pbrook1-0/+8
2006-06-25C99 64 bit printfbellard1-1/+1
2005-11-28PAGE_EXEC support in TLBsbellard1-4/+6
2005-11-23better halted state supportbellard1-2/+1
2005-11-21SMP supportbellard1-2/+3
2005-11-20added CPU_COMMON and CPUState.tb_jmp_cache[]bellard1-0/+29
2005-08-21ram_addr_t type for ram offsetsbellard1-0/+3
2005-07-02simplified PowerPC exception handling (Jocelyn Mayer)bellard1-3/+3
2005-06-05added HOST_LONG_BITS in configurebellard1-6/+0
2005-01-0364 bit target supportbellard1-0/+2
2004-04-26amd64 port (Jocelyn Mayer)bellard1-9/+17
2004-04-25added target_phys_addr_tbellard1-0/+15
2004-03-21do not depend on thunk.h - more log itemsbellard1-0/+8
2004-02-16use osdep.hbellard1-0/+2
2004-01-24correct target_ulong definitionbellard1-0/+16
2003-10-27commentsbellard1-2/+9
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