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2022-01-07bsd-user: add arm target buildWarner Losh1-0/+2
CC: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Warner Losh <imp@bsdimp.com> Acked-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-03Merge remote-tracking branch 'remotes/rth/tags/pull-arm-20211102-2' into stagingRichard Henderson4-4/+4
Add nuvoton sd module for NPCM7XX Add gdb-xml for MVE More uses of tcg_constant_* in target/arm Fix parameter naming for default-bus-bypass-iommu Ignore cache operations to mmio in HVF # gpg: Signature made Tue 02 Nov 2021 02:23:53 PM EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * remotes/rth/tags/pull-arm-20211102-2: hvf: arm: Ignore cache operations on MMIO hw/arm/virt: Rename default_bus_bypass_iommu target/arm: Use tcg_constant_i32() in gen_rev16() target/arm: Use tcg_constant_i64() in do_sat_addsub_64() target/arm: Use the constant variant of store_cpu_field() when possible target/arm: Introduce store_cpu_field_constant() helper target/arm: Use tcg_constant_i32() in op_smlad() target/arm: Advertise MVE to gdb when present tests/qtest/libqos: add SDHCI commands hw/arm: Attach MMC to quanta-gbs-bmc hw/arm: Add Nuvoton SD module to board hw/sd: add nuvoton MMC Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/arm: Advertise MVE to gdb when presentPeter Maydell4-4/+4
Cortex-M CPUs with MVE should advertise this fact to gdb, using the org.gnu.gdb.arm.m-profile-mve XML feature, which defines the VPR register. Presence of this feature also tells gdb to create pseudo-registers Q0..Q7, so we do not need to tell gdb about them separately. Note that unless you have a very recent GDB that includes this fix: http://patches-tcwg.linaro.org/patch/58133/ gdb will mis-print the individual fields of the VPR register as zero (but showing the whole thing as hex, eg with "print /x $vpr" will give the correct value). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20211101160814.5103-1-peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02microvm: add device tree support.Gerd Hoffmann2-0/+2
Allows edk2 detect virtio-mmio devices and pcie ecam. See comment in hw/i386/microvm-dt.c for more details. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Sergio Lopez <slp@redhat.com> Message-Id: <20211014193617.2475578-1-kraxel@redhat.com>
2021-09-30Merge remote-tracking branch ↵Peter Maydell6-6/+6
'remotes/pmaydell/tags/pull-target-arm-20210930' into staging target-arm queue: * allwinner-h3: Switch to SMC as PSCI conduit * arm: tcg: Adhere to SMCCC 1.3 section 5.2 * xlnx-zcu102, xlnx-versal-virt: Support BBRAM and eFUSE devices * gdbstub related code cleanups * Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML * Use _init vs _new convention in bus creation function names * sabrelite: Connect SPI flash CS line to GPIO3_19 # gpg: Signature made Thu 30 Sep 2021 16:11:20 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210930: (22 commits) hw/arm: sabrelite: Connect SPI flash CS line to GPIO3_19 ide: Rename ide_bus_new() to ide_bus_init() qbus: Rename qbus_create() to qbus_new() qbus: Rename qbus_create_inplace() to qbus_init() pci: Rename pci_root_bus_new_inplace() to pci_root_bus_init() ipack: Rename ipack_bus_new_inplace() to ipack_bus_init() scsi: Replace scsi_bus_new() with scsi_bus_init(), scsi_bus_init_named() target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML target/arm: Move gdbstub related code out of helper.c target/arm: Fix coding style issues in gdbstub code in helper.c configs: Don't include 32-bit-only GDB XML in aarch64 linux configs docs/system/arm: xlnx-versal-virt: BBRAM and eFUSE Usage hw/arm: xlnx-zcu102: Add Xilinx eFUSE device hw/arm: xlnx-zcu102: Add Xilinx BBRAM device hw/arm: xlnx-versal-virt: Add Xilinx eFUSE device hw/arm: xlnx-versal-virt: Add Xilinx BBRAM device hw/nvram: Introduce Xilinx battery-backed ram hw/nvram: Introduce Xilinx ZynqMP eFuse device hw/nvram: Introduce Xilinx Versal eFuse device hw/nvram: Introduce Xilinx eFuse QOM ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-09-30Kconfig: Add CONFIG_SGX supportYang Zhong1-0/+1
Add new CONFIG_SGX for sgx support in the Qemu, and the Kconfig default enable sgx in the i386 platform. Signed-off-by: Yang Zhong <yang.zhong@intel.com> Message-Id: <20210719112136.57018-32-yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-09-30target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XMLPeter Maydell4-4/+4
Currently we send VFP XML which includes D0..D15 or D0..D31, plus FPSID, FPSCR and FPEXC. The upstream GDB tolerates this, but its definition of this XML feature does not include FPSID or FPEXC. In particular, for M-profile cores there are no FPSID or FPEXC registers, so advertising those is wrong. Move FPSID and FPEXC into their own bit of XML which we only send for A and R profile cores. This brings our definition of the XML org.gnu.gdb.arm.vfp feature into line with GDB's own (at least for non-Neon cores...) and means we don't claim to have FPSID and FPEXC on M-profile. (It seems unlikely to me that any gdbstub users really care about being able to look at FPEXC and FPSID; but we've supplied them to gdb for a decade and it's not hard to keep doing so.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210921162901.17508-5-peter.maydell@linaro.org
2021-09-30configs: Don't include 32-bit-only GDB XML in aarch64 linux configsPeter Maydell2-2/+2
The aarch64-linux QEMU usermode binaries can never run 32-bit code, so they do not need to include the GDB XML for it. (arm_cpu_register_gdb_regs_for_features() will not use these XML files if the CPU has ARM_FEATURE_AARCH64, so we will not advertise to gdb that we have them.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210921162901.17508-2-peter.maydell@linaro.org
2021-09-04hw/acpi: refactor acpi hp modules so that targets can just use what they needAni Sinha1-4/+1
Currently various acpi hotplug modules like cpu hotplug, memory hotplug, pci hotplug, nvdimm hotplug are all pulled in when CONFIG_ACPI_X86 is turned on. This brings in support for whole lot of subsystems that some targets like mips does not need. They are added just to satisfy symbol dependencies. This is ugly and should be avoided. Targets should be able to pull in just what they need and no more. For example, mips only needs support for PIIX4 and does not need acpi pci hotplug support or cpu hotplug support or memory hotplug support etc. This change is an effort to clean this up. In this change, new config variables are added for various acpi hotplug subsystems. Targets like mips can only enable PIIX4 support and not the rest of all the other modules which were being previously pulled in as a part of CONFIG_ACPI_X86. Function stubs make sure that symbols which piix4 needs but are not required by mips (for example, symbols specific to pci hotplug etc) are available to satisfy the dependencies. Currently, this change only addresses issues with mips malta targets. In future we might be able to clean up other targets which are similarly pulling in lot of unnecessary hotplug modules by enabling ACPI_X86. This change should also address issues such as the following: https://gitlab.com/qemu-project/qemu/-/issues/221 https://gitlab.com/qemu-project/qemu/-/issues/193 Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20210812071409.492299-1-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-07-20hw/tricore: fix inclusion of tricore_testboardAlex Bennée1-0/+1
Because commit f4063f9c319e39 ("meson: Introduce target-specific Kconfig") ended being merged after commit 582079c9d27fc8cfff9f49 ("hw/tricore: Add testdevice for tests in tests/tcg/"), we inadvertently added a symbol clash causing the build not to include the testboard needed for check-tcg. Fixes: f4063f9c31 ("meson: Introduce target-specific Kconfig") Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210720114057.32053-2-alex.bennee@linaro.org> [PMD: Updated description mentioning commits merged] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2021-07-20hw/ppc/Kconfig: Add missing dependency E500 -> DS1338 RTCPhilippe Mathieu-Daudé1-1/+0
Commit 7abb479c7ab ("PPC: E500: Add FSL I2C controller and integrate RTC with it") added a global dependency on the DS1338 model, instead of a machine one (via Kconfig). This gives trouble when building standalone machines not exposing I2C bus: The following clauses were found for DS1338 CONFIG_DS1338=y config DS1338 depends on I2C Fix by selecting the DS1338 symbol in the single machine requiring it, the E500. Fixes: 7abb479c7ab ("PPC: E500: Add FSL I2C controller and integrate RTC with it") Acked-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210513163858.3928976-9-philmd@redhat.com>
2021-07-20hw/mips: Express dependencies of the Boston machine with KconfigPhilippe Mathieu-Daudé1-4/+0
Boston is built around a Xilinx FPGA, which includes a PCIe root port and an UART. An Intel EG20T PCH connects the I/O peripherals, but only the SATA bus is emulated. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Paul Burton <pburton@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190311005618.19007-6-philmd@redhat.com>
2021-07-11Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ↵Peter Maydell99-0/+637
staging * More SVM fixes (Lara) * Module annotation database (Gerd) * Memory leak fixes (myself) * Build fixes (myself) * --with-devices-* support (Alex) # gpg: Signature made Fri 09 Jul 2021 17:23:52 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (48 commits) meson: Use input/output for entitlements target configure: allow the selection of alternate config in the build configs: rename default-configs to configs and reorganise hw/arm: move CONFIG_V7M out of default-devices hw/arm: add dependency on OR_IRQ for XLNX_VERSAL meson: Introduce target-specific Kconfig meson: switch function tests from compilation to linking vl: fix leak of qdict_crumple return value target/i386: fix exceptions for MOV to DR target/i386: Added DR6 and DR7 consistency checks target/i386: Added MSRPM and IOPM size check monitor/tcg: move tcg hmp commands to accel/tcg, register them dynamically usb: build usb-host as module monitor/usb: register 'info usbhost' dynamically usb: drop usb_host_dev_is_scsi_storage hook monitor: allow register hmp commands accel: build tcg modular accel: add tcg module annotations accel: build qtest modular accel: add qtest module annotations ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-09configure: allow the selection of alternate config in the buildAlex Bennée1-0/+9
While the default config works well enough it does end up enabling a lot of stuff. For more minimal builds we can select a different list of devices and let Kconfig work out what we want. For example: ../../configure --without-default-features \ --target-list=arm-softmmu,aarch64-softmmu \ --with-devices-aarch64=minimal will override the aarch64-softmmu default set of devices with a more minimal set of devices that just enables the virt and sbsa-ref models. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210707131744.26027-6-alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-09configs: rename default-configs to configs and reorganiseAlex Bennée98-0/+627
In preparation for offering variation to our build configurations lets move everything and rename it to default. Common included base configs are also renamed. During the cleanup the stale usb.mak and pci.mak references were removed from MAINTAINERS. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210707131744.26027-5-alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
generated by cgit v1.1 at 2024-12-22 23:02:04 +0000