aboutsummaryrefslogtreecommitdiff
path: root/accel
AgeCommit message (Collapse)AuthorFilesLines
2025-07-04accel/kvm: Remove kvm_cpu_synchronize_state() stubPhilippe Mathieu-Daudé1-4/+0
Since commit 57038a92bb0 ("cpus: extract out kvm-specific code to accel/kvm") the kvm_cpu_synchronize_state() stub is not necessary. Fixes: e0715f6abce ("kvm: remove kvm specific functions from global includes") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-22-philmd@linaro.org>
2025-07-04accel/hvf: Replace @dirty field by generic CPUState::vcpu_dirty fieldPhilippe Mathieu-Daudé1-5/+5
No need for accel-specific @dirty field when we have a generic one in CPUState. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Mads Ynddal <mads@ynddal.dk> Message-Id: <20250703173248.44995-19-philmd@linaro.org>
2025-07-04accel/hvf: Report missing com.apple.security.hypervisor entitlementPhilippe Mathieu-Daudé1-0/+5
We need the QEMU binary signed to be able to use HVF. Improve the following: $ ./qemu-system-aarch64-unsigned -M virt -accel hvf qemu-system-aarch64-unsigned: -accel hvf: Error: ret = HV_DENIED (0xfae94007, at ../../accel/hvf/hvf-accel-ops.c:339) Abort trap: 6 to: $ ./qemu-system-aarch64-unsigned -M virt -accel hvf qemu-system-aarch64-unsigned: -accel hvf: Could not access HVF. Is the executable signed with com.apple.security.hypervisor entitlement? Suggested-by: Shatyuka <shatyuka@qq.com> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2800 Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Mads Ynddal <mads@ynddal.dk> Message-Id: <20250702185332.43650-29-philmd@linaro.org>
2025-07-04accel/hvf: Move generic method declarations to hvf-all.cPhilippe Mathieu-Daudé2-269/+271
hvf-all.c aims to contain the generic accel methods (TYPE_ACCEL), while hvf-accel-ops.c the per-vcpu methods (TYPE_ACCEL_OPS). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-17-philmd@linaro.org>
2025-07-04accel/hvf: Move per-cpu method declarations to hvf-accel-ops.cPhilippe Mathieu-Daudé2-28/+30
hvf-all.c aims to contain the generic accel methods (TYPE_ACCEL), while hvf-accel-ops.c the per-vcpu methods (TYPE_ACCEL_OPS). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-16-philmd@linaro.org>
2025-07-04accel/tcg: Unregister the RCU before exiting RR threadPhilippe Mathieu-Daudé1-0/+2
Although unreachable, still unregister the RCU before exiting the thread, as documented in "qemu/rcu.h": /* * Important ! * * Each thread containing read-side critical sections must be registered * with rcu_register_thread() before calling rcu_read_lock(). * rcu_unregister_thread() should be called before the thread exits. */ Unregister the RCU to be on par with what is done for other accelerators. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250702185332.43650-66-philmd@linaro.org>
2025-07-04accel/tcg: Clear exit_request once in tcg_cpu_exec()Philippe Mathieu-Daudé2-1/+3
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250701144017.43487-62-philmd@linaro.org>
2025-07-04accel/tcg: Factor tcg_dump_stats() out for re-usePhilippe Mathieu-Daudé2-3/+10
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-11-philmd@linaro.org>
2025-07-04accel/tcg: Factor tcg_dump_flush_info() outPhilippe Mathieu-Daudé1-10/+17
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-10-philmd@linaro.org>
2025-07-04accel/tcg: Remove profiler leftoverPhilippe Mathieu-Daudé1-6/+0
TCG profiler was removed in commit 1b65b4f54c7. Fixes: 1b65b4f54c7 ("accel/tcg: remove CONFIG_PROFILER") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-9-philmd@linaro.org>
2025-07-04accel/tcg: Remove 'info opcount' and @x-query-opcountPhilippe Mathieu-Daudé1-21/+0
Since commit 1b65b4f54c7 ("accel/tcg: remove CONFIG_PROFILER", released with QEMU v8.1.0) we get pointless output: (qemu) info opcount [TCG profiler not compiled] Remove that unstable and unuseful command. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Dr. David Alan Gilbert <dave@treblig.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-8-philmd@linaro.org>
2025-07-04accel/kvm: Reduce kvm_create_vcpu() declaration scopePhilippe Mathieu-Daudé1-1/+7
kvm_create_vcpu() is only used within the same file unit. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-7-philmd@linaro.org>
2025-07-04accel/kvm: Remove kvm_init_cpu_signals() stubPhilippe Mathieu-Daudé1-5/+0
Since commit 57038a92bb0 ("cpus: extract out kvm-specific code to accel/kvm") the kvm_init_cpu_signals() stub is not necessary. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-6-philmd@linaro.org>
2025-07-04accel: Pass AccelState argument to gdbstub_supported_sstep_flags()Philippe Mathieu-Daudé4-4/+4
In order to have AccelClass methods instrospect their state, we need to pass AccelState by argument. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250703173248.44995-37-philmd@linaro.org>
2025-07-04accel: Remove unused MachineState argument of AccelClass::setup_post()Philippe Mathieu-Daudé2-2/+2
This method only accesses xen_domid/xen_domid_restrict, which are both related to the 'accelerator', not the machine. Besides, xen_domid aims to be in Xen AccelState and xen_domid_restrict a xen_domid_restrict QOM property. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250703173248.44995-36-philmd@linaro.org>
2025-07-04accel: Directly pass AccelState argument to AccelClass::has_memory()Philippe Mathieu-Daudé1-2/+2
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250703173248.44995-34-philmd@linaro.org>
2025-07-04accel/kvm: Directly pass KVMState argument to do_kvm_create_vm()Philippe Mathieu-Daudé1-5/+2
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250703173248.44995-35-philmd@linaro.org>
2025-07-04accel/kvm: Prefer local AccelState over global MachineState::accelPhilippe Mathieu-Daudé1-3/+1
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250703173248.44995-32-philmd@linaro.org>
2025-07-04accel/tcg: Prefer local AccelState over global current_accel()Philippe Mathieu-Daudé1-1/+1
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250703173248.44995-33-philmd@linaro.org>
2025-07-04accel: Propagate AccelState to AccelClass::init_machine()Philippe Mathieu-Daudé6-6/+6
In order to avoid init_machine() to call current_accel(), pass AccelState along. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250703173248.44995-31-philmd@linaro.org>
2025-07-04accel: Keep reference to AccelOpsClass in AccelClassPhilippe Mathieu-Daudé2-2/+5
Allow dereferencing AccelOpsClass outside of accel/accel-system.c. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250703173248.44995-30-philmd@linaro.org>
2025-07-04accel: Expose and register generic_handle_interrupt()Philippe Mathieu-Daudé4-0/+4
In order to dispatch over AccelOpsClass::handle_interrupt(), we need it always defined, not calling a hidden handler under the hood. Make AccelOpsClass::handle_interrupt() mandatory. Expose generic_handle_interrupt() prototype and register it for each accelerator. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Message-Id: <20250703173248.44995-29-philmd@linaro.org>
2025-07-04accel/dummy: Extract 'dummy-cpus.h' header from 'system/cpus.h'Philippe Mathieu-Daudé4-0/+17
'dummy' helpers are specific to accelerator implementations, no need to expose them via "system/cpus.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Message-Id: <20250703173248.44995-27-philmd@linaro.org>
2025-07-04accel/whpx: Expose whpx_enabled() to common codePhilippe Mathieu-Daudé2-0/+13
Currently whpx_enabled() is restricted to target-specific code. By defining CONFIG_WHPX_IS_POSSIBLE we allow its use anywhere. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250703173248.44995-26-philmd@linaro.org>
2025-07-04accel/nvmm: Expose nvmm_enabled() to common codePhilippe Mathieu-Daudé2-0/+13
Currently nvmm_enabled() is restricted to target-specific code. By defining CONFIG_NVMM_IS_POSSIBLE we allow its use anywhere. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-25-philmd@linaro.org>
2025-07-04accel/kvm: Remove kvm_cpu_synchronize_state() stubPhilippe Mathieu-Daudé1-4/+0
Since commit 57038a92bb0 ("cpus: extract out kvm-specific code to accel/kvm") the kvm_cpu_synchronize_state() stub is not necessary. Fixes: e0715f6abce ("kvm: remove kvm specific functions from global includes") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-22-philmd@linaro.org>
2025-07-04accel/hvf: Replace @dirty field by generic CPUState::vcpu_dirty fieldPhilippe Mathieu-Daudé1-5/+5
No need for accel-specific @dirty field when we have a generic one in CPUState. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-19-philmd@linaro.org>
2025-07-04accel/hvf: Move generic method declarations to hvf-all.cPhilippe Mathieu-Daudé2-269/+271
hvf-all.c aims to contain the generic accel methods (TYPE_ACCEL), while hvf-accel-ops.c the per-vcpu methods (TYPE_ACCEL_OPS). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-17-philmd@linaro.org>
2025-07-04accel/hvf: Move per-cpu method declarations to hvf-accel-ops.cPhilippe Mathieu-Daudé2-28/+30
hvf-all.c aims to contain the generic accel methods (TYPE_ACCEL), while hvf-accel-ops.c the per-vcpu methods (TYPE_ACCEL_OPS). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-16-philmd@linaro.org>
2025-07-04accel/tcg: Factor tcg_dump_stats() out for re-usePhilippe Mathieu-Daudé2-3/+10
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-11-philmd@linaro.org>
2025-07-04accel/tcg: Factor tcg_dump_flush_info() outPhilippe Mathieu-Daudé1-10/+17
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-10-philmd@linaro.org>
2025-07-04accel/tcg: Remove profiler leftoverPhilippe Mathieu-Daudé1-6/+0
TCG profiler was removed in commit 1b65b4f54c7. Fixes: 1b65b4f54c7 ("accel/tcg: remove CONFIG_PROFILER") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-9-philmd@linaro.org>
2025-07-04accel/tcg: Remove 'info opcount' and @x-query-opcountPhilippe Mathieu-Daudé1-21/+0
Since commit 1b65b4f54c7 ("accel/tcg: remove CONFIG_PROFILER", released with QEMU v8.1.0) we get pointless output: (qemu) info opcount [TCG profiler not compiled] Remove that unstable and unuseful command. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Dr. David Alan Gilbert <dave@treblig.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-8-philmd@linaro.org>
2025-07-04accel/kvm: Reduce kvm_create_vcpu() declaration scopePhilippe Mathieu-Daudé1-1/+7
kvm_create_vcpu() is only used within the same file unit. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-7-philmd@linaro.org>
2025-07-04accel/kvm: Remove kvm_init_cpu_signals() stubPhilippe Mathieu-Daudé1-5/+0
Since commit 57038a92bb0 ("cpus: extract out kvm-specific code to accel/kvm") the kvm_init_cpu_signals() stub is not necessary. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Message-Id: <20250703173248.44995-6-philmd@linaro.org>
2025-07-04system/cpus: Assert interrupt handling is done with BQL lockedPhilippe Mathieu-Daudé1-2/+0
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250703173248.44995-5-philmd@linaro.org>
2025-07-03migration: close kvm after cprSteve Sistare1-0/+32
cpr-transfer breaks vfio network connectivity to and from the guest, and the host system log shows: irq bypass consumer (token 00000000a03c32e5) registration fails: -16 which is EBUSY. This occurs because KVM descriptors are still open in the old QEMU process. Close them. Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/1751493538-202042-4-git-send-email-steven.sistare@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03Merge tag 'pull-10.1-maintainer-june-2025-020725-1' of ↵Stefan Hajnoczi1-0/+30
https://gitlab.com/stsquad/qemu into staging Maintainer updates for June (gitlab, semihosting, plugins, virtio-gpu) - mark s390x runner system tests as allow_fail - build semihosting once - add register write support to plugins - add virtual memory write support to plugins - add harder memory read/write support to plugins - add patcher plugin and tests - re-stock virtio-gpu MAINTAINERS - fix context init for Venus fences * tag 'pull-10.1-maintainer-june-2025-020725-1' of https://gitlab.com/stsquad/qemu: virtio-gpu: support context init multiple timeline MAINTAINERS: add Akihiko and Dmitry as reviewers MAINTAINERS: add myself to virtio-gpu for Odd Fixes plugins: Update plugin version and add notes plugins: Add patcher plugin and test tests/tcg: Remove copy-pasted notes and from i386 and add x86_64 system tests to tests plugins: Add memory hardware address read/write API plugins: Add memory virtual address write API plugins: Add enforcement of QEMU_PLUGIN_CB flags in register R/W callbacks plugins: Add register write API gdbstub: Expose gdb_write_register function to consumers of gdbstub semihosting/uaccess: Compile once semihosting/uaccess: Remove uses of target_ulong type tests/functional: Add PCI hotplug test for aarch64 gitlab: mark s390x-system to allow failures Conflicts: tests/functional/meson.build Context conflict with commit 7bc86ccbb59f ("tests/functional: test device passthrough on aarch64"), keep both changes to tests_aarch64_system_thorough[].
2025-07-02plugins: Add enforcement of QEMU_PLUGIN_CB flags in register R/W callbacksRowan Hart1-0/+30
This patch adds functionality to enforce the requested QEMU_PLUGIN_CB_ flags level passed when registering a callback function using the plugins API. Each time a callback is about to be invoked, a thread-local variable will be updated with the level that callback requested. Then, called API functions (in particular, the register read and write API) will call qemu_plugin_get_cb_flags() to check the level is at least the level they require. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Rowan Hart <rowanbhart@gmail.com> Message-ID: <20250624175351.440780-4-rowanbhart@gmail.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250627112512.1880708-8-alex.bennee@linaro.org>
2025-07-01accel/hvf: Trace VM memory mappingPhilippe Mathieu-Daudé3-0/+15
Trace memory mapped / unmapped in the guest. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250623121845.7214-8-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-06-23physmem: Support coordinated discarding of RAM with guest_memfdChenyi Qiang1-0/+9
A new field, attributes, was introduced in RAMBlock to link to a RamBlockAttributes object, which centralizes all guest_memfd related information (such as fd and status bitmap) within a RAMBlock. Create and initialize the RamBlockAttributes object upon ram_block_add(). Meanwhile, register the object in the target RAMBlock's MemoryRegion. After that, guest_memfd-backed RAMBlock is associated with the RamDiscardManager interface, and the users can execute RamDiscardManager specific handling. For example, VFIO will register the RamDiscardListener and get notifications when the state_change() helper invokes. As coordinate discarding of RAM with guest_memfd is now supported, only block uncoordinated discard. Tested-by: Alexey Kardashevskiy <aik@amd.com> Reviewed-by: Alexey Kardashevskiy <aik@amd.com> Acked-by: David Hildenbrand <david@redhat.com> Signed-off-by: Chenyi Qiang <chenyi.qiang@intel.com> Link: https://lore.kernel.org/r/20250612082747.51539-6-chenyi.qiang@intel.com Signed-off-by: Peter Xu <peterx@redhat.com>
2025-06-10accel/hvf: Fix TYPE_HVF_ACCEL instance sizePhilippe Mathieu-Daudé1-0/+1
Fixes: c97d6d2cdf9 ("i386: hvf: add code base from Google repo") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250606164418.98655-7-philmd@linaro.org>
2025-06-06i386/kvm: Prefault memory on page state changeTom Lendacky1-0/+2
A page state change is typically followed by an access of the page(s) and results in another VMEXIT in order to map the page into the nested page table. Depending on the size of page state change request, this can generate a number of additional VMEXITs. For example, under SNP, when Linux is utilizing lazy memory acceptance, memory is typically accepted in 4M chunks. A page state change request is submitted to mark the pages as private, followed by validation of the memory. Since the guest_memfd currently only supports 4K pages, each page validation will result in VMEXIT to map the page, resulting in 1024 additional exits. When performing a page state change, invoke KVM_PRE_FAULT_MEMORY for the size of the page state change in order to pre-map the pages and avoid the additional VMEXITs. This helps speed up boot times. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Link: https://lore.kernel.org/r/f5411c42340bd2f5c14972551edb4e959995e42b.1743193824.git.thomas.lendacky@amd.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-05-30Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingStefan Hajnoczi2-6/+13
* target/i386/kvm: Intel TDX support * target/i386/emulate: more lflags cleanups * meson: remove need for explicit listing of dependencies in hw_common_arch and target_common_arch * rust: small fixes * hpet: Reorganize register decoding to be more similar to Rust code * target/i386: fixes for AMD models * target/i386: new EPYC-Turin CPU model # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCgAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmg4BxwUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroP67gf+PEP4EDQP0AJUfxXYVsczGf5snGjz # ro8jYmKG+huBZcrS6uPK5zHYxtOI9bHr4ipTHJyHd61lyzN6Ys9amPbs/CRE2Q4x # Ky4AojPhCuaL2wHcYNcu41L+hweVQ3myj97vP3hWvkatulXYeMqW3/4JZgr4WZ69 # A9LGLtLabobTz5yLc8x6oHLn/BZ2y7gjd2LzTz8bqxx7C/kamjoDrF2ZHbX9DLQW # BKWQ3edSO6rorSNHWGZsy9BE20AEkW2LgJdlV9eXglFEuEs6cdPKwGEZepade4bQ # Rdt2gHTlQdUDTFmAbz8pttPxFGMC9Zpmb3nnicKJpKQAmkT/x4k9ncjyAQ== # =XmkU # -----END PGP SIGNATURE----- # gpg: Signature made Thu 29 May 2025 03:05:00 EDT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (77 commits) target/i386/tcg/helper-tcg: fix file references in comments target/i386: Add support for EPYC-Turin model target/i386: Update EPYC-Genoa for Cache property, perfmon-v2, RAS and SVM feature bits target/i386: Add couple of feature bits in CPUID_Fn80000021_EAX target/i386: Update EPYC-Milan CPU model for Cache property, RAS, SVM feature bits target/i386: Update EPYC-Rome CPU model for Cache property, RAS, SVM feature bits target/i386: Update EPYC CPU model for Cache property, RAS, SVM feature bits rust: make declaration of dependent crates more consistent docs: Add TDX documentation i386/tdx: Validate phys_bits against host value i386/tdx: Make invtsc default on i386/tdx: Don't treat SYSCALL as unavailable i386/tdx: Fetch and validate CPUID of TD guest target/i386: Print CPUID subleaf info for unsupported feature i386: Remove unused parameter "uint32_t bit" in feature_word_description() i386/cgs: Introduce x86_confidential_guest_check_features() i386/tdx: Define supported KVM features for TDX i386/tdx: Add XFD to supported bit of TDX i386/tdx: Add supported CPUID bits relates to XFAM i386/tdx: Add supported CPUID bits related to TD Attributes ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-05-28cpu: Don't set vcpu_dirty when guest_state_protectedXiaoyao Li1-1/+3
QEMU calls kvm_arch_put_registers() when vcpu_dirty is true in kvm_vcpu_exec(). However, for confidential guest, like TDX, putting registers is disallowed due to guest state is protected. Only set vcpu_dirty to true with guest state is not protected when creating the vcpu. Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/20250508150002.689633-43-xiaoyao.li@intel.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-05-28kvm: Check KVM_CAP_MAX_VCPUS at vm levelXiaoyao Li1-1/+1
KVM with TDX support starts to report different KVM_CAP_MAX_VCPUS per different VM types. So switch to check the KVM_CAP_MAX_VCPUS at vm level. KVM still returns the global KVM_CAP_MAX_VCPUS when the KVM is old that doesn't report different value at vm level. Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/20250508150002.689633-31-xiaoyao.li@intel.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-05-28kvm: Introduce kvm_arch_pre_create_vcpu()Xiaoyao Li1-0/+5
Introduce kvm_arch_pre_create_vcpu(), to perform arch-dependent work prior to create any vcpu. This is for i386 TDX because it needs call TDX_INIT_VM before creating any vcpu. The specific implementation for i386 will be added in the future patch. Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/20250508150002.689633-8-xiaoyao.li@intel.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-05-28accel/tcg: Assert TCGCPUOps.pointer_wrap is setRichard Henderson2-5/+3
All targets now provide the function, so we can make the call unconditional. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-28target: Use cpu_pointer_wrap_uint32 for 32-bit targetsRichard Henderson1-0/+6
M68K, MicroBlaze, OpenRISC, RX, TriCore and Xtensa are all 32-bit targets. AVR is more complicated, but using a 32-bit wrap preserves current behaviour. Cc: Michael Rolnik <mrolnik@gmail.com> Cc: Laurent Vivier <laurent@vivier.eu> Cc: Stafford Horne <shorne@gmail.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Max Filippov <jcmvbkbc@gmail.com> Tested-by Bastian Koppelmann <kbastian@mail.uni-paderborn.de> (tricore) Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-28target: Use cpu_pointer_wrap_notreached for strict align targetsRichard Henderson1-0/+13
Alpha, HPPA, and SH4 always use aligned addresses, and therefore never produce accesses that cross pages. Cc: Helge Deller <deller@gmx.de> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>