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2025-05-28accel/tcg: Add TCGCPUOps.pointer_wrapRichard Henderson1-0/+6
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-28tcg: Drop TCGContext.page_{mask,bits}Richard Henderson1-4/+0
Use exec/target_page.h instead of independent variables. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-28tcg: Drop TCGContext.tlb_dyn_max_bitsRichard Henderson1-2/+0
This was an extremely minor optimization for aarch64 and x86_64, to use a 32-bit AND instruction when the guest softmmu tlb maximum was sufficiently small. Both hosts can simply use a 64-bit AND insn instead. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-28accel/tcg: Fix atomic_mmu_lookup vs TLB_FORCE_SLOWRichard Henderson1-7/+8
When we moved TLB_MMIO and TLB_DISCARD_WRITE to TLB_SLOW_FLAGS_MASK, we failed to update atomic_mmu_lookup to properly reconstruct flags. Fixes: 24b5e0fdb543 ("include/exec: Move TLB_MMIO, TLB_DISCARD_WRITE to slow flags") Reported-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-26meson: remove lib{system, user}_ss aliasesPierrick Bouvier1-4/+4
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Link: https://lore.kernel.org/r/20250521223414.248276-7-pierrick.bouvier@linaro.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-05-12meson: do not check supported TCG architecture if no emulators builtPaolo Bonzini1-1/+1
Errors about TCI are pointless if only tools are being built; suppress them even if the user did not specify --disable-tcg. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-05-08system/hvf: Expose hvf_enabled() to common codePhilippe Mathieu-Daudé2-0/+13
Currently hvf_enabled() is restricted to target-specific code. By defining CONFIG_HVF_IS_POSSIBLE we allow its use anywhere. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250403235821.9909-28-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-08accel/hvf: Include missing 'hw/core/cpu.h' headerPhilippe Mathieu-Daudé1-0/+1
Since commit d5bd8d8267e ("hvf: only update sysreg from owning thread") hvf-all.c accesses the run_on_cpu_data type and calls run_on_cpu(), both defined in the "hw/core/cpu.h" header. Fortunately, it is indirectly included via: "system/hvf.h" -> "target/arm/cpu.h" -> "target/arm/cpu-qom.h" -> "hw/core/cpu.h" "system/hvf.h" however doesn't need "target/arm/cpu.h" and we want to remove it there. In order to do that we first need to include it in hvf-all.c, otherwise we get: ../accel/hvf/hvf-all.c:61:54: error: unknown type name 'run_on_cpu_data' 61 | static void do_hvf_update_guest_debug(CPUState *cpu, run_on_cpu_data arg) | ^ ../accel/hvf/hvf-all.c:68:5: error: call to undeclared function 'run_on_cpu' 68 | run_on_cpu(cpu, do_hvf_update_guest_debug, RUN_ON_CPU_NULL); | ^ ../accel/hvf/hvf-all.c:68:48: error: use of undeclared identifier 'RUN_ON_CPU_NULL' 68 | run_on_cpu(cpu, do_hvf_update_guest_debug, RUN_ON_CPU_NULL); | ^ Cc: Mads Ynddal <m.ynddal@samsung.com> Reported-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Mads Ynddal <mads@ynddal.dk> Message-Id: <20250507204401.45379-1-philmd@linaro.org>
2025-05-07Merge tag 'pull-target-arm-20250506' of ↵Stefan Hajnoczi1-1/+6
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * hw/arm/npcm8xx_boards: Correct valid_cpu_types setting of NPCM8XX SoC * arm/hvf: fix crashes when using gdbstub * target/arm/ptw: fix arm_cpu_get_phys_page_attrs_debug * hw/arm/virt: Remove deprecated old versions of 'virt' machine * tests/functional: Add test for imx8mp-evk board with USDHC coverage * hw/arm: Attach PSPI module to NPCM8XX SoC * target/arm: Don't assert() for ISB/SB inside IT block * docs: Don't define duplicate label in qemu-block-drivers.rst.inc * target/arm/kvm: Drop support for kernels without KVM_ARM_PREFERRED_TARGET * hw/pci-host/designware: Fix viewport configuration * hw/gpio/imx_gpio: Fix interpretation of GDIR polarity # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmgaH50ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3l4ED/0QOV6oev1ILqA1INBjY7Ct # VrjzjsynFnUkyU0MLKyuK+mBRYmeR1OWtIRTkbgIsRA23XqV4de/BhGsVCGrRA0r # VS/hV2kTQM0GYU2dCr9LpOC3jX0dDzft5uW9GjW/sW9infAwXRwKhGgkIV6q/G5V # Y6cMN7UXrOnomF8Spk5VvK8HH9OHV/fuSlWenk9X1bXPpVQ3jymqZ1eRSDXOzDdM # uP6lVdI3oHCpRPeXKa1EA8cfQa9M/y9XSzDIrF8OTZKVcIzbX8/XR+y74e4UMIvK # DD3nAuAXcezy3286Pu7OfciRBJfq3eFHZVXOKfQWFI3MStPmexKqoHm8JtQxXJOT # uJdaugItLahlPtNk41nAydYzYimK/MBKCWAfTqecEhZ9Cd64jeOPM9zXwRkXwyuu # n9XQUhm5Ll22urd4q2M8cCxKBP2OoaEBFS4Hn9uDpVDcWpRMLe2DP7ywzZjdLU9b # jLSlana5+wpMuwIasXlNzWgT37RA+xlDE2Snaz7K/Z3JV/XNZAZD6WXV72zTzhFs # EI10edHI+JXXlbT1Ev/yVv4cN9h/Kr3hyoOKat2ySaomW26H27wNPuvPTto4rCYU # 6VQJmJvwPSBWELI5eRbcN269K0ar1UXUsvDsy97cq35me3gFvfAZFksLpnPWKef6 # pvwwPuxLWQXs+chepuQyXA== # =c21p # -----END PGP SIGNATURE----- # gpg: Signature made Tue 06 May 2025 10:41:33 EDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20250506' of https://git.linaro.org/people/pmaydell/qemu-arm: (32 commits) hw/arm/virt: Remove deprecated virt-4.0 machine hw/arm/virt: Remove deprecated virt-3.1 machine hw/arm/virt: Remove deprecated virt-3.0 machine hw/arm/virt: Update comment about Multiprocessor Affinity Register hw/gpio/imx_gpio: Fix interpretation of GDIR polarity hw/pci-host/designware: Fix viewport configuration hw/pci-host/designware: Remove unused include target/arm/kvm: Drop support for kernels without KVM_ARM_PREFERRED_TARGET docs: Don't define duplicate label in qemu-block-drivers.rst.inc target/arm: Don't assert() for ISB/SB inside IT block hw/arm: Attach PSPI module to NPCM8XX SoC tests/functional: Add test for imx8mp-evk board with USDHC coverage hw/arm/virt: Remove VirtMachineClass::no_highmem_ecam field hw/arm/virt: Remove deprecated virt-2.12 machine hw/arm/virt: Remove VirtMachineClass::smbios_old_sys_ver field hw/arm/virt: Remove deprecated virt-2.11 machine hw/arm/virt: Remove deprecated virt-2.10 machine hw/arm/virt: Remove deprecated virt-2.9 machine hw/arm/virt: Remove VirtMachineClass::claim_edge_triggered_timers field hw/arm/virt: Remove deprecated virt-2.8 machine ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-05-06hvf: only update sysreg from owning threadMads Ynddal1-1/+6
hv_vcpu_set_sys_reg should only be called from the owning thread of the vCPU, so to avoid crashes, the call to hvf_update_guest_debug is dispatched to the individual threads. Tested-by: Daniel Gomez <da.gomez@samsung.com> Signed-off-by: Mads Ynddal <m.ynddal@samsung.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20250402135229.28143-3-mads@ynddal.dk Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-05accel/tcg: Build user-exec.c onceRichard Henderson2-7/+3
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-05accel/tcg: Avoid abi_ptr in user-exec.cRichard Henderson1-6/+16
In page_dump/dump_region, use guest_addr_max to check the size of the guest address space and size the output appropriately. This will change output with small values of -R reserved_va, but shouldn't affect anything else. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-05accel/tcg: Remove TARGET_PAGE_DATA_SIZERichard Henderson1-10/+16
This macro is used by only one target, and even then under unusual conditions -- AArch64 with mmap's PROT_MTE flag. Since page size for aarch64-linux-user is variable, the per-page data size is also variable. Since page_reset_target_data via target_munmap does not have ready access to CPUState, simply pass in the size from the first allocation and remember that. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-05include/user: Convert GUEST_ADDR_MAX to a variableRichard Henderson1-2/+2
Remove GUEST_ADDR_MAX and add guest_addr_max. Initialize it in *-user/main.c, after reserved_va. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-05accel/tcg: Build cputlb.c onceRichard Henderson2-5/+3
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-05accel/tcg: Use vaddr for plugin_{load,store}_cbRichard Henderson1-2/+2
Avoid the use of abi_ptr within ldst_common.c.inc. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-05accel/tcg: Use target_long_bits() in cputlb.cRichard Henderson1-12/+13
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-05accel/tcg: Move user-only tlb_vaddr_to_host out of lineRichard Henderson1-0/+6
At the same time, fix a mis-match between user and system by using vaddr not abi_ptr for the address parameter. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-05accel/tcg: Use vaddr in cpu_loop.hRichard Henderson1-1/+1
Use vaddr instead of abi_ptr or target_ulong for a guest address. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-01accel/tcg: Build tcg-all.c twiceRichard Henderson2-8/+2
Remove some unused headers. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-01accel/tcg: Build translate-all.c twiceRichard Henderson2-33/+1
Remove lots and lots of unused headers. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-01accel/tcg: Use target_long_bits() in translate-all.cRichard Henderson1-1/+2
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-01accel/tcg: Don't use TARGET_LONG_BITS in decode_sleb128Richard Henderson1-1/+1
When we changed decode_sleb128 from target_long to int64_t, we failed to adjust the shift limit. Cc: qemu-stable@nongnu.org Fixes: c9ad8d27caa ("tcg: Widen gen_insn_data to uint64_t") Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-01tcg: Define INSN_START_WORDS as constant 3Richard Henderson1-10/+9
Use the same value for all targets. Rename TARGET_INSN_START_WORDS and do not depend on TARGET_INSN_START_EXTRA_WORDS. Remove TCGContext.insn_start_words. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Compile cpu-exec.c twiceRichard Henderson2-3/+1
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Split out accel/tcg/helper-retaddr.hRichard Henderson2-0/+2
Move set_helper_retaddr and clear_helper_retaddr to a new header file. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Pass TCGTBCPUState to tb_gen_codeRichard Henderson3-20/+17
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Use TCGTBCPUState in struct tb_descRichard Henderson1-13/+7
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Pass TCGTBCPUState to tb_htable_lookupRichard Henderson1-11/+9
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Pass TCGTBCPUState to tb_lookupRichard Henderson1-15/+13
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOpsRichard Henderson2-4/+5
Move the global function name to a hook on TCGCPUOps. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Return TCGTBCPUState from cpu_get_tb_cpu_stateRichard Henderson2-39/+25
Combine 3 different pointer returns into one structure return. Include a cflags field in TCGTBCPUState, not filled in by cpu_get_tb_cpu_state, but used by all callers. This fills a hole in the structure and is useful in some subroutines. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30target/i386: Split out x86_cpu_exec_resetRichard Henderson1-25/+14
Note that target/i386/cpu.h defines CPU_INTERRUPT_INIT as CPU_INTERRUPT_RESET. Therefore we can handle the new TCGCPUOps.cpu_exec_reset hook. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Introduce TCGCPUOps.cpu_exec_resetRichard Henderson1-1/+2
Initialize all instances with cpu_reset(), so that there is no functional change. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Unconditionally use CPU_DUMP_CCOP in log_cpu_execRichard Henderson1-4/+1
This flag is only tested by target/i386, so including this makes no functional change. This is similar to other places like cpu-target.c which use CPU_DUMP_CCOP unconditionally. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Generalize fake_user_interrupt testRichard Henderson1-3/+3
Test for the hook being present instead of ifdef TARGET_I386. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30include: Remove 'exec/exec-all.h'Philippe Mathieu-Daudé4-4/+0
"exec/exec-all.h" is now fully empty, let's remove it. Mechanical change running: $ sed -i '/exec\/exec-all.h/d' $(git grep -wl exec/exec-all.h) Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250424202412.91612-14-philmd@linaro.org>
2025-04-30accel/tcg: Extract probe API out of 'exec/exec-all.h'Philippe Mathieu-Daudé2-0/+2
Declare probe methods in "accel/tcg/probe.h" to emphasize they are specific to TCG accelerator. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250424202412.91612-13-philmd@linaro.org>
2025-04-30physmem: Restrict TCG IOTLB code to TCG accelPhilippe Mathieu-Daudé1-0/+1
Restrict iotlb_to_section(), address_space_translate_for_iotlb() and memory_region_section_get_iotlb() to TCG. Declare them in the new "accel/tcg/iommu.h" header. Declare iotlb_to_section() using the MemoryRegionSection typedef. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250424202412.91612-12-philmd@linaro.org>
2025-04-30accel/tcg: Include 'accel/tcg/getpc.h' in 'exec/helper-proto'Philippe Mathieu-Daudé1-0/+1
Most files including "exec/helper-proto.h" call GETPC(). Include it there (in the common part) instead of the unspecific "exec/exec-all.h" header. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250424202412.91612-10-philmd@linaro.org>
2025-04-30accel/tcg: Compile tb-maint.c twiceRichard Henderson3-5/+2
Reviewed-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Use vaddr in user/page-protection.hRichard Henderson1-27/+24
Reviewed-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Use vaddr for walk_memory_regions callbackRichard Henderson1-5/+5
Use vaddr instead of target_ulong. At the same time, use int instead of unsigned long for flags, to match page_set_flags(). Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Reduce scope of tb_phys_invalidate, tb_set_jmp_targetRichard Henderson1-0/+3
Move the declarations of these functions out of exec/exec-all.h to accel/tcg/internal-common.h. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Merge internal-target.h into internal-common.hRichard Henderson7-51/+29
There's nothing left in internal-target.h that is target specific. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Simplify L1_MAP_ADDR_SPACE_BITSRichard Henderson1-5/+1
Stop taking TARGET_PHYS_ADDR_SPACE_BITS into account. Simply allow the entire ram_addr_t space. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Simplify CPU_TLB_DYN_MAX_BITSRichard Henderson1-20/+1
Stop taking TARGET_VIRT_ADDR_SPACE_BITS into account. Since we currently bound CPU_TLB_DYN_MAX_BITS to 22, the new bound with a 4k page size is 20, which isn't so different. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Convert TARGET_HAS_PRECISE_SMC to TCGCPUOps.precise_smcRichard Henderson2-24/+18
Instead of having a compile-time TARGET_HAS_PRECISE_SMC definition, have each target set the 'precise_smc' field in the TCGCPUOps structure. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Add CPUState arg to tb_invalidate_phys_range_fastRichard Henderson3-6/+5
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-30accel/tcg: Add CPUState arg to tb_invalidate_phys_rangeRichard Henderson3-7/+9
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
generated by cgit v1.1 at 2025-09-20 13:09:53 +0000