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2024-05-15accel/tcg: Pass DisasContextBase to translator_fake_ldbRichard Henderson1-1/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15accel/tcg: Use vaddr in translator_ld*Richard Henderson1-7/+8
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-07Merge tag 'pull-tcg-20240507' of https://gitlab.com/rth7680/qemu into stagingRichard Henderson1-1/+1
tcg: Add write_aofs to GVecGen3i tcg/i386: Simplify immediate 8-bit logical vector shifts tcg/i386: Optimize setcond of TST{EQ,NE} with 0xffffffff tcg/optimize: Optimize setcond with zmask accel/tcg: Introduce CF_BP_PAGE target/sh4: Update DisasContextBase.insn_start gitlab: Drop --static from s390x linux-user build gitlab: Streamline ubuntu-22.04-s390x # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmY6OoAdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8FEwf7Bhs9bV2Kp4LxUzGq # +dSHHc/WuCyIILLDQ4kZyXvILuI59wYhrWBUUTzBnAZ/tEf0oMG2y57F/lIcxz9w # VvsFicMOhtjQ8iBEfl/rkkaYs9BLcxqMTAA3PxNBE6l3bzjcHSTkhey4MoPGRibn # CkwaLzb2ebNjfgzC1IsNf/tyiMXl0tBQM7JVV4EztaOGEmqw8X0/PyVZDiC3WUNC # tf9yqiNIlgGkn7rj3sT/rNdi4xlzQybgrb1MCFT6z5cqsW2bwqivRpxHi4yulHKI # VhYA3kud+TX2ASukpibsSkA+9SbcH/qwOugPhPIu+KANsFUcVKL6Anzv6Ysl9kZ0 # +Wnbow== # =FJCW # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 May 2024 07:28:16 AM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-tcg-20240507' of https://gitlab.com/rth7680/qemu: gitlab: Streamline ubuntu-22.04-s390x gitlab: Drop --static from s390x linux-user build gitlab: Drop --disable-libssh from ubuntu-22.04-s390x.yml target/sh4: Update DisasContextBase.insn_start accel/tcg: Introduce CF_BP_PAGE tcg/optimize: Optimize setcond with zmask tcg/i386: Optimize setcond of TST{EQ,NE} with 0xffffffff tcg/i386: Simplify immediate 8-bit logical vector shifts tcg: Add write_aofs to GVecGen3i Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-06accel/tcg: Introduce CF_BP_PAGERichard Henderson1-1/+1
Record the fact that we've found a breakpoint on the page in which a TranslationBlock is running. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-06Merge tag 'accel-20240506' of https://github.com/philmd/qemu into stagingRichard Henderson9-20/+65
Accelerator patches - Extract page-protection definitions to page-protection.h - Rework in accel/tcg in preparation of extracting TCG fields from CPUState - More uses of get_task_state() in user emulation - Xen refactors in preparation for adding multiple map caches (Juergen & Edgar) - MAINTAINERS updates (Aleksandar and Bin) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmY40CAACgkQ4+MsLN6t # wN5drxAA1oIsuUzpAJmlMIxZwlzbICiuexgn/HH9DwWNlrarKo7V1l4YB8jd9WOg # IKuj7c39kJKsDEB8BXApYwcly+l7DYdnAAI8Z7a+eN+ffKNl/0XBaLjsGf58RNwY # fb39/cXWI9ZxKxsHMSyjpiu68gOGvZ5JJqa30Fr+eOGuug9Fn/fOe1zC6l/dMagy # Dnym72stpD+hcsN5sVwohTBIk+7g9og1O/ctRx6Q3ZCOPz4p0+JNf8VUu43/reaR # 294yRK++JrSMhOVFRzP+FH1G25NxiOrVCFXZsUTYU+qPDtdiKtjH1keI/sk7rwZ7 # U573lesl7ewQFf1PvMdaVf0TrQyOe6kUGr9Mn2k8+KgjYRAjTAQk8V4Ric/+xXSU # 0rd7Cz7lyQ8jm0DoOElROv+lTDQs4dvm3BopF3Bojo4xHLHd3SFhROVPG4tvGQ3H # 72Q5UPR2Jr2QZKiImvPceUOg0z5XxoN6KRUkSEpMFOiTRkbwnrH59z/qPijUpe6v # 8l5IlI9GjwkL7pcRensp1VC6e9KC7F5Od1J/2RLDw3UQllMQXqVw2bxD3CEtDRJL # QSZoS4d1jUCW4iAYdqh/8+2cOIPiCJ4ai5u7lSdjrIJkRErm32FV/pQLZauoHlT5 # eTPUgzDoRXVgI1X1slTpVXlEEvRNbhZqSkYLkXr80MLn5hTafo0= # =3Qkg # -----END PGP SIGNATURE----- # gpg: Signature made Mon 06 May 2024 05:42:08 AM PDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] * tag 'accel-20240506' of https://github.com/philmd/qemu: (28 commits) MAINTAINERS: Update my email address MAINTAINERS: Update Aleksandar Rikalo email system: Pass RAM MemoryRegion and is_write in xen_map_cache() xen: mapcache: Break out xen_map_cache_init_single() xen: mapcache: Break out xen_invalidate_map_cache_single() xen: mapcache: Refactor xen_invalidate_map_cache_entry_unlocked xen: mapcache: Refactor xen_replace_cache_entry_unlocked xen: mapcache: Break out xen_ram_addr_from_mapcache_single xen: mapcache: Refactor xen_remap_bucket for multi-instance xen: mapcache: Refactor xen_map_cache for multi-instance xen: mapcache: Refactor lock functions for multi-instance xen: let xen_ram_addr_from_mapcache() return -1 in case of not found entry system: let qemu_map_ram_ptr() use qemu_ram_ptr_length() user: Use get_task_state() helper user: Declare get_task_state() once in 'accel/tcg/vcpu-state.h' user: Forward declare TaskState type definition accel/tcg: Move @plugin_mem_cbs from CPUState to CPUNegativeOffsetState accel/tcg: Restrict cpu_plugin_mem_cbs_enabled() to TCG accel/tcg: Restrict qemu_plugin_vcpu_exit_hook() to TCG plugins accel/tcg: Update CPUNegativeOffsetState::can_do_io field documentation ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-06user: Declare get_task_state() once in 'accel/tcg/vcpu-state.h'Philippe Mathieu-Daudé1-0/+18
While each user emulation implentation defines its own TaskState structure, both use the same get_task_state() declaration, in particular in common code (such gdbstub). Declare the method once in "accel/tcg/vcpu-state.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240428221450.26460-10-philmd@linaro.org>
2024-05-06accel/tcg: Move @plugin_mem_cbs from CPUState to CPUNegativeOffsetStatePhilippe Mathieu-Daudé2-4/+4
@plugin_mem_cbs is accessed by tcg generated code, move it to CPUNegativeOffsetState. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240429213050.55177-4-philmd@linaro.org>
2024-05-06accel/tcg: Restrict cpu_plugin_mem_cbs_enabled() to TCGPhilippe Mathieu-Daudé1-0/+17
So far cpu_plugin_mem_cbs_enabled() is only called from TCG, so reduce it to accel/tcg/. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <5f59c754-44e5-4743-a2dd-87ef8e13eadf@linaro.org>
2024-05-06accel/tcg: Move user definition of cpu_interrupt() to user-exec.cPhilippe Mathieu-Daudé2-9/+8
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240428221450.26460-4-philmd@linaro.org>
2024-05-06accel/tcg: Access tcg_cflags with getter / setterPhilippe Mathieu-Daudé3-2/+13
Access the CPUState::tcg_cflags via tcg_cflags_has() and tcg_cflags_set() helpers. Mechanical change using the following Coccinelle spatch script: @@ expression cpu; expression flags; @@ - cpu->tcg_cflags & flags + tcg_cflags_has(cpu, flags) @@ expression cpu; expression flags; @@ - (tcg_cflags_has(cpu, flags)) + tcg_cflags_has(cpu, flags) @@ expression cpu; expression flags; @@ - cpu->tcg_cflags |= flags; + tcg_cflags_set(cpu, flags); Then manually moving the declarations, and adding both tcg_cflags_has() and tcg_cflags_set() definitions. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240427155714.53669-15-philmd@linaro.org>
2024-05-06accel/tcg: Use cpu_loop_exit_requested() in cpu_loop_exec_tb()Philippe Mathieu-Daudé1-5/+2
Do not open-code cpu_loop_exit_requested(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240428214915.10339-9-philmd@linaro.org>
2024-05-06exec/cpu: Extract page-protection definitions to page-protection.hPhilippe Mathieu-Daudé3-0/+3
Extract page-protection definitions from "exec/cpu-all.h" to "exec/page-protection.h". The list of files requiring the new header was generated using: $ git grep -wE \ 'PAGE_(READ|WRITE|EXEC|RWX|VALID|ANON|RESERVED|TARGET_.|PASSTHROUGH)' Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Nicholas Piggin <npiggin@gmail.com> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240427155714.53669-3-philmd@linaro.org>
2024-05-06exec/cpu: Rename PAGE_BITS macro to PAGE_RWXBALATON Zoltan1-1/+1
This macro can be used to abbreviate PAGE_READ | PAGE_WRITE | PAGE_EXEC for which PAGE_RWX is a better name and renaming it also shows it is not related to TARGET_PAGE_BITS. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240505121008.44A0D4E602D@zero.eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-05-03tcg: remove CPU* types from typedefs.hPaolo Bonzini1-2/+2
hw/core/cpu.h is already using struct forward declarations in some cases to avoid inclusions, and otherwise CPUAddressSpace and CPUJumpCache are only used together with their definition. CPUTLBEntryFull is always used when their definition is available. Remove all three from typedefs.h. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-04-30plugins: Update the documentation block for plugin-gen.cRichard Henderson1-27/+4
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-30plugins: Inline plugin_gen_empty_callbackRichard Henderson1-16/+3
Each caller can use tcg_gen_plugin_cb directly. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-30plugins: Merge qemu_plugin_tb_insn_get to plugin-gen.cRichard Henderson1-7/+32
Merge qemu_plugin_insn_alloc and qemu_plugin_tb_insn_get into plugin_gen_insn_start, since it is used nowhere else. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-30plugins: Split out common cb expandersRichard Henderson1-43/+41
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-30plugins: Replace pr_ops with a proper debug dump flagRichard Henderson1-56/+11
The DEBUG_PLUGIN_GEN_OPS ifdef is replaced with "-d op_plugin". The second pr_ops call can be obtained with "-d op". Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-30plugins: Introduce PLUGIN_CB_MEM_REGULARRichard Henderson1-1/+1
Use different enumerators for vcpu_udata and vcpu_mem callbacks. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-30plugins: Simplify callback queuesRichard Henderson1-42/+48
We have qemu_plugin_dyn_cb.type to differentiate the various callback types, so we do not need to keep them in separate queues. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-30tcg: Remove INDEX_op_plugin_cb_{start,end}Richard Henderson1-18/+0
These opcodes are no longer used. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-30plugins: Remove plugin helpersRichard Henderson2-25/+0
These placeholder helpers are no longer required. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-30plugins: Use emit_before_op for PLUGIN_GEN_FROM_MEMRichard Henderson1-365/+45
Introduce a new plugin_mem_cb op to hold the address temp and meminfo computed by tcg-op-ldst.c. Because this now has its own opcode, we no longer need PLUGIN_GEN_FROM_MEM. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-30plugins: Use emit_before_op for PLUGIN_GEN_FROM_INSNRichard Henderson1-221/+65
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-30plugins: Add PLUGIN_GEN_AFTER_TBRichard Henderson1-21/+16
Delay test of plugin_tb->mem_helper until the inject pass. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-30plugins: Use emit_before_op for PLUGIN_GEN_FROM_TBRichard Henderson1-39/+57
By having the qemu_plugin_cb_flags be recorded in the TCGHelperInfo, we no longer need to distinguish PLUGIN_CB_REGULAR from PLUGIN_CB_REGULAR_R, so place all TB callbacks in the same queue. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-30plugins: Use emit_before_op for PLUGIN_GEN_AFTER_INSNRichard Henderson1-31/+43
Introduce a new plugin_cb op and migrate one operation. By using emit_before_op, we do not need to emit opcodes early and modify them later -- we can simply emit the final set of opcodes once. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-30plugins: Move function pointer in qemu_plugin_dyn_cbRichard Henderson1-2/+2
The out-of-line function pointer is mutually exclusive with inline expansion, so move it into the union. Wrap the pointer in a structure named 'regular' to match PLUGIN_CB_REGULAR. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-26exec: Move CPUTLBEntry helpers to cputlb.cPhilippe Mathieu-Daudé1-0/+51
The following CPUTLBEntry helpers are only used in accel/tcg/cputlb.c: - tlb_index() - tlb_entry() - tlb_read_idx() - tlb_addr_write() Move them to this file, allowing to remove the huge "cpu.h" header inclusion from "exec/cpu_ldst.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240418192525.97451-13-philmd@linaro.org>
2024-04-26accel/tcg: Rename load-extract/store-insert headers using .h.inc suffixPhilippe Mathieu-Daudé1-2/+2
Since commit 139c1837db ("meson: rename included C source files to .c.inc"), QEMU standard procedure for included C files is to use *.c.inc. Besides, since commit 6a0057aa22 ("docs/devel: make a statement about includes") this is documented in the Coding Style: If you do use template header files they should be named with the ``.c.inc`` or ``.h.inc`` suffix to make it clear they are being included for expansion. Therefore rename 'store-insert-al16.h' as 'store-insert-al16.h.inc' and 'load-extract-al16-al8.h' as 'load-extract-al16-al8.h.inc'. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240424173333.96148-3-philmd@linaro.org>
2024-04-26accel/tcg: Include missing headers in 'tb-jmp-cache.h'Philippe Mathieu-Daudé1-0/+3
Due to missing headers, when including "tb-jmp-cache.h" we might get: accel/tcg/tb-jmp-cache.h:21:21: error: field ‘rcu’ has incomplete type 21 | struct rcu_head rcu; | ^~~ accel/tcg/tb-jmp-cache.h:24:9: error: unknown type name ‘vaddr’ 24 | vaddr pc; | ^~~~~ Add the missing "qemu/rcu.h" and "exec/cpu-common.h" headers. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240111162442.43755-1-philmd@linaro.org>
2024-04-26accel/tcg: Include missing 'hw/core/cpu.h' headerPhilippe Mathieu-Daudé1-0/+2
tcg_cpu_init_cflags() accesses CPUState fields, so requires "hw/core/cpu.h" to get its structure definition. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20231212123401.37493-12-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-26accel/tcg: Un-inline retaddr helpers to 'user-retaddr.h'Philippe Mathieu-Daudé3-0/+32
set_helper_retaddr() is only used in accel/tcg/user-exec.c. clear_helper_retaddr() is only used in accel/tcg/cpu-exec.c and accel/tcg/user-exec.c. No need to expose their definitions to all user-emulation files including "exec/cpu_ldst.h", move them to a new "user-retaddr.h" header (restricted to accel/tcg/). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231211212003.21686-19-philmd@linaro.org>
2024-04-26accel: Include missing 'exec/cpu_ldst.h' headerPhilippe Mathieu-Daudé1-0/+1
Theses files call cpu_ldl_code() which is declared in "exec/cpu_ldst.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231211212003.21686-5-philmd@linaro.org>
2024-04-26exec: Reduce tlb_set_dirty() declaration scopePhilippe Mathieu-Daudé1-1/+1
tlb_set_dirty() is only used in accel/tcg/cputlb.c, where it is defined. Declare it statically, removing the stub. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240418192525.97451-11-philmd@linaro.org>
2024-04-23accel/tcg/icount-common: Consolidate the use of warn_report_once()Zhao Liu1-4/+2
Use warn_report_once() to get rid of the static local variable "notified". Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Message-ID: <20240418100716.1085491-1-zhao1.liu@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-04-09accel/tcg: Improve can_do_io managementRichard Henderson1-22/+23
We already attempted to set and clear can_do_io before the first and last insns, but only used the initial value of max_insns and the call to translator_io_start to find those insns. Now that we track insn_start in DisasContextBase, and now that we have emit_before_op, we can wait until we have finished translation to identify the true first and last insns and emit the sets of can_do_io at that time. This fixes the case of a translation block which crossed a page boundary, and for which the second page turned out to be mmio. In this case we truncate the block, and the previous logic for can_do_io could leave a block with a single insn with can_do_io set to false, which would fail an assertion in cpu_io_recompile. Reported-by: Jørgen Hansen <Jorgen.Hansen@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Jørgen Hansen <Jorgen.Hansen@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-09accel/tcg: Add insn_start to DisasContextBaseRichard Henderson1-0/+2
This is currently target-specific for many; begin making it target independent. Tested-by: Jørgen Hansen <Jorgen.Hansen@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-02accel/tcg/plugin: Remove CONFIG_SOFTMMU_GATE definitionPhilippe Mathieu-Daudé1-6/+0
The CONFIG_SOFTMMU_GATE definition was never used, remove it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240313213339.82071-2-philmd@linaro.org>
2024-03-29accel/tcg: Use CPUState.get_pc in cpu_io_recompileRichard Henderson1-1/+1
Using log_pc produces the pc at the beginning of TB, not the actual pc installed by cpu_restore_state_from_tb, which could be any of the guest instructions within TB. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-03-12bulk: Call in place single use cpu_env()Philippe Mathieu-Daudé1-2/+1
Avoid CPUArchState local variable when cpu_env() is used once. Mechanical patch using the following Coccinelle spatch script: @@ type CPUArchState; identifier env; expression cs; @@ { - CPUArchState *env = cpu_env(cs); ... when != env - env + cpu_env(cs) ... when != env } Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240129164514.73104-5-philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-03-06plugins: cleanup codepath for previous inline operationPierrick Bouvier1-9/+4
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240304130036.124418-13-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240305121005.3528075-26-alex.bennee@linaro.org>
2024-03-06plugins: add inline operation per vcpuPierrick Bouvier1-0/+7
Extends API with three new functions: qemu_plugin_register_vcpu_{tb, insn, mem}_exec_inline_per_vcpu(). Those functions takes a qemu_plugin_u64 as input. This allows to have a thread-safe and type-safe version of inline operations. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240304130036.124418-5-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240305121005.3528075-18-alex.bennee@linaro.org>
2024-03-06plugins: implement inline operation relative to cpu_indexPierrick Bouvier1-13/+56
Instead of working on a fixed memory location, allow to address it based on cpu_index, an element size and a given offset. Result address: ptr + offset + cpu_index * element_size. With this, we can target a member in a struct array from a base pointer. Current semantic is not modified, thus inline operation still targets always the same memory location. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240304130036.124418-4-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240305121005.3528075-17-alex.bennee@linaro.org>
2024-03-05accel/tcg: Add TLB_CHECK_ALIGNEDRichard Henderson1-3/+27
This creates a per-page method for checking of alignment. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240301204110.656742-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-05accel/tcg: Add tlb_fill_flags to CPUTLBEntryFullRichard Henderson1-4/+1
Allow the target to set tlb flags to apply to all of the comparators. Remove MemTxAttrs.byte_swap, as the bit is not relevant to memory transactions, only the page mapping. Adjust target/sparc to set TLB_BSWAP directly. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240301204110.656742-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-02-29accel/tcg: Disconnect TargetPageDataNode from page sizeRichard Henderson1-5/+8
Dynamically size the node for the runtime target page size. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20240102015808.132373-29-richard.henderson@linaro.org>
2024-02-29cpu: Remove page_size_initRichard Henderson1-1/+0
Move qemu_host_page_{size,mask} and HOST_PAGE_ALIGN into bsd-user. It should be removed from bsd-user as well, but defer that cleanup. Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Ilya Leoshkevich <iii@linux.ibm.com> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20240102015808.132373-28-richard.henderson@linaro.org>
2024-02-29accel/tcg: Remove qemu_host_page_size from page_protect/page_unprotectRichard Henderson1-8/+10
Use qemu_real_host_page_size instead. Except for the final mprotect within page_protect, we already handled host < target page size. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20240102015808.132373-2-richard.henderson@linaro.org>
generated by cgit v1.1 at 2025-09-20 22:16:17 +0000